Abstract: A method and system for mapping an input color value in an input color space to an output color value in an output color space comprising a lookup table mapping an input value to an output color value, the lookup table having n number of possible values for a first fixed color component and q number of possible values for a second fixed color component, wherein q and a number m of possible values for t color components in the input color space are less than n. Surrounding input values are determined in the lookup table in a t dimensional space, wherein each surrounding input value has a same value for the fixed color component(s). Surrounding output values to which the surrounding input values map are determined. The determined input and output surrounding values and the input value are used to estimate an output value corresponding to the received input value.

Abstract: In order to output amplitude data with the clock frequency higher than the clock frequency of phase data, the direct digital synthesizer for transmission and detection comprises: a transmitting phase for outputting a first phase data with a first clock frequency; a curtailing unit for outputting a second phase data with a second clock frequency smaller than the first clock frequency, and outputting additional data for compensating for phase information disappeared with curtailing process; an interpolating unit for outputting a third phase data with a third clock frequency larger than the first frequency by implementing interpolating process to the second phase data, and a detecting waveform for outputting amplitude data in accordance with the third phase data. The detecting signal amplitude data can be outputted with the third clock frequency higher than the second clock frequency of the second phase data transmitted.

Abstract: A digital pre-distortion system which can provide the flexibility to model the highly non-linear distortion associated with High Efficiency RF Power Amplifiers while through a novel implementation of a least squares estimation process allows an implementation well suited for an FPGA application where limited resources and in particular memory resources are available.

Abstract: The invention relates to a device to be used with a scheduling method, and to a scheduling method, in particular a context scheduling method, comprising the steps of performing a scheduling for threads to be executed by a multithreaded processor, wherein the scheduling is performed as a function of index variables assigned to the threads. That thread whose index variable has the highest, or—in an alternative—the lowest value may be selected as the respective thread to be executed by the processor.

Abstract: Certain aspects of the present disclosure provide methods for distributed sensing and centralized reconstruction of two correlated signals, modeled as the input and output of an unknown sparse filtering operation.

Abstract: A digital signal processor and method are disclosed with one or more non-linear functions using factorized polynomial interpolation. A digital signal processor evaluates a non-linear function for a value, x, by obtaining two or more values from at least one look-up table for said non-linear function that are near said value, x; and interpolating said two or more obtained values to obtain a value, y, using a factorized polynomial interpolation.

Abstract: A digital signal processor and method are disclosed having an instruction set with one or more non-linear functions using a look-up table of reduced size and exponentially varying step-sizes. A digital signal processor evaluates a non-linear function for a value, x, by obtaining at least two values from at least one look-up table for the non-linear function that are near the value, x, wherein the at least one look-up table stores a subset of values for the non-linear function using exponentially-varying step sizes; and interpolating the at least two obtained values lo to obtain a result, y. A position of a leading zero in the value, x, can be used as an index into the at least one look-up table. The interpolation can comprise, for example, a linear interpolation or a polynomial interpolation. A modulo arithmetic operation can optionally be employed for a periodic non-linear function.

Abstract: A digital signal processor and method are disclosed having an instruction set with one or more non-linear functions using a look-up table of reduced size. A digital signal processor evaluates a non-linear function for a value, x, by obtaining two or more values for the non-linear function that are near the value, x, from at least one look-up table, wherein the at least one look-up table stores a subset of values for the non-linear function; and interpolating the two or more obtained values to obtain a result, y. The interpolation may comprise, for example, a linear interpolation or a polynomial interpolation. In a further variation, a modulo arithmetic operation can be employed for a periodic non-linear function.

Abstract: A power function is approximated over an applicable data interval with polynomials determined by means of a Chebyshev minimax approximation technique. In some cases, multiple polynomials may be used to approximate the function over respective ranges of the desirable interval, in a piecewise manner. The appropriate polynomial that approximates the power function over the range of interest is derived and stored. When the power function is to be applied to a particular data value, the data value is first evaluated to determine where it lies within the applicable interval. The constants for the polynomial associated with that range of the interval are then retrieved and used to calculate the power of that data value.

Abstract: A technique to accelerate range detection in a spline calcuation. In one embodiment, an instruction and corresponding logic are provided to perform range detection within a computer or processor.

Abstract: According to one embodiment, a first correlation calculator calculates a correlation between first pixel blocks, and detects as first reference pixels actual pixels contained respectively in the first pixel blocks with the highest correlation. A second correlation calculator calculates a correlation between second pixel blocks, and detects as second reference pixels actual pixels contained respectively in the second pixel blocks with the highest correlation. The first pixel blocks include pixels arranged in a plurality of rows and columns The second pixel blocks include pixels arranged in at least one row less than the rows of the first pixel blocks and a plurality of columns. An interpolation calculator calculates, when the first reference pixels are located perpendicular to the actual pixel lines, the pixel value of the interpolation pixel based on the second reference pixels.

Abstract: Systems and methods that optimize approximation functions are provided. In one example, a method that approximates a particular expression over a sample space of input values is provided. The method may include the steps of splitting the sample space of the input values into sub-regions; associating a polynomial function for each of the sub-regions; optimizing each polynomial function over the respective sub-region; and optimizing all polynomial functions over the sample space.

Abstract: Methods for setting a basal rate profile for an insulin pump with an input unit and a calculation unit are disclosed. A number of interpolation nodes for the basal rate profile are defined by means of the input unit of the insulin pump. A continuous function with respect to the interpolation nodes, which images the interpolation nodes and any previously stored basal rates, is formed using the calculation unit of the insulin pump, and a temporal sequence of basal rates to be released by the insulin pump during specific time intervals is generated from the continuous function using the calculation unit of the insulin pump.

Abstract: An audio data interpolating device includes: a reception module configured to receive content data; an extraction module configured to extract first audio data and second audio data corresponding to the first audio data from the content data; an interpolation data detection module configured to detect error data in the first audio data and detect interpolation data corresponding to the error data from the second audio data; and an output module configured to output the first audio data and output the interpolation data in place of the error data included in the first audio data.

Abstract: A system and method for performing convolutions on image data using pre-computed acceleration data structures is disclosed. The method may include calculating intermediate convolution values for each of a plurality of blocks of pixels by performing an associative operation on the pixel values in each block. Each intermediate value may be associated with the block and indexed dependent on index values of pixels in the block. An image pyramid may include intermediate convolution values for multiple levels of acceleration by calculating intermediate convolution values for multiple block sizes. A convolution result for a kernel of an image may be produced by performing the associative operation on intermediate convolution values for non-overlapping blocks enclosed within the kernel and on pixel values associated with pixels in the kernel but not in one of the non-overlapping blocks. The methods may be implemented by program instructions executing in parallel on CPU(s) or GPUs.

Abstract: An apparatus receives input of sample sets, each including a set of values of design parameters and a set of values of objective functions; calculates objective function approximating equations; and selects, as initial candidates for an optimal design parameter set, some sets of values of design parameters corresponding to non-dominated solutions. The apparatus calculates one or more interpolating design parameter sets interpolating between two adjacent components in the candidates; and approximates values of the objective functions for each interpolating design parameter set. The apparatus selects an optimal interpolating design parameter set corresponding to a non-dominated solution in the cost evaluation for a pair of objective functions; and integrates it into the candidates. The apparatus repeats processes on the new candidates while determining the parameter distance between components of the new candidates.

Abstract: A digital signal processor 1 is provided for performing digital image processing operations such as forward texture mapping. A first logic unit 21 receives input sample coordinates xr and xl, and determines a first colour weight value “w” and a second colour weight value “wN”. A second logic unit 23 weights an input sample colour with the colour weight value wN, with the resultant weighted sample colour being added to accumulated weighted sample colours from one or more previous iterations, thereby producing a new accumulated weighted sample colour, ie the rgbaPartOut signal 13. A third logic unit 25 is configured to weight the input sample colour with the first colour weight value w, with the resultant weighted sample colour being added to the accumulated weighted sample colours rgbaPartIn to produce the output colour signal rgbaOut 11.

Abstract: A method for generating a series of output signals represented by a series of measurement signals which is particularly useful in the compensation for jatter, missing spurious pulses or plates when applied to the processing of signals from a speed probe monitoring the speed of a rotating bladed shaft. The method includes the steps of predicting a value for a first measurement signal from a historical measurement signal value, generating a first output signal from the predicted value of the first measurement signal; comparing the measurement signal to its predicted value, and: if the measurement signal is within a predetermined range of acceptable values, using the first measurement signal to predict a value for a second measurement signal; if the measurement signal is outside the pre-determined range of acceptable values, using the first predicted value to predict a second measurement signal, and generating a second output signal from the predicted value of the second measurement signal.

Abstract: Multipurpose arithmetic functional units can perform planar attribute interpolation and unary function approximation operations. In one embodiment, planar interpolation operations for coordinates (x, y) are executed by computing A*x+B*y+C, and unary function approximation operations for operand x are executed by computing F2(xb)*xh2+F1(xb)*xh+F0(xb), where xh=x?xb. Shared multiplier and adder circuits are advantageously used to implement the product and sum operations for both classes of operations.

Abstract: An apparatus and method for adaptively introducing a compensating signal latency related to a signal latency of a data symbol decision circuit. Adaptive timing control circuitry, including an interpolating mixer implemented as a tapped delay line with correlated tap coefficients, introduces a latency adaptively and substantially matching the latency of the data decision circuit for use within an adaptive equalizer, thereby minimizing the mean-squared error of such decision circuit. This adaptive latency is used in generating the feedback error signal which, in turn, can be used by the feedforward equalizer for dynamically adjusting its adaptive filter tap coefficients.

Abstract: A digital signal, x(n) (where n is an integer), is decimated by determining a signal vector, y(k), of size M by partitioning samples of the digital signal, x(n) according to sampling phases of the samples. The signal vector, y(k), is projected onto an N-dimensional sub-space, wherein N is an integer and N<M. Where the digital signal is generated by means of oversampling, it is possible to perform decimation in a way that optimizes the signal-to-noise ratio (SNR) of the decimated signal by suitably determining the sub-space onto which the signal vector will be projected.

Abstract: A road shape estimating device has a data obtaining processing unit for obtaining interpolation point data for shape interpolation points, a radius calculation processing unit for calculating a radius of curvature at each of the shape interpolation points based on the interpolation point data, a corner detection processing unit for detecting a corner based on the radius of curvature at each of the shape interpolation points and for setting a candidate start point and a candidate end point, and a minimum radius calculation processing unit for setting a center ideal point based on the candidate start point and the candidate end point of the corner, a front ideal point on the candidate start point side of the center ideal point, and a rear ideal point on the candidate end point side of the center ideal point, and for calculating an ideal radius of curvature of the corner as a minimum radius.

Abstract: Systems and techniques are described in which rank-1 lattices are used in computerized image processing, in particular in the context of image synthesis. These include systems and techniques for selection of rank-1 lattices, rasterization on rank-1 lattices, anti-aliasing by rank-1 lattices, and adaptive refinement and filtering by rank-1 lattices.

Abstract: An electronic control apparatus has a memory which stores a map consisting of a set of map points and corresponding set of map values, with the map values representing respective physical quantity values, and at least one of the sets of map points and map values being stored as fixed-point representation data. When a map point is specified, the apparatus obtains a corresponding physical quantity value by converting fixed-point data of the map to floating-point representation, then using a floating-point arithmetic unit to perform an interpolation calculation using the converted data.

Abstract: A sampling rate conversion system reduces the signal processing burdens carried by cellular phones, headsets, and other electronic devices. Because the system consumes fewer resources to convert between signal sampling rates, the system may significantly reduce processing time and resource requirements in the device. As a result, the device may instead devote resources to performing other useful tasks, such as interacting with the user through a graphical user interface and performing selected processing tasks.

Abstract: A derivation procedure for a three-dimensional digital mask from a series of two-dimensional masks in a radiographic device containing a source (S) of X-rays, a means of recording and a volume of interest hat contains the object to be X-rayed located between the source (S) and the means of recording consists of an extrapolation of each mask M?2 includes determining a last segment lfin beyond the limits of the means of recording; and working out a two-dimensional mask M? associated with a position S? of the source, for any angle ? included in the angular range ?2 to ?1 (a position close to ?2). For every parallel segment l located between segment d (or d? respectively) and segment lfin, the procedure further includes deriving a three-dimensional mask (21) of the object for each voxel at the intersection of plane P1?2 and the volume of interest; and projecting the three-dimensional mask onto the segment l.

Abstract: A method for processing sensor data which are transmitted by at least one asynchronous sensor at a transfer rate, the sensor data being read at a predefined sampling rate, a mean value being computed from a predefined number of read sensor data, wherein the sampling ratio between the sampling rate and transfer rate is estimated for averaging, the number of transmitted data values and the number of sampling pulses within a predefined time span being ascertained and correlated to each other for estimating the sampling ratio.

Abstract: A method and system for generation of low-slew indices for circuit characterization are disclosed. In one embodiment, a method for automatically generating a subset of sampling points from a set of load and slew points for circuit characterization includes iteratively obtaining sampling points such that error between an actual value and an interpolated intermediate value is below or equal to a threshold error value. The subset of sampling points is then formed from the iteratively obtained sampling points.

Abstract: The present invention discloses a precision-sensing linear interpolation algorithm, which is distinct from the conventional technology in that precision detection is performed before iterative division calculations. The iteration number of iterative division calculations is determined according to the required precision. After the iterative division calculations, the bits in the decimal places unnecessary for the required precision are set to be 0 with a bit-masking method. Via the precision detection and bit mask, the present invention can promote algorithm efficiency and reduce dynamic power consumption.

Abstract: A phase interpolator circuit may comprise a multiplexer circuit (MUX) to receive a plurality of clock signals at MUX inputs and to output a first clock signal and a second clock signal that are out of phase with each other, a digital to analog converter circuit (DAC) to convert a digital input to first and second DAC output currents such that a sum of the first and second DAC output currents comprises a substantially constant current value, and a weighted averager circuit coupled to the MUX and the DAC. The weighted averager circuit may operate to sum weighted first and second clock signals and to output a phase interpolated clock signal. The first clock signal may be weighted according to the first DAC output current and the second clock signal may be weighted according to the second DAC output current. Other apparatus, systems, and methods are disclosed.

Abstract: Techniques are described for sampling rate conversion in the digital domain by up-sampling and down-sampling a digital signal according to a selected intermediate sampling frequency. A prototype anti-aliasing filter that has a bandwidth with multiple factors is stored in memory. The techniques include selecting an intermediate sampling frequency to be an integer multiple of a desired output sampling frequency of a digital signal based on the factors of the prototype filter, and selecting a down-sampling factor to be the same integer associated with the selected intermediate sampling frequency. A filter generator generates an anti-aliasing filter for the selected down-sampling factor based on the prototype filter.

Abstract: A system and method for object inspection includes an object modeler; an iterative object segmentor in signal communication with the object modeler for receiving an input image and model parameters and producing a segmented image; a moment transformer in signal communication with the iterative object segmentor for receiving an input image, model parameters and a segmented image and producing estimates of object translation, rotation and scaling; an edge detector and interpolator in signal communication with the moment transformer for receiving an input image, model parameters and estimates and producing a set of line edges; and an iterative optimizer in signal communication with the edge detector and interpolator for receiving an input image, model parameters, estimates and line edges and producing refined estimates of object translation, rotation and scaling.

Abstract: A method for processing sensor data which are transmitted by at least one asynchronous sensor at a transfer rate into a buffer memory, the sensor data being read from the buffer memory at a predefined sampling rate, and a mean value being computed from a predefined number of read sensor data. The transfer rate to sampling rate ratio is selected in such a way that the number of sensor data averaged within a sampling period is n or (n+1), the mean values of the read sensor data being computed using a fixed synchronized phase shift with respect to the sampling rate, which is determined in averaging (n+1) sensor data, n being a natural number greater than or equal to two.

Abstract: Methods and apparatus arc provided for performing reduced complexity discrete Fourier transforms using interpolation An input sequence of length N is transformed by extending the input sequence to an extended input sequence of length M, where M is greater than N (a power of two greater than N); performing a discrete Fourier Transform (DFT), such as a power-of-two DFT, on the extended input sequence to obtain an interpolated sequence; and applying a conversion matrix to the interpolated sequence to obtain a DFT output for the input sequence of length N. The input sequence of length N can be extended to an extended input sequence of length M, for example, by employing a zero padding technique, a cyclic extension technique, a windowing of a cyclic extended sequence technique or a resampling-based interpolation technique to extend the input sequence The conversion matrix is substantially a spar se matrix.

Abstract: A circuit and method are provided for correcting binary values in a data word having N bit positions where the circuit includes several assemblies, each for a unique data word bit position, where each assembly includes a first logic circuit connected to its unique data word bid and an adjacent data word bit to provide a first output bit and a second logic circuit connected to receive the first output bit and a different adjacent bit of the data word to provide a second output bit representing a corrected value of the unique bit.

Abstract: A method and an apparatus for extrapolating diagnostic data relating to one pupil diameter to another pupil diameter. Embodiments according to the invention are more particularly directed to extrapolating wavefront aberration data, for example, in the form of Zernike polynomial data, obtained from a smaller pupil diameter, d1, to a larger pupil diameter, d2. Data relating to the first pupil diameter d1 may be obtained in a diagnostic procedure. In the extrapolation, a conversion matrix M is utilized. The conversion matrix M can be generated from a static matrix and a dynamic matrix, the latter taking the pupil diameter d1 into consideration. Data relating the first pupil diameter d1 and wavefront aberration data can be ordered via a permutation matrix P. If necessary, Extrapolated data can be re-ordered via a transposed permutation matrix PT.

Abstract: A method for coarsening a graph, the graph including a plurality of vertices, the method incorporating: selecting a vertex from the plurality of vertices; calculating a merge modularity gain between the selected vertex and its adjacent vertices, wherein the adjacent vertices are a function of the position of the selected vertex in the graph; calculating mathematically a similarity between the selected vertex and its adjacent vertices; determining mathematically, based on the calculated merge modularity gain and similarity, whether the selected vertex can be merged with one of its adjacent vertices; and performing the merge when merge is determined possible and updating the list of adjacent vertices. A system and a storage medium to perform coarsening of the graph is also provided.

Abstract: A causal impulse response function is calculated from a truncated spectrum by extending the real part of the spectrum beyond the truncation frequency and computing the imaginary part with the Hilbert transform to enforce causality. The out of band extrapolation is optimized to reduce the discrepancy between the computed and the original imaginary part in the in band frequency range so that the causal impulse response accurately represents the original spectrum. The technique can be applied to spectral with the delay phase subtracted to enforce delay causality. The Hilbert transform may be employed to maintain causality in S-parameter passivity violation correction. At frequencies where violation happens, the S-parameter matrix is scaled down by the inverse of the magnitude of the largest eigenvalue. Magnitudes at other frequencies are unchanged. An additional phase calculated by the magnitude phase Hilbert transform is added to the scaled spectrum to maintain the causality.

Abstract: A phase interpolator circuit may comprise a multiplexer circuit (MUX) coupled to a plurality of clock signals at MUX inputs and may provide a first clock signal and a second clock signal at MUX outputs that are out of phase with each other, a digital to analog converter circuit (DAC) to convert a digital input to first and second DAC current outputs such that a sum of the first and second DAC output currents comprises a substantially constant current value, a weighted averager circuit coupled to the MUX and the DAC, and a variable capacitive load circuit coupled to the first and second DAC current outputs. The weighted averager circuit may operate to sum weighted first and second clock signals and to output a phase interpolated clock signal, wherein the first clock signal is weighted according to a first DAC output current and the second clock signal is weighted according to a second DAC output current. Other apparatus, systems, and methods are disclosed.

Abstract: A computer executable method of processing a representation of a modal interval polynomial is provided. A representation of a modal interval polynomial is generally provided as input, more particularly, a representation comprising a modal interval function variable and an array of modal interval coefficients. Each modal interval linear interpolation of each of the modal interval coefficients of the array are recursively processed until a single modal interval coefficient remains in the array. For each iteration of the recursive processing, a modal interval linear interpolation operation is executed.

Abstract: Systems and methodologies are described that facilitate equalization of received signals in a wireless communication environment. Multiple transmit and/or receive antennas and utilize MIMO technology to enhance performance. A single tile of transmitted data, including a set of modulation symbols, can be received at multiple receive antennas, resulting in multiple tiles of received modulation symbols. Corresponding modulation symbols from multiple received tiles can be processed as a function of channel and interference estimates to generate a single equalized modulation symbol. Typically, the equalization process is computationally expensive. However, the channels are highly correlated. This correlation is reflected in the channel estimates and can be utilized to reduce complex equalization operations. In particular, a subset of the equalizers can be generated based upon the equalizer function and the remainder can be generated using interpolation. In addition, the equalizer function itself can be simplified.

Abstract: The architecture for a combined universal sample rate converter and a sample clock synchronizer is presented. The universal sample rate converter can be applied, for example, to audio samples created or mixed using any of the standard audio frequencies in the set H={8, 11.025, 22.05, 44.1, 48, 96, and 192} kHz and played back using any other frequency from the set H. The synchronizer can be used where audio data are streamed or otherwise broadcast from, for example, the Internet, along with a system timestamp, and where this timestamp needs to be matched to the local audio clock for proper play-back. The same synchronizer can also be used for audio/video or video only synchronization.

Abstract: A method for processing sensor data which are transmitted by at least one asynchronous sensor at a transfer rate, the sensor data being read at a predefined sampling rate, a mean value being computed from a predefined number of read sensor data, wherein the sampling ratio between the sampling rate and transfer rate is estimated for averaging, the number of transmitted data values and the number of sampling pulses within a predefined time span being ascertained and correlated to each other for estimating the sampling ratio.

Abstract: Method and apparatus for interpolation of signals from a delay line is described. An input signal is obtained from which progressively delayed input signals are generated from the input signal. Two of the progressively delayed input signals are accessed and interpolated to provide a phase-adjusted signal.

Abstract: Methods and apparatus are provided for decimated interpolated clock/data recovery (ICDR) to perform asynchronous sampling of a received signal. A received signal is converted to a plurality of digital samples at a downsampled rate that is lower than a rate of the received signal. The plurality of digital samples are interpolated using a plurality of parallel interpolation filters operating at the downsampled rate. An output of each parallel interpolation filter is applied to a corresponding data detector operating at the downsampled rate to generate digital data. An estimate of a timing error is generated based on the digital data. The timing error values are processed to generate an interpolation phase value that is applied to the parallel interpolation filters. A recovered clock is optionally generated, having edges corresponding to a desired synchronous sampling period.

Abstract: A simple to implement sample rate conversion system consisting of an input/output data flow controller, interpolation coefficient generation, and output data flow control to generate the converted data stream. Sample rate conversion may be done at real time video rates, without restrictions on the conversion ratios.

Abstract: A calculation device calculates information relating to a processing speed for a plurality of processing devices which execute various kinds of process in response to a request from a process request device. The calculation device includes a response time calculation part which calculates a response time for each processing device, based on a time which each processing device needs for the process, a permissible time calculation part which calculates a permissible time for each item of identification information corresponding to the process request device, based on a time from a start of a request for the process, from the process request device to the processing device, to an interruption of the request for the process, and a calculation part which calculates information relating to a processing speed, for each processing device, for each item of identification information.

Abstract: A method of determining interpolation coefficients (607, 609, 610, 611) of a symmetric interpolation kernel (608) is disclosed. The method comprises determining a first interpolation coefficient (611) from the symmetric interpolation kernel (608) and storing the first interpolation coefficient in a memory (506). The method then determines the value of an intermediate function (310) from symmetrically opposed segments (201, 204) of the kernel, and determines a subsequent interpolation coefficient dependent upon the first interpolation coefficient and the value of the intermediate function.

Abstract: An interpolation system interpolates image positions in an original image to produce an interpolated output image, wherein the original image is represented by digital input pixel data. A first filter with a sharp interpolation characteristic, that interpolates a selected image position in the image to generate a sharp interpolation output value. A second filter having a smooth interpolation characteristic, that interpolates the selected image position in the image to generate a smooth interpolation output value. A controller that calculates a weighting coefficient for the output of each filter. And, a combiner selectively combines the output values from the filters as a function of the weighting coefficients, to generate an interpolation output value for the selected image position of an interpolated output image.

Abstract: There provided is a low-cost, high performance sampling rate conversion calculating apparatus which achieves both a low delay characteristic required for conversational voice data and high quality required for audio data in a concurrent manner. A first digital signal processing section outputs conversational voice data, which requires the low delay characteristic, in accordance with a sampling frequency of an output terminal (111). A second digital signal processing section outputs audio data, which requires the high quality, rather than the low density characteristic, in accordance with the sampling frequency of the output terminal (111). An adder section (107) adds the conversational voice data outputted from the first digital signal processing section and the audio data outputted from the second digital signal processing section and outputs the added data from the output terminal (111).