Bused Computer Networking Patents (Class 709/253)
  • Patent number: 6813251
    Abstract: A method of and apparatus for communicating between a host and an agent. The method includes the step of performing a first transaction between a host controller and a hub. The hub is operable to perform a single transaction with an agent based on the first transaction. The method then includes the step of performing a second transaction between the host controller and the hub. The second transaction is based on the single transaction.
    Type: Grant
    Filed: July 27, 1999
    Date of Patent: November 2, 2004
    Assignee: Intel Corporation
    Inventors: John I. Garney, John S. Howard
  • Patent number: 6810457
    Abstract: A parallel processing system includes a network and a plurality of nodes which communicates asynchronously between the plurality of nodes through the network. Each of the plurality of nodes may include a plurality of CPUs and a communication control unit. Each of the plurality of CPUs as an issuing CPU generates and transmits an asynchronous communication request, retransmits the asynchronous communication request in response to a non-acceptance reply, and executes a subsequent process in response to an acceptance replay. The communication control unit determines whether the asynchronous communication request is acceptable, returns the acceptance reply to the issuing CPU when the asynchronous communication request is acceptable, and the non-acceptance reply to the issuing CPU when the asynchronous communication request is not acceptable, and executes the asynchronous communication request.
    Type: Grant
    Filed: July 5, 2001
    Date of Patent: October 26, 2004
    Assignee: NEC Corporation
    Inventor: Takashi Hagiwara
  • Publication number: 20040205252
    Abstract: A device for converting between the trunked and untrunked transmission of Fibre Channel frame data is described. During conversion, the device manages the flow of frame data in both the egress (from Fibre Channel ports to a non-Fibre Channel port) and ingress (from a non-Fibre Channel port to Fibre Channel ports) directions. In the egress direction, the device operates as a FIFO to transmit all frames received from the Fibre Channel ports to the non-Fibre Channel ports. In the ingress direction, every frame received by the non-Fibre Channel port is stored in one of up to four storage segments based on the frame data's virtual circuit and path number identifiers. Frames are transmitted out of each storage segment in the order in which they are received therein. The device may be a stand-alone device. The device may also be incorporated into a Fibre Channel switch or other apparatus that connects to a Fibre Channel network or switch.
    Type: Application
    Filed: January 31, 2002
    Publication date: October 14, 2004
    Applicant: Brocade Communications Systems, Inc.
    Inventor: Kreg A. Martin
  • Publication number: 20040181612
    Abstract: When a burst data transfer is started and a data phase reaches an address to which data is not to be transferred, a byte enable signal is deasserted. When the data phase reaches an address to which data is to be transferred, the byte enable signal is asserted, and data to be transferred is updated only at the time when this data phase is completed. With such an arrangement, the data can be transferred only to destination addresses which are separated with intervals of several words.
    Type: Application
    Filed: February 11, 2004
    Publication date: September 16, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventor: Kenichi Kawaguchi
  • Publication number: 20040177167
    Abstract: According to one embodiment of the invention, a system is provided which includes a server and one or more clients that are connected to the server via one or more power lines. The server stores audio data recorded on multiple recording units (e.g., CDs) and corresponding information associated with the respective audio data (e.g., title, author, content list, etc.). The one or more clients access the server via the one or more power lines to download selected audio data and the corresponding information from the server.
    Type: Application
    Filed: March 4, 2003
    Publication date: September 9, 2004
    Inventors: Ryuichi Iwamura, David A. Desch, Takaaki Ota
  • Publication number: 20040177166
    Abstract: A portable network access point device is disclosed allowing access to mapped network drives through FireWire (1394) or USB. The device contains all the necessary functions to access a network and shared network drives. The hardware has ethernet on one end and USB or FireWire on the other. When connected to a network, this device will attempt to connect to all shared network drives for which it has been programmed. When connected to a computer via USB/FireWire, the computer loads the drivers and maps the listed drives. The computer need not load the entire network stack to access these drives. After a onetime configuration, the technician would be able to access shared drives from any computer without reconfiguring the computer's network settings or drive mappings. The computer system accessing the device through the USB/FireWire port sees a storage device. As seen from the network, however, the device looks like a network card attached to the network.
    Type: Application
    Filed: March 5, 2003
    Publication date: September 9, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: BRANDON JON ELLISON, ALAN LADD PAINTER
  • Patent number: 6785720
    Abstract: A method for contacting server devices in a browser-based home network in which the server devices each have a function of a web server and a client device into which a web browser is installed controls the server devices through the web browser. The method includes the steps of preparing a home page of the client device so as to display server device icons for selecting the server devices to be connected to, selecting one of the server devices to be connected to in the home page, reading a register (OPCR) in which an operation state and channel information of the selected server device are recorded from the selected server device, and completing connecting to the selected server device by recording the channel information of the selected server device in a register (IPCR) when the read operation state is active and checking the operation state of the selected server device by reading the register (OPCR) at predetermined time intervals when the read operation state is inactive.
    Type: Grant
    Filed: May 6, 1999
    Date of Patent: August 31, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Goan-soo Seong
  • Publication number: 20040158616
    Abstract: A system and method is provided for communicating with at least one network device via a network bus comprising a bus controller and a host computer. The bus controller executes a series of instructions, which can be transferred to the bus controller from the host computer. The instructions are executed in a manner independent of the host computer so as to reduce the workload of the host computer. Since the bus controller can execute the series of instructions without further intervention of the host computer, the host computer can perform other operations concurrent with the execution of the series of instructions by the bus controller. In one embodiment, at least one of the instructions has an associated data field that is variable and can be altered by the host computer, such that the host computer can alter the instruction used by the bus controller.
    Type: Application
    Filed: October 21, 2003
    Publication date: August 12, 2004
    Inventors: Philip J. Ellerbrock, Daniel W. Konz, Marshall Watts
  • Patent number: 6765878
    Abstract: A method for transmitting a data packet is disclosed. First, the size of the data packet is determined. If the size of the data packet is below a predetermined threshold size, then a transmit complete interrupt delay is set to a predetermined time. The packet is transmitted over a network. Finally, upon completing transmission of the data packet, a transmit complete interrupt is sent after waiting the predetermined time.
    Type: Grant
    Filed: March 28, 2000
    Date of Patent: July 20, 2004
    Assignee: Intel Corporation
    Inventor: Kristen Carlson
  • Patent number: 6760838
    Abstract: A method for initializing a computing system comprising a plurality of devices which communicate on a communication link comprising a plurality of independent point-to-point links is provided, each of the point-to-point links interconnecting a respective pair of the plurality of devices. The method includes a link initialization procedure comprising initially configuring each respective pair of devices to communicate on the respective interconnecting link using common communication parameters, including a common frequency and a common link width. The link initialization procedure also may include an optimization procedure for determining maximum communication parameters for each interconnected pair of devices. If the maximum compatible parameters differ from the common parameters for any pair of devices, then the pair of devices may be reconfigured to communicate on the interconnecting link using the maximum compatible parameters.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: July 6, 2004
    Assignees: Advanced Micro Devices, Inc., API NetWorks, Inc.
    Inventors: Jonathan M. Owen, Mark D. Hummel, Derrick R. Meyer
  • Patent number: 6754721
    Abstract: The present invention describes a method for configuring a station connected to a field bus, wherein a logical address is allocated to said station. The method comprises the steps of: transmitting said logical address from an address-allocation unit to said station; transmitting a physical address from said address-allocation unit to said station, said physical address corresponding to an assumed physical position of said station relative to said field bus; verifying said physical address being transmitted to said station based on an actual physical position of said station relative to said field bus; and storing said transmitted logical address in a memory of said station depending on the verification of said physical address.
    Type: Grant
    Filed: January 17, 2002
    Date of Patent: June 22, 2004
    Assignee: Pilz GmbH & Co.
    Inventor: Andreas Heckel
  • Publication number: 20040117511
    Abstract: A processor communication register (PCR) contained within a multiprocessor cluster system provides enhanced processor communication. The PCR stores information that is useful in pipelined or parallel multi-processing. Each processor cluster has exclusive rights to store to a sector within the PCR and has continuous access to read its contents. Each processor cluster updates its exclusive sector within the PCR, instantly allowing all of the other processors within the cluster network to see the change within the PCR data, and bypassing the cache subsystem. Efficiency is enhanced within the processor cluster network by providing processor communications to be immediately networked and transferred into all processors without momentarily restricting access to the information or forcing all the processors to be continually contending for the same cache line, and thereby overwhelming the interconnect and memory system with an endless stream of load, store and invalidate commands.
    Type: Application
    Filed: December 12, 2002
    Publication date: June 17, 2004
    Applicant: International Business Machines Corp.
    Inventors: Ravi Kumar Arimilli, Robert Alan Cargnoni, Derek Edward Williams, Kenneth Lee Wright
  • Publication number: 20040117510
    Abstract: Processor communication registers (PCRs) contained in each processor within a multiprocessor system and interconnected by a specialized bus provides enhanced processor communication. Each PCR stores identical processor communication information that is useful in pipelined or parallel multi-processing. Each processor has exclusive rights to store to a sector within each PCR and has continuous access to read the contents of its own PCR. Each processor updates its exclusive sector within all of the PCRs utilizing communication over the specialized bus, instantly allowing all of the other processors to see the change within the PCR data, and bypassing the cache subsystem.
    Type: Application
    Filed: December 12, 2002
    Publication date: June 17, 2004
    Applicant: International Business Machines Corporation
    Inventors: Ravi Kumar Arimilli, Robert Alan Cargnoni, Derek Edward Williams, Kenneth Lee Wright
  • Publication number: 20040103163
    Abstract: A portable storage device connects to a master computer and a first slave computer through a serial bus interface. The portable storage device contains a non-volatile memory for storing data in the portable storage device, a first slave port for connecting the portable storage device to the first slave computer through the serial bus interface, and a master port for connecting the portable storage device to the master computer through the serial bus interface. The master computer can access data located on the portable storage device and storage apparatuses of the first slave computer and the first slave computer cannot access any data located on the portable storage device and the master computer.
    Type: Application
    Filed: November 27, 2002
    Publication date: May 27, 2004
    Inventors: Hao-Hsing Lin, Jiun-Rung Fang
  • Publication number: 20040103141
    Abstract: Synchronizing a client and server version of a hierarchical data structure having several atomically-editable components. At synchronization time, the server identifies all of the changes that need to occur to the client version in order to properly synchronize the client version of the hierarchical document with the server version. Each of the changes involves edits of one or more of the atomically-editable components of the data structure. The server fragments the synchronization information into multiple messages, and then individually sends the message to the client computing system. The client atomically processes each of the messages. For each change to be made as identified within a single message, the client computing system identifies the atomically-editable components that are involved by the change, and then edits (e.g., inserts, changes, or deletes) the atomically-editable components in a specified manner.
    Type: Application
    Filed: November 19, 2002
    Publication date: May 27, 2004
    Inventors: Quentin S. Miller, Donald J. McNamara, Avner Sander
  • Publication number: 20040103220
    Abstract: A system comprising a first host bus adapter coupled to a first Fibre Channel port and a remote manager associated with a second host bus adapter coupled to a second Fibre Channel port. The remote manager is operable to form a command to be sent by the second host bus adapter to the first host bus adapter via a Common Transport layer of a Fibre Channel.
    Type: Application
    Filed: October 21, 2002
    Publication date: May 27, 2004
    Inventors: Bill Bostick, Bill Daugherty, Minh Bryant, Alan Perelman, Robert H. Nixon, William Lasor
  • Publication number: 20040098514
    Abstract: To determine the network topology of a bus system having a number of bus users positioned on bus segments of a bus line interconnected by at least one diagnosis repeater, an initiating measuring telegram is first sent to each bus user. This telegram is answered by the diagnosis repeater with a data telegram having a segment code and by other bus users with a response telegram. The diagnosis repeater then sends a measuring signal to each responding bus user, which reflects the signal. The distance of the responding bus user from the diagnosis repeater is determined from the time interval between the sending of the measuring signal and the arrival of the reflection signal.
    Type: Application
    Filed: March 28, 2003
    Publication date: May 20, 2004
    Inventor: Armin Schuster
  • Publication number: 20040098510
    Abstract: A software switch for directing network traffic between a network processor and a second network processor that is coupled to the network processor by a bus. The network processor is coupled to a first unidirectional path between two networks in one direction and the second network processor is coupled to a second unidirectional path between two networks in the other direction.
    Type: Application
    Filed: November 15, 2002
    Publication date: May 20, 2004
    Inventors: Peter M. Ewert, Kurt Alstrup
  • Publication number: 20040098513
    Abstract: Two or more electronic devices (1, 3, 4) are connected via a bus system (5), wherein one of the network devices controls (1) other network devices (3, 4). A first control applica-tion is uploaded from a first controlled device to the con-trol device and a second control application is uploaded from a second controlled device into the first control ap-plication. The first and second controlled devices can be operated simultaneously using a single user interface shown on a display of the control device. The user interface of the first device is displayed as main user interface and the user interface of the second device is rendered within the main interface as reduced user interface, which includes only operation elements necessary for operation of the sec-ond device in combination with the first device. The genera-tion of combined user interfaces is also possible when the second controlled device comprises features, which are not known at the production of the first controlled device.
    Type: Application
    Filed: October 6, 2003
    Publication date: May 20, 2004
    Inventors: Ingo Hutter, Thomas Brune
  • Patent number: 6735635
    Abstract: A method and system for adjusting a message preamble on a shared bus, wherein the message preamble includes N synchronization characters, and each of the synchronization characters is separated in time by a random delay interval. First, an activity status is determined for the shared bus in terms of the number of stations that are currently active on the bus. The number of synchronization characters is then adjusted according to the bus activity status. The activity status is also utilized as a dynamic adjustment parameter for the random delay interval that includes a fixed delay term, D, added to a randomly determined delay increment, d. In this manner the message preamble specification is optimized according to real-time network demands, such that latency and data collisions are minimized.
    Type: Grant
    Filed: May 18, 2000
    Date of Patent: May 11, 2004
    Assignee: International Business Machines Corporation
    Inventors: James William Feeney, Jorge R. Rodriquez, Edward Stanley Suffern, Robert William Bartoldus
  • Publication number: 20040083272
    Abstract: The present invention relates to a method and a communications system (1) for the exchange of data between at least two users (2, 3, 4) who are in contact with one another using a bus system (5). The data are included in messages which are transmitted by users (2, 3, 4) over the bus system (5). A specifiable priority is assigned to each message. In order to achieve, in the normal case, a high probability of a short latency period (t) of a message to be transmitted, and to be able to guarantee, in the worst case, a maximum latency period (tmax), it is proposed that the priorities assigned to the messages be dynamically modified during the operation of bus system (5). Preferably, the set of all messages is subdivided into equivalence classes, and a priority is assigned to each equivalence class. During the operation of the bus system (5), the priorities of the messages are dynamically modified within an equivalence class, and the priorities of the equivalence classes are dynamically modified.
    Type: Application
    Filed: December 22, 2003
    Publication date: April 29, 2004
    Inventors: Thomas Fuehrer, Bernd Mueller
  • Publication number: 20040078456
    Abstract: A method and apparatus is provided for serial port redirection using a management controller. A serial controller is selectively coupled with a management controller to facilitate the redirection of serial information. The management controller includes a packetizer to packetize the serial information. The packetized information may be communicated to remote computing devices over a network connection or a management bus. The management controller receives both redirection and non-redirection packets from the communication channel. If the management controller receives redirection packets from a remote computing device, it formats the redirection packets as a stream of serial information and communicates the stream of serial information to the serial controller.
    Type: Application
    Filed: October 17, 2002
    Publication date: April 22, 2004
    Inventors: Barry Kennedy, Thomas M. Slaight, Brett S. Pemble, Thomas William Erdman
  • Publication number: 20040073699
    Abstract: The present invention provides a dynamic routing method for a multistage bus network in a distributed shared memory environment. For performing a forward or backward U-turn routing (FUR or BUR), the forward or backward-turning allowable stage, respectively for FUR or BUR, is compared with a current stage check whether a U-turn is possible in the current stage. If not affirmative, traffic levels of switches in its next or previous stage connected to a switch in the current stage are compared to each other, respectively for FUR or BUR. A switch having the lowest traffic level is selected as a route switch of the next or previous stage, and the next or previous stage is changed to a current stage, respectively for FUR or BUR. The procedure is repeated from the checking step. If affirmative, a U-turn at the current stage is performed, and a backward or forward routing is performed, respectively for FUR or BUR.
    Type: Application
    Filed: March 11, 2003
    Publication date: April 15, 2004
    Inventors: Kang Woon Hong, Heyung Sub Lee, Hyeong Ho Lee
  • Patent number: 6721310
    Abstract: A multiport non-blocking high capacity ATM and packet switch is a single chip switching solution for ATM and packet systems. It is capable of 8×8 switching of 800 Mbit/s per port in both directions. The ports support UTOPIA Level 2 interfaces. The switch is non-blocking and lossless, incorporating a backpressure mechanism for eliminating congestion toward any one port. The switch supports prioritized and variable size cell and packet switching.
    Type: Grant
    Filed: November 2, 2001
    Date of Patent: April 13, 2004
    Assignee: TranSwitch Corporation
    Inventors: Zheng Liu, Jiu An, Terry Xian, Ronald P. Novick
  • Patent number: 6714990
    Abstract: The invention relates to a communicating system comprising a data terminal, a wireless communication device, and data transmission means for setting up a local data transmission connection between the data terminal and the wireless communication device. The data transmission means comprise a data transmission means of the data terminal and a data transmission means of the wireless communication device. The data terminal comprises means for running application software, an application software connection, means for controlling the data transmission means of the data terminal, and a first connection interface for data transmission between the application and the application programming interface. The data transmission system comprises also a data adapter, a second connection interface for data transmission between the application programming interface and the data adapter, and one or several media interfaces for data transmission between the data adapter and the data transmission means of the data terminal.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: March 30, 2004
    Assignee: Nokia Mobile Phones Ltd.
    Inventors: Juha Autio, Veli-Pekka Vatula, Peter Ollikainen
  • Publication number: 20040059838
    Abstract: The invention relates to a network wherein a distributor, particularly an Ethernet switch is used to increase the transfer speed and the volume of transmission active branching elements being connected thereto via the bus line.
    Type: Application
    Filed: October 8, 2003
    Publication date: March 25, 2004
    Inventor: Rainer Schenkyr
  • Publication number: 20040044799
    Abstract: The present invention provides a method, a network device and a system for allowing for resuming a preceding incomplete synchronization session is provided, wherein the preceding incomplete synchronization session has been interrupted during its performing. In principle the resuming of the preceding incomplete synchronization session is based on the following operations according to the inventive concept. A communication connection for synchronization of data between a first and a second device is establishing. The first and the second device comprise each a predefined set of data records to be synchronized. A first and a second update identifier are communicated between the first and the second device. The first update identifier specifies a preceding complete synchronization session having been performed between them and the second update identifier specifies a preceding incomplete synchronization session having been performed between them.
    Type: Application
    Filed: September 3, 2002
    Publication date: March 4, 2004
    Applicant: Nokia Corporation
    Inventors: Ganesh Sivaraman, Riku Mettala
  • Publication number: 20040039835
    Abstract: General purpose control information is transmitted in a serial stream between digital processors.
    Type: Application
    Filed: August 21, 2002
    Publication date: February 26, 2004
    Applicant: Intel Corporation
    Inventors: Scott C. Glenn, Nicholas J. Kohout, Brian R. Mears
  • Publication number: 20040034720
    Abstract: A data transfer control system includes: a port control section which controls ports P1 and P2 respectively connected with an electronic instrument PC1 and an electronic instrument PC2; and a bus reset issue section which issues a bus reset. The port P2 is set to a disabled state, and then the bus reset is issued to cause the electronic instrument PC1 to acquire an access right. The port P2 is set to an enabled state after the bus reset has been issued and the electronic instrument PC1 has acquired the access right. After the electronic instrument PC2 has been detected to be in a suspended state, a resume packet is transferred to the electronic instrument PC2. The port P2 is set to a disabled state after the power for the data transfer control system has been turned on.
    Type: Application
    Filed: July 24, 2003
    Publication date: February 19, 2004
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Shinichiro Fujita, Hiroyuki Kanai, Tomohiro Uchida, Mihiro Nonoyama
  • Publication number: 20040030793
    Abstract: The present invention relates to an information processing apparatus and method that enables apparatuses connected to an IEEE 802 network to communicate with one another. A UPnP control point 1 and a UPnP device 2 are connected with an IEEE 802 network 11. When controlling the UPnP device 2, the UPnP control point 1 describes the content of control based on an AV/C command utilized for IEEE 1394. The command based on SOAP is transmitted to UPnP device 2 via the IEEE 802 network 11. The UPnP device 2 extracts the AV/C command from the command based on SOAP and executes a corresponding process. The present invention can be applied in personal computers.
    Type: Application
    Filed: August 1, 2003
    Publication date: February 12, 2004
    Inventors: Takuro Noda, Makoto Sato, Yukihiko Aoki, Hisato Shima
  • Patent number: 6691150
    Abstract: A device includes a self-information memory to store therein function data for other devices to operate the pertinent device and device name data thereof. Receiving a request from another device for the device name or function data, the device sends the data stored in the self-information memory. When function data is thereafter received, the device executes an instruction indicated by the data. In case where a plurality of devices each including the self-information memory are connected to each other via a bus or the like in a form of a network, at least one of the devices, i.e., a master device includes in addition to the self-information memory a connected device memory to store therein device name data of all of the connected devices and a communication pair memory to store therein function data of the communication partner. The master device requests the other devices for device name data thereof. When the requested data is received, the master device stores the data in the connected device memory.
    Type: Grant
    Filed: April 25, 2000
    Date of Patent: February 10, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Yoshikatsu Yoshino, Tsukasa Hasegawa, Chiyo Akamatsu, Shinichiro Fukushima, Hidefumi Goto
  • Publication number: 20040024942
    Abstract: An expandable multiprocessor computer system is provided incorporating a master computer, control computers and servant computers housed in modular units. Servant computers of the super scalable multiprocessor system act as cells of a singular entity enhancing system performance over conventional individually networked computers. Application information is transported between servant computers by way of a standard ultra high speed primary network as opposed to a specialized ultra high speed back plane. The design of the primary network allows for parallel internal data transfer in single modules, and allows for parallel internal data transfer between multiple modules through the provision of control computers in each module. Administration information is transported between the master computer, control computers and servant computers by way of a secondary network.
    Type: Application
    Filed: February 5, 2001
    Publication date: February 5, 2004
    Applicants: Total Impact, Mitchell Smith
    Inventors: Mitchell Smith, Karsten Jeppesen
  • Publication number: 20040019705
    Abstract: In a system and method for backing up user data of a first hardcopy device in a second hardcopy device, the user data in the first hardcopy device is identified. The second hardcopy device is identified, and the user data from the first hardcopy device is copied into a storage of the second hardcopy device. The user data enables the second hardcopy device to operate in the same manner as the first hardcopy device.
    Type: Application
    Filed: July 22, 2002
    Publication date: January 29, 2004
    Applicant: TOSHIBA TEC KABUSHIKI KAISHA
    Inventor: Kaori Ogura
  • Patent number: 6684271
    Abstract: The present invention allows preloading of channel context in advance of actual channel change in a digital communication system. The system uses a channel identification signal to identify the present channel number of data on a data bus. Before the actual change in channel, a future channel number is inserted into the channel identification signal. Another signal is used to indicate the location of the future channel number in the channel identification signal. As a result, the system is able to know in advance the new channel number. The corresponding context can be loaded before the arrival of the new channel data.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: January 27, 2004
    Assignee: Xilinx, Inc.
    Inventor: Kent Blair Dahlgren
  • Publication number: 20040010627
    Abstract: An Ethernet interface device, and associated system and method, for reporting the status information data of Ethernet devices through common industrial protocols. The Ethernet interface device provides operational connections between one or more Ethernet devices and one or more independent networks. The Ethernet interface device also monitors an Ethernet connection path, and produces status data indicative of the operational status of the connection path and the devices connected along the path. This status data is received by the Ethernet interface device, where it is manipulated into a format recognizable by common industrial protocols.
    Type: Application
    Filed: July 15, 2002
    Publication date: January 15, 2004
    Inventors: David G. Ellis, Steve A. Schoenberg
  • Publication number: 20040003128
    Abstract: Data values being stored and transferred within a data processing system 8 have a selectable representation, such as true and complement, as indicated by an accompanying representation specifying bit. This assists in obscuring the operation and the power signature of the device in a manner that improves security.
    Type: Application
    Filed: June 26, 2002
    Publication date: January 1, 2004
    Inventor: Simon Charles Watt
  • Patent number: 6671712
    Abstract: A data processing system includes a plurality of nodes, which each contain at least one agent, and data storage accessible to agents within the nodes. The plurality of nodes are coupled by a non-hierarchical interconnect including multiple non-blocking uni-directional address channels and at least one uni-directional data channel. The agents, which are each coupled to and snoop transactions on all of the plurality of address channels, can only issue transactions on an associated address channel. The uni-directional channels employed by the present non-hierarchical interconnect architecture permit high frequency pumped operation not possible with conventional bi-directional shared system buses. In addition, access latencies to remote (cache or main) memory incurred following local cache misses are greatly reduced as compared with conventional hierarchical systems because of the absence of inter-level (e.g., bus acquisition) communication latency.
    Type: Grant
    Filed: November 9, 1999
    Date of Patent: December 30, 2003
    Assignee: International Business Machines Corporation
    Inventors: Ravi Kumar Arimilli, James Stephen Fields, Jr., Guy Lynn Guthrie, Jody Bern Joyner, Jerry Don Lewis
  • Publication number: 20030236920
    Abstract: A multi-service platform system (100, 200) including a VMEbus network (102) and a switched fabric network (104) wherein the VMEbus network (102) and the switched fabric network (104) operate concurrently within the multi-service platform system (100, 200). Multi-service platform system (100, 200) can include a payload module (106) with a first switched fabric connector (210) in a P0 mechanical envelope (218) that is designed to interface with a corresponding first switched fabric connector (212) in the J0 mechanical envelope (220) on a backplane (204).
    Type: Application
    Filed: June 24, 2002
    Publication date: December 25, 2003
    Inventors: Jeffrey M. Harris, Robert Tufford
  • Patent number: 6667988
    Abstract: A system and method for multi-level context switching in an electronic network comprises a control state machine configured to implement a data priority scheme, a return address generator configured to hold and release return addresses for interrupted instruction modules in accordance with the data priority scheme and context information from the electronic network, and a processor configured to process data from the electronic network in accordance with the data priority scheme and the context information. Receive registers stores data received from the electronic network. The control state machine includes a switch address generator and a program counter select. The switch address generator outputs a switch address, which is an address for a first instruction for a selected-context instruction module. The return address generator holds and releases the return addresses, which are addresses of next consecutive instructions, when an instruction module is interrupted for a context switch.
    Type: Grant
    Filed: August 14, 2000
    Date of Patent: December 23, 2003
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventors: Jung-Jen Liu, Scott Smyers, Bruce A. Fairman, Steve Pham, Jose L. Diaz, Richard A. Bardini
  • Publication number: 20030229721
    Abstract: A mechanism for viewing fixed addresses in a multi-processor system configurable to provide multiple logical partitions. The techniques permit multiple partitions by mapping the fixed range of system addresses into multiple virtual addresses viewable by respective port agents. By providing one or more virtual address ranges for each port, the physical addresses of the system are abstracted from the view of the port agents.
    Type: Application
    Filed: June 5, 2002
    Publication date: December 11, 2003
    Inventors: Thomas J. Bonola, John M. MacLaren
  • Publication number: 20030229720
    Abstract: A heterogeneous-network switch comprises a number of different-type media access controllers (MAC's) each respectively for connection to otherwise incompatible computer networks. An incoming data bus is connected to collect datapackets from each of the different-type MAC's. An outgoing data bus is connected to distribute datapackets to each of the different-type MAC's. And, a traffic shaping cell (TSCELL) having an input connected to the incoming data bus and an output connected to the outgoing data bus, provides for traffic control of said datapackets according to a bandwidth capacity limit of a corresponding one of said otherwise incompatible computer networks to receive them. The switch is based on a class-based queue traffic shaper that enforces multiple service-level agreement policies on individual connection sessions by limiting the maximum data throughput for each connection.
    Type: Application
    Filed: June 5, 2002
    Publication date: December 11, 2003
    Applicant: Amplify. Net, Inc.
    Inventors: Frederick Kiremidjian, Li-Ho Raymond Hou
  • Patent number: 6657999
    Abstract: A network configuration (10) including a first network medium which is a 1394 network as well as a second network medium. Each of the first and second network media is coupled to a corresponding plurality of host-computers (H1 through H3 and H5 through H7). The network configuration further includes a link layer gateway computer (H4) coupled to both. the first network medium and the second network medium. The link layer gateway computer is operable to communicate a data packet from a source host computer selected from one of the plurality of host computers coupled to the first network medium to a destination host computer selected from one of the plurality of host computers coupled to the second network medium.
    Type: Grant
    Filed: March 31, 1997
    Date of Patent: December 2, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: Jason M. Brewer
  • Publication number: 20030221019
    Abstract: A data server for use in networks where media data are transmitted in packet form comprises at least one card shelf containing at least a bus controller card, a plurality of media processor cards, and a backplane. The backplane has a plurality of media buses, which carry data in packet form among the cards installed on the shelf. Each card has at least one bidirectional port with its own unique identity, and each bidirectional port outputs flow control information as to whether that port can or cannot accept packets of data that are intended to be sent to it, as well as transmit requests to transmit packets of data from that port. Each card outputs flow control information for each bus. A bus arbiter reviews each request to transmit and each flow control message, and grants requests to transmit media data packets only when the intended destination address is free to receive a media data packet over a free bus.
    Type: Application
    Filed: May 24, 2002
    Publication date: November 27, 2003
    Inventors: Andrew M. Fussell, Paul Robert Russell
  • Publication number: 20030221042
    Abstract: A frame grabber with switched fabric interface where in varying embodiments the fabric interface may be one of InfiniBand, Star Fabric, or PCI Express or the like.
    Type: Application
    Filed: April 25, 2003
    Publication date: November 27, 2003
    Applicant: August Technology Corp.
    Inventors: Cory M. Watkins, Mark R. Harless
  • Publication number: 20030221041
    Abstract: A sensor, camera or imager with on-chip switched fabric interface where in varying embodiments the fabric interface may be one of InfiniBand, StarFabric, or PCI Express.
    Type: Application
    Filed: April 25, 2003
    Publication date: November 27, 2003
    Applicant: August Technology Corp.
    Inventor: Cory M. Watkins
  • Patent number: 6647446
    Abstract: A method and system for using a new bus identifier in an interconnect, and the interconnect including a plurality of nodes and at least one bus bridge. A configuration change is determined on the first bus connected to the plurality of nodes. Each node has a corresponding bus identifier. A new bus identifier is assigned for each node having a changed state if a configuration change is determined on the first bus.
    Type: Grant
    Filed: March 18, 2000
    Date of Patent: November 11, 2003
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventors: David V. James, Bruce Fairman, David Hunter, Hisato Shima
  • Publication number: 20030208627
    Abstract: A handheld computing device is used to copy files from the screen of a fixed computer. The display of the handheld device is linked to that of the underlying computer and file and directory icons together with their underlying files are copied to the handheld device. Files from the handheld device can also be transferred to the fixed computer. When a user is running a program on the fixed computer, he may capture the state of that computer and transfer everything needed to permit execution of that program to continue uninterrupted on the handheld device. Thus files and executing programs may be lifted from the fixed computer and used on the handheld device.
    Type: Application
    Filed: October 30, 2001
    Publication date: November 6, 2003
    Applicant: SUN MICROSYSTEMS, INC.
    Inventor: Bruce Tognazzini
  • Publication number: 20030200345
    Abstract: A system and method for using a shared bus to control a keyboard, video, and mouse (KVM) output is disclosed. The system may include a mid-plane having a video bus. At least one server module, including a video output module, may be placed in communications with the video bus. The video output module may transmit a video signal over the bus and receives a control signal over the bus. A management module may also be placed in communications with the video bus. The management module may receive the video signal from the server module via the bus and provide a control signal through the video bus to each server module. The control signal may activate or deactivate the video output module on each server module.
    Type: Application
    Filed: April 17, 2002
    Publication date: October 23, 2003
    Applicant: DELL PRODUCTS L.P.
    Inventors: Scott M. Ramsey, Michael W. Kolb, Jinsaku Masuyama
  • Publication number: 20030200346
    Abstract: In some embodiments, a first conducting line, having a characteristic impedance, connects to a digital device while a second conducting line, also having a characteristic impedance, connects to another digital device. An impedance pathway connects the two conducting lines and has an impedance of at least one-third of the first conducting line's characteristic impedance and of at least one-third of the second conducting line's characteristic impedances. Other embodiments are claimed.
    Type: Application
    Filed: April 19, 2002
    Publication date: October 23, 2003
    Inventors: Rajeevan Amirtharajah, John R. Benham, John L. Critchlow, Thomas D. Simon, Mark E. Naylor
  • Publication number: 20030195939
    Abstract: A conditional read and invalidate operation for use in coherent multiprocessor systems is disclosed. A conditional read and invalidate request may be sent via an interconnection network from a first processor that requires exclusive access to a cache block to a second processor that requires exclusive access to the cache block. Data associated with the cache block may be sent from the second processor to the first processor in response to the conditional read and invalidate request and a determination that the cache block is associated with a state of a cache coherency protocol.
    Type: Application
    Filed: April 16, 2002
    Publication date: October 16, 2003
    Inventors: Samatha J. Edirisooriya, Sujat Jamil, David E. Miner, R. Frank O'Bleness, Steven J. Tu, Hang T. Nguyen