Address Data Transfer Patents (Class 710/4)
  • Publication number: 20130103857
    Abstract: A data transfer apparatus includes an acquisition unit configured to acquire a first list indicating arrangement information of transfer source data, a second list indicating arrangement information of transfer destination data, a third list indicating arrangement information of data to be inserted, and a fourth list which includes a deletion offset address indicating a deletion start position and a data size of data to be deleted; a control unit configured to select a necessary list from the first to fourth lists, and generate data to be transferred from a transfer source to a transfer destination; and a transfer unit configured to transfer the data to the transfer destination.
    Type: Application
    Filed: October 2, 2012
    Publication date: April 25, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: CANON KABUSHIKI KAISHA
  • Publication number: 20130103858
    Abstract: A method of performing an input/output (I/O) processing operation includes: generating at least one address control word (ACW) specifying one or more host memory locations for transfer of data between a host computer system and a control unit, and storing the at least one ACW in the local channel memory; generating an address control structure for each data transfer specified by the I/O operation and forwarding each address control structure from the at least one channel to the network interface; forwarding an I/O command message to the at least one I/O device via a network interface; receiving a data transfer request from the network interface that includes the address control structure; and routing the data to at least one host memory location specified by the corresponding ACW or routing the data from a host memory location specified by the ACW to the network interface.
    Type: Application
    Filed: November 8, 2012
    Publication date: April 25, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: International Business Machines Corporation
  • Patent number: 8427691
    Abstract: An image forming apparatus and method of controlling the same, the image forming apparatus including: an article of consumption including a memory; and a print controller to perform a memory access to read and/or to write data from/to the memory. Addresses for the memory of the article of consumption are changed using access counts updated each time a memory access is requested, so that the memory access can be performed according to the changed addresses.
    Type: Grant
    Filed: August 12, 2008
    Date of Patent: April 23, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Tae Hong Jang
  • Patent number: 8429311
    Abstract: A process is provided for transferring a first sequence control and/or first data into a first control device and a second sequence control and/or second data into a second control device in a motor vehicle. The transfer is carried out by way of a first data bus while using a first transmission protocol which has a data frame with a predetermined frame format or message format, and the transfer as a whole takes place by the transmission of a plurality of data frames. In a first step, by way of a first data frame, a portion of the first sequence control and/or of the first data is transmitted to the first control device. In a second step, by way of the second data frame, a portion of the second sequence control and/or of the second data is transmitted to the second control device.
    Type: Grant
    Filed: September 2, 2009
    Date of Patent: April 23, 2013
    Assignee: Bayerische Motoren Werke Aktiengesellschaft
    Inventors: Thomas Koenigseder, Martin Baumgartner, Mohamed Majdoub
  • Patent number: 8429307
    Abstract: This invention is a system and a method for operating a storage server that provides read or write access to a data in a data network using a new architecture. The method of processing I/Os in response to a request by a client of the storage server executes one or more services communicated by a policy engine. The I/Os received from the application are tagged and catalogued to create co-related I/O patterns. The policy engine is then updated with the results of processing the I/Os after executing services on those I/Os.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: April 23, 2013
    Assignee: EMC Corporation
    Inventors: Sorin Faibish, Philippe Armangau, Christopher Seibel
  • Publication number: 20130091307
    Abstract: The present disclosure includes systems and techniques relating to effectively increasing a command queue length for accessing storage, such as by increasing the Queuing Depth (Q-Depth) of Native Command Queuing (NCQ) Commands. In some implementations, a method can comprise receiving a first command to access a first memory location of a storage device; receiving a second command to access a second memory location of a storage device; constructing a consolidated command including a memory address and a data transfer count associated with each of the first command and the second command; constructing an information command having consolidation information about the consolidated command; and communicating the information command and the consolidated command to the storage device for processing by the storage device.
    Type: Application
    Filed: October 4, 2012
    Publication date: April 11, 2013
    Applicant: MARVELL WORLD TRADE LTD.
    Inventor: MARVELL WORLD TRADE LTD.
  • Patent number: 8417835
    Abstract: There is provided an apparatus including a plurality of modules. Each module includes a storage unit configured to store a waiting ID and a specific ID of the module, a communication unit configured to transmit and receive packets to and from a bus, and a processing unit configured to process data of a packet which includes a valid flag indicating that the packet is valid, wherein the communication unit takes in data held by a packet which has an ID that coincides with the waiting ID, and stores the processed data in a packet which includes the valid flag indicating invalid and an ID coincident with the specific ID, and transmits the packet.
    Type: Grant
    Filed: April 5, 2010
    Date of Patent: April 9, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Michiaki Takasaka, Hisashi Ishikawa
  • Patent number: 8407383
    Abstract: A system and method for a establishing a data connection between peripherals through a global computer network. The global computer network having at least two computerized addressable stations connected to a network, and each of the stations including at least one input and at least one output. A computerized server with a storage assembly with software that includes sufficient data and instructions to communicate with the stations to keep a database with information of the station's peripheral resources updated. Each station includes a service software that initiates upon booting the station and keeps track of the peripheral resources and assigned address (ex. IP address) for periodically updating the server's database with changes. Users with friendly interfaces have access to the subscribed stations and their resources as requested and target stations.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: March 26, 2013
    Inventors: Mauricio De Souza, Sergio Vargas De Souza
  • Patent number: 8392620
    Abstract: An accelerated access apparatus and reading and writing methods thereof are described. A processing unit is used to determine whether the continuation state of a plurality of first address parameters of first request signals. Each first request signal has a first address length. When the first address parameters are continuous thereamong, the processing unit converts one of the second request signals into a second reading command which has a second reading address and a second reading address length. The second reading address length is greater than one of the first address lengths. The processing unit executes the second reading command to read data content to be stored in a buffer unit based on the second reading address and the second reading address length for responding to the second request signals.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: March 5, 2013
    Assignee: Genesys Logic, Inc.
    Inventor: Jin-min Lin
  • Patent number: 8392619
    Abstract: Systems, methods and computer program products for providing indirect data addressing at an I/O subsystem of an I/O processing system. The computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes receiving a control word for an I/O operation. The control word includes an indirect data address for data associated with the I/O operation. The indirect data address includes a starting location of a list of storage addresses that collectively specify the data, the list spans two or more non-contiguous storage locations. Data is gathered responsive to the list. The gathered data is transmitted to a control unit in the I/O processing system.
    Type: Grant
    Filed: February 10, 2011
    Date of Patent: March 5, 2013
    Assignee: International Business Machines Corporation
    Inventors: Daniel F. Casper, Mark P. Bendyk, John R. Flanagan, Catherine C. Huang, Matthew J. Kalos, Ugochukwu C. Njoku, Dale F. Riedy, Gustav E. Sittmann, Harry M. Yudenfriend
  • Patent number: 8385061
    Abstract: The present invention is a system for implementing a meta-disk aggregation model for storage controllers. The system includes a storage controller configured for communicatively coupling with a server. The system further includes a meta-disk drive group having a plurality of disk drives, the meta-disk drive group configured for being communicatively coupled with the storage controller, each of the plurality of disk drives including a drive interface connector. Additionally, each drive interface connector of the plurality of disk drives of the meta-disk drive group is configured for being communicatively coupled to each of the remaining drive interface connectors of the plurality of disk drives, thereby allowing the plurality of disk drives to communicate as a single device with the storage controller.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: February 26, 2013
    Assignee: LSI Corporation
    Inventors: Sridhar Balasubramanian, Kenneth Hass
  • Publication number: 20130046905
    Abstract: A method of performing an input/output (I/O) processing operation includes obtaining information relating to an I/O operation at a channel subsystem in the host computer system, the channel subsystem including at least one channel having a channel processor and a local channel memory, generating addressing information and forwarding the addressing information to a network interface between the channel subsystem and at least one I/O device, the addressing information specifying a location in the local channel memory. The method also includes forwarding an I/O command message to the at least one I/O device via the network interface, receiving a data transfer request from the network interface that includes the addressing information, accessing one of a plurality of address control words (ACWs), each ACW specifying an address of a location in a host computer memory, and routing the data transfer request to the host memory location specified in the ACW.
    Type: Application
    Filed: October 22, 2012
    Publication date: February 21, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: International Business Machines Corporation
  • Patent number: 8380884
    Abstract: The present invention includes an adaptable high-performance node (RXN) with several features that enable it to provide high performance along with adaptability. A preferred embodiment of the RXN includes a run-time configurable data path and control path. The RXN supports multi-precision arithmetic including 8, 16, 24, and 32 bit codes. Data flow can be reconfigured to minimize register accesses for different operations. For example, multiply-accumulate operations can be performed with minimal, or no, register stores by reconfiguration of the data path. Predetermined kernels can be configured during a setup phase so that the RXN can efficiently execute, e.g., Discrete Cosine Transform (DCT), Fast-Fourier Transform (FFT) and other operations. Other features are provided.
    Type: Grant
    Filed: March 7, 2011
    Date of Patent: February 19, 2013
    Assignee: Altera Corporation
    Inventor: Amit Ramchandran
  • Publication number: 20130031275
    Abstract: In one implementation, a pairing device provides an identify instruction to a peripheral device during a pairing process. The peripheral device generates an identification output in response to the identify instruction.
    Type: Application
    Filed: July 29, 2011
    Publication date: January 31, 2013
    Inventor: David H. Hanes
  • Patent number: 8346977
    Abstract: According to one aspect there is disclosed an apparatus. The apparatus may include a first device.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: January 1, 2013
    Assignee: O2Micro International Limited
    Inventors: Xiaojun Zeng, Kaiya Sheng
  • Patent number: 8335229
    Abstract: In some embodiments, a method for supporting multiple devices on a high speed physical link may be described. An embedded device may assert a link request pin to request to transmit data on a multi-point communications link that may serve a plurality of embedded devices. A controlling device may receive the link request signal. When the controlling device finishes sending data on the link, it may address the plurality of embedded devices in a round robin format and may determine which device asserted the link request pin. The embedded device that asserted the link request pin may send an acknowledgement signal to the controlling device when it is addressed.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: December 18, 2012
    Assignee: Marvell International Ltd.
    Inventors: Peter D. Mueller, Mark N. Fullerton, Nir Nossenson
  • Patent number: 8332375
    Abstract: A method for moving files from one storage location to another, includes: receiving a request from a user to access a file; copying the file from a first storage element to a second storage element in response to the request, wherein the second storage element provides access to files at a higher rate than that provided by the first storage element; automatically determining whether a demand for the file exists; and automatically maintaining a copy of the file stored in the second storage element if the demand exists; otherwise automatically deleting the copy of the file stored in the second storage element.
    Type: Grant
    Filed: August 27, 2008
    Date of Patent: December 11, 2012
    Assignee: Nirvanix, Inc.
    Inventors: Scott P. Chatley, J. Gabriel Gallagher
  • Patent number: 8327038
    Abstract: A system, apparatus and a method to connect at least two items of equipment, a first item of equipment having a first confidentiality level and a second item of equipment having a second confidentiality level, the two items of equipment in communication with equipment external to the system through the use of a protocol wherein the system includes at least: a medium allowing the transmission of data between the first and second items of equipment; an interface between the medium and the first item of equipment; an interface between the medium and the second item of equipment; first module to allow a first monodirectional adaptation of the protocol and to allow the transmission of data monodirectionally; and a second module to allow a second monodirectional adaptation of the protocol and to allow a reception of the data monodirectionally from the first module.
    Type: Grant
    Filed: October 5, 2007
    Date of Patent: December 4, 2012
    Assignee: Thales
    Inventors: Fabien Alcouffe, Eric Weber, Antoine Quentin
  • Patent number: 8321499
    Abstract: A method for controlling a user station configured for communications with a multiplicity of independently-operated data sources via a non-proprietary network includes steps for providing a user interface to enable a user at the user station to select multiple ones of the multiplicity of independently-operated data object sources to be polled; automatically polling each of the selected data object sources in order to determine availability of desired data at each of the selected data object sources; and automatically transporting desired data determined to be available from each of the selected data object sources to the user station. Software and a user station for implementing the method are also described.
    Type: Grant
    Filed: June 8, 2007
    Date of Patent: November 27, 2012
    Assignee: Intellectual Ventures I LLC
    Inventor: Richard R. Reisman
  • Patent number: 8312189
    Abstract: A computer program product, an apparatus, and a method for processing communications between a control unit and a channel subsystem in an input/output processing system are provided. The computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes: sending a command from the channel subsystem to the control unit to initiate an input/output operation; setting a time period for completion of the operation; and responsive to the operation not completing within the time period, sending a message to determine whether the control unit has an exchange open for the command.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: November 13, 2012
    Assignee: International Business Machines Corporation
    Inventors: Daniel F. Casper, John R. Flanagan, Catherine C. Huang, Matthew J. Kalos, Louis W. Ricci
  • Publication number: 20120284430
    Abstract: A communication device includes a receiver, a command supplying device, an information transmitter, and a web-page transmitter. The receiver receives requests from an external device. The command supplying device determines that a request including a first address including a specific host name is a first request. The command supplying device transmits a command, including an instruction to transmit a second request, to the external device when the first request is received. The command supplying device determines that a request including a second address including a specific IP address is a second request. The information transmitter transmits information to the external device when the second request is received. A combination of the specific IP address and a cookie is stored on the external device when the information is received. The web-page transmitter transmits web page data to the external device when the second request is received.
    Type: Application
    Filed: March 27, 2012
    Publication date: November 8, 2012
    Applicant: BROTHER KOGYO KABUSHIKI KAISHA
    Inventor: Naoki OTSUKA
  • Patent number: 8291125
    Abstract: Systems and methods for a mass storage device attached to a host device use speculation about the host command likely to be received next from the host device based on a previously received command to improve throughput of accesses to the mass storage device. Host commands are used to speculatively produce commands for data storage devices of the mass storage device, such that host commands speculated as being likely next can be started during idle time of the data storage devices, based upon the probability that the speculation will be correct some of the time, and otherwise wasted idle time will be more efficiently used. Time taken by the host device to produce successive commands to the mass storage system is monitored, and future speculatively produced commands are parameterized to complete within the observed host time to produce new commands, making more efficient use of the data storage devices.
    Type: Grant
    Filed: February 16, 2011
    Date of Patent: October 16, 2012
    Assignee: SMSC Holdings S.a.r.l.
    Inventors: Gideon David Intrater, Biao Jia, Teck Huat Kerk, Qing Yun Li
  • Patent number: 8285882
    Abstract: An output apparatus includes an IP-address setting unit, a setting change detection unit, and a notification information creation unit. The IP-address setting unit sets an IP address of the output apparatus. The setting change detection unit detects a change in the setting of the IP-address setting unit. The notification information creation unit creates information that will be notified to a device that satisfies predetermined conditions upon detection of the setting change by the setting change detection unit.
    Type: Grant
    Filed: February 1, 2010
    Date of Patent: October 9, 2012
    Assignee: Seiko Epson Corporation
    Inventor: Eiji Takagi
  • Patent number: 8255476
    Abstract: A method and system for automatically sharing a tape drive in a heterogeneous computing environment that includes a first computer and second computer. The first computer receives a message that includes a shared tape drive identifier, a source port identifier of the second computer, and a reservation status change for the tape drive. Based on the tape drive identifier, the first computer determines that the tape drive is connected to the first computer. The source port identifier is determined to not identify any host bus adapter installed in the first computer. In response to the first computer determining that the reservation status change indicates a reservation or a release of the tape drive for the second computer, the first computer sets the tape drive offline or online, respectively, in an application executing in the first computer.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: August 28, 2012
    Assignee: International Business Machines Corporation
    Inventors: Nils Haustein, Leonard George Jesionowski, Wolfgang Muelller-Friedt, Ulf Troppens
  • Patent number: 8230079
    Abstract: A method for communicating video data between at least a first host and a second host comprises: identifying, at a server, an address of the first host, to which the second host may communicate video data, and a sequence number expected by a network security system coupled between the first host and the server; and communicating, from the second host to the first host, video data using the address of the first host and the sequence number expected. The method may further comprise: identifying, at the server, an address of the second host, to which the first host may communicate video data, and a second sequence number expected by a network security system coupled between the second host and the server; and communicating, from the first host to the second host, video data using the address of the second host and the second expected sequence number. The second host may be adapted to perform the act of communicating without use of an intermediate server.
    Type: Grant
    Filed: December 28, 2010
    Date of Patent: July 24, 2012
    Assignee: Logitech Europe S.A.
    Inventors: Aron Rosenberg, Jeffrey Wilson
  • Patent number: 8230110
    Abstract: In general, techniques are described for performing work conserving packet scheduling in network devices. For example, a network device comprising queues that store packets and a control unit may implement these techniques. The control unit stores data defining hierarchically-ordered nodes, which include leaf nodes from which one or more of the queues depend. The control unit executes first and second dequeue operations concurrently to traverse the hierarchically-ordered nodes and schedule processing of packets stored to the queues. During execution, the first dequeue operation masks at least one of the selected ones of the leaf nodes from which one of the queues depends based on scheduling data stored by the control unit. The scheduling data indicates valid child node counts in some instances. The masking occurs to exclude the node from consideration by the second dequeue operation concurrently executing with the first dequeue operation, which may preserve work in certain instances.
    Type: Grant
    Filed: July 13, 2010
    Date of Patent: July 24, 2012
    Assignee: Juniper Networks, Inc.
    Inventors: Srihari Vegesna, Sarin Thomas
  • Patent number: 8205017
    Abstract: This is generally directed to systems and methods for control of two or more devices through a shared control bus. For example, the devices can be coupled to a host system through the control bus. In some embodiments, the devices can be configured by the host system through address select pins of the devices. For example, the host system can sequentially program each device to change its default address to a unique address. In some embodiments, an event can be propagated through each device, thus resulting in each device receiving the event at a different time. In some embodiments, configuration by the host system can include programming each device with a value representing its own position in the chain. In this case, a device can use this value to delay its response to the event, thereby allowing all the devices in the chain to respond to the event simultaneously.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: June 19, 2012
    Assignee: Aptina Imaging Corporation
    Inventors: Ian Parr, Neal Crook
  • Patent number: 8200852
    Abstract: Methods and systems are described for utilizing multi-mode dongles with peripheral devices. The multi-mode dongles are configured to provide standard mode signals for a standard mode of operation and alternate mode signals for an alternate mode of operation, for example, where a host information handling system is unable to provide the alternate mode signals to the peripheral device. The multi-mode dongle receives mode control signals from a host information handling system and automatically switches from a standard mode of operation to an alternate mode of operation, where the alternate mode signals are provided to the peripheral device, based upon the mode control signals. In one embodiment, the multi-mode dongle can be configured for a universal serial bus (USB) port, and the alternate mode signals can be associated with charging a consumer electronics (CE) device.
    Type: Grant
    Filed: October 9, 2009
    Date of Patent: June 12, 2012
    Assignee: Dell Products, L.P.
    Inventors: Chin-Jui Liu, Bo Hom, Hsien-Tsung Lin
  • Patent number: 8200888
    Abstract: Methods and apparatuses for delaying execution of input/output (I/O) requests for solid state drives are contemplated. Some embodiments comprise receiving I/O requests for a solid state drive and calculating amounts of time based on characteristics of the requests, such as differences of the logical block addresses (LBAs) of the requests. The embodiments may then delay responses by the solid state drive for the requests. Calculating the amounts of time and delaying the responses by the amounts of time may allow the solid state drives to emulate the responses of various types of hard disk drives. Some embodiments comprise an apparatus for delaying execution of the I/O requests for solid state drives. The apparatuses may have numerous modules, such as a request receiver to receive the I/O requests, a calculation module to calculate the amounts of delay times, and a delay module to delay the responses of the I/O requests.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: June 12, 2012
    Assignee: Intel Corporation
    Inventor: Svanhild Simonson
  • Publication number: 20120144069
    Abstract: A method includes addressing, through a command generated by an application executing on a computing platform, one or more device(s) in storage communication with the computing platform based on an appropriate communication link. The method also includes accessing, based on the addressing, a physical register of the one or more device(s) through an appropriate interface therein. Further, the method includes obtaining statistical information associated with a performance of the one or more device(s) at the computing platform through the access of the physical register.
    Type: Application
    Filed: December 2, 2010
    Publication date: June 7, 2012
    Applicant: LSI Corporation
    Inventors: Ming-Jen Wang, Terry Russell Gibbons
  • Patent number: 8190783
    Abstract: Architecture that allows programmatic association of devices to sessions and redirects input to the desired session. When the solution is active, input from the devices is not realized by the standard operating system input stack, thereby allowing even reserved key sequences such as Ctrl-Alt-Del to be intercepted and redirected to a desired session. Moreover, in addition to redirecting input to a specific session, the architecture facilitates the filtering of input from unwanted/unmapped devices, the interception and filtering or redirection of reserved key sequences such as Ctrl-Alt-Del, and the maintenance of input state for each session.
    Type: Grant
    Filed: May 4, 2010
    Date of Patent: May 29, 2012
    Assignee: Microsoft Corporation
    Inventors: Robert C. Elmer, David J. Sebesta, Jack Creasey
  • Publication number: 20120131227
    Abstract: A serial peripheral interface of an integrated circuit including multiple pins is provided. The pins are coupled to the integrated circuit. The integrated circuit receives an instruction through only one of the plurality of pins. The integrated circuit receives an address through the plurality of pins. The integrated circuit sends a read out data through the plurality of pins.
    Type: Application
    Filed: January 31, 2012
    Publication date: May 24, 2012
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yu-Lan Kuo, Chun-Hsiung Hung
  • Publication number: 20120102235
    Abstract: The invention relates to a method for allocating an operating address to an operating device for luminous means, in which the operating address is transmitted to the operating device in digitally coded form via an interface which is configured to connect a light sensor. The operating address is allocated by a user using a handheld device to transmit optical digital signals to a light sensor or infrared sensor which is connected to the interface.
    Type: Application
    Filed: July 23, 2009
    Publication date: April 26, 2012
    Applicant: TRIDONIC GMBH & CO.KG
    Inventors: Patrick Zueger, Andre Mitterbacher, Reto Sprenger, Markus Kuenzli, Reinhard Boeckle, Roger Kistler
  • Patent number: 8166337
    Abstract: Relating with board numbers of the boards mounted with the logic circuits and mounted places on the boards and in relation to log information to be collected from the logic circuits, analysis information describing information to be processed when the log information is generated, information of a condition for which the log information is to be valid, and information of a condition for which the log information is to be invalid are defined for analyzing failures using the analysis information based on the logic circuits. Upon the realization of the failure analysis based on the logic circuits, the analysis information further describes information of the priority of the log information to realize a thorough analysis of critical failures.
    Type: Grant
    Filed: August 26, 2008
    Date of Patent: April 24, 2012
    Assignee: Fujitsu Limited
    Inventor: Masato Nakagawa
  • Patent number: 8151012
    Abstract: Methods, apparatuses and systems to decrease the energy consumption of a memory chip while increasing its effect bandwidth during the execution of any workload. Methods, apparatuses and systems may allow a memory chip utilize a plurality of virtual row buffers to respond to requests for data included in a memory array block. Methods, apparatuses and systems may further eliminate or reduce the cost associated with transferring unnecessary data from a memory array block to row buffers by altering the data transfer size between a memory array block and a row buffer.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: April 3, 2012
    Assignee: Intel Corporation
    Inventors: Changkyu Kim, Albert Lin, Christopher J. Hughes, Anthony-Trung D. Nguyen, Yen-Kuang Chen, Zeshan A. Chishti, Bryan K. Casper
  • Patent number: 8151015
    Abstract: Disclosed herein is an information processing apparatus that transfers information, using direct memory access (DMA), between a first storage section in an information processing system and a second storage section in an information transfer system. The information processing system includes the first storage section for storing the information, and a control section. The information transfer system includes: the second storage section for storing descriptor information indicating the location at which the information is stored in the first storage section and the size of the information; and a DMA transfer section for DMA transferring the information between the first storage section and the second storage section based on the descriptor information. The DMA transfer section DMA transfers the descriptor information concerning the DMA transferred information from the second storage section to the first storage section. The control section loads the descriptor information from the first storage section.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: April 3, 2012
    Assignee: Sony Corporation
    Inventors: Tsuyoshi Kano, Mitsuki Hinosugi, Masato Kajimoto, Yoichi Mizutani
  • Patent number: 8131883
    Abstract: A method for controlling a user station configured for communications with a multiplicity of independently-operated data sources via a non-proprietary network includes steps for providing a user interface to enable a user at the user station to select multiple ones of the multiplicity of independently-operated data object sources to be polled; automatically polling each of the selected data object sources in order to determine availability of desired data at each of the selected data object sources; and automatically transporting desired data determined to be available from each of the selected data object sources to the user station. Software and a user station for implementing the method are also described.
    Type: Grant
    Filed: April 20, 2000
    Date of Patent: March 6, 2012
    Assignee: Intellectual Ventures I, Limited Liability Company
    Inventor: Richard R. Reisman
  • Patent number: 8117350
    Abstract: The described embodiments provide a system for accessing values for configuration space registers (CSRs). This system includes a CSR data storage mechanism with an address input and a CSR data output. The CSR data storage mechanism includes a memory containing a number of memory locations for storing the true or actual values for CSRs for functions for corresponding devices. In these embodiments, the memory locations are divided into at least one shared region and at least one unique region. In these embodiments, in response to receiving an address for a memory location on the address input, the CSR data storage mechanism accesses the value for the CSR in the memory location in a corresponding shared region or unique region.
    Type: Grant
    Filed: November 3, 2009
    Date of Patent: February 14, 2012
    Assignee: Oracle America, Inc.
    Inventors: John E. Watkins, Elisa Rodrigues
  • Patent number: 8112554
    Abstract: A method of transmitting data on a data line between a central control device and a decentralized data processing device. During a normal operation of the system, the central control device periodically sends synchronization pulses to the at least one data processing device via the data line in order to request data packets, and the decentralized data processing device sends the data thereof to be transmitted, as data packets, to the central control device, following the synchronization pulse. The data line is embodied as a data bus. Each of the decentralized data processing devices is configured by the central control device before the first transmission of data packets to the central control device. In order to configure the system, a bi-directional communication is carried out between the central control device and the at least one decentralized data processing device.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: February 7, 2012
    Assignee: Continental Automotive GmbH
    Inventor: Wolfgang Gottswinter
  • Patent number: 8108570
    Abstract: A state of an input/output (I/O) operation in an I/O processing system is determined. A request for performing the I/O operation is received from an I/O operating system at a channel subsystem and forwarded to a control unit controlling an I/O device for executing the I/O operation. After a predetermined amount of time passes without receiving indication from the control unit that the I/O operation is completed, an interrogation request is received at the channel subsystem from the I/O operating system for determining the state of the I/O operation. An interrogation command is sent from the channel subsystem to the control unit. A response is received from the control unit, the response indicates a state of the I/O device executing the I/O operation, a state of the control unit controlling the I/O device executing the I/O operation, and the state of the I/O operation being executed.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: January 31, 2012
    Assignee: International Business Machines Corporation
    Inventors: Harry M. Yudenfriend, Daniel F. Casper, John R. Flanagan, Matthew J. Kalos, Dale F. Riedy, Louis W. Ricci, Roger G. Hathorn, Gustav E. Sittmann, Ugochukwu C. Njoku, Catherine C. Huang, Scott M. Carlson
  • Patent number: 8108583
    Abstract: A data transfer system comprising a first bus interface, a second bus interface, a first-in-first-out memory, a controller and a message unit. The message unit is operable to queue a plurality of data transfer request messages from the first bus interface and the second bus interface. The controller is operable to process each data transfer request message and transfer data between the first bus interface, the first-in-first-out memory and the second bus interface. The controller is configured to calculate error detection codes (EDCs) and chain EDC values.
    Type: Grant
    Filed: March 23, 2005
    Date of Patent: January 31, 2012
    Assignee: Emulex Design & Manufacturing Corporation
    Inventors: Shawn Adam Clayton, Brian Mark Fortin, Daniel Brian Willie, John Leland Wood
  • Patent number: 8095699
    Abstract: An interface to transfer data between a host processor and an external coprocessor is provided. The interface may operate in several write modes, in which in a first write mode the write operation is transferred across the interface in two clock cycles and in a second write mode the write operation is transferred across the interface in a single clock cycle. The interface can perform a first read operation initiated by the host processor and a second read operation initiated by the external coprocessor. The interface can include buffers to store read and write operations and clock gates to selectively gate off clock signals provided to the buffers to synchronize transfer of data into and out of the buffers. A selectable priority scheme can be modified to select between priorities that control a preference in transferring operations over the interface when both read and write operations are queued for transfer.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: January 10, 2012
    Assignee: MediaTek Inc.
    Inventors: Sachin Garg, Paul D. Krivacek
  • Patent number: 8095744
    Abstract: The memory access device includes: a plurality of command division sections provided for a plurality of masters; a plurality of inter-master arbitration sections provided for a plurality of banks; and a memory control section. Each of the command division sections divides a command issued by the corresponding master into a plurality of micro-commands when the access region of the command is over two or more banks among the plurality of banks, each of the micro-commands being a command accessing only one of the two or more banks, and gives each of the micro-commands to an inter-master arbitration section corresponding to the bank including the access region of the micro-command. Each of the inter-master arbitration sections arbitrates micro-commands given from the command division sections to select one. The memory control section selects one of a plurality of micro-commands selected by the inter-master arbitration sections to perform memory access.
    Type: Grant
    Filed: November 7, 2008
    Date of Patent: January 10, 2012
    Assignee: Panasonic Corporation
    Inventors: Isao Kawamoto, Yoshiharu Watanabe
  • Patent number: 8086765
    Abstract: Illustrated is a system and method for identifying a memory page that is accessible via a common physical address, the common physical address simultaneously accessed by a hypervisor remapping the physical address to a machine address, and the physical address used as part of a DMA operation generated by an I/O device that is programmed by a VM. It also includes transmitting data associated with the memory page as part of a memory disaggregation regime, the memory disaggregation regime to include an allocation of an additional memory page, on a remote memory device, to which the data will be written. It further includes updating a P2M translation table associated with the hypervisor, and an IOMMU translation table associated with the I/O device, to reflect a mapping from the physical address to a machine address associated with the remote memory device and used to identify the additional memory page.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: December 27, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Yoshio Turner, Jose Renato Santos, Jichuan Chang
  • Patent number: 8060658
    Abstract: A method for auto-addressing a device in communication with a controller is disclosed. The method includes communicating a pulse from a first contact of a controller, receiving the pulse at a second contact of a device in communication with the controller, communicating a number of pulses from a first contact of the device, and receiving the number of pulses at a second contact of the controller, wherein the number of pulses indicates a number of devices in communication with the controller.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: November 15, 2011
    Assignee: Siemens Industry, Inc.
    Inventor: Norman R. McFarland
  • Patent number: 8046504
    Abstract: A content-aware digital media storage device includes a host device interface for exchanging digital information with a host device, a memory array for storing digital information received from the host device via the host interface, a peripheral module configured to communicate the digital information stored in the memory array to a receiver located remote from the digital media storage device, and a controller communicatively coupled to the host device interface, the memory array and the peripheral module and configured to interpret directory information associated with the digital information stored in the memory array so as to selectively access said digital information and communicate such accessed digital information to the peripheral module for transmission to the remote receiver. Digital images stored in the memory array may be transmitted to a remote host via a wireless network access point with which the peripheral module of the storage device is associated.
    Type: Grant
    Filed: March 29, 2010
    Date of Patent: October 25, 2011
    Assignee: Eye-Fi, Inc.
    Inventors: Eugene Feinberg, Yuval Koren, Berend Ozceri, Ziv Gillat
  • Patent number: 8032685
    Abstract: According to one embodiment of the invention, a data modifying bus buffer generally includes a switch that is configured to selectively couple a first databus to a second databus. The switch is controlled by a buffer controller. The first databus and a second databus have a similar predetermined protocol. The buffer controller is operable to monitor the first databus for the presence of a particular sequence of the signals such that, when the particular sequence of the signals is found, the first switch may be selectively opened or closed.
    Type: Grant
    Filed: May 11, 2010
    Date of Patent: October 4, 2011
    Assignee: Raytheon Company
    Inventor: George Weber
  • Patent number: 8032662
    Abstract: An object of the present invention is to provide a module connecting system that can comply flexibly with the number of expansion modules and has an inexpensive and simple configuration. In the configuration of the module connecting system of the present invention, a basic module transmits a repetitive pulse signal to an expansion module, the repetitive pulse signal whose frequency is divided by a frequency dividing circuit included in the expansion module is output as frequency dividing information to the basic module, and the number of expansion modules is determined based on the frequency dividing information.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: October 4, 2011
    Assignee: Fujikura Ltd.
    Inventor: Yoshinori Arai
  • Patent number: 8015495
    Abstract: A method of facilitating communications and collaboration of a group of plural remote participants comprises steps of receiving information over an information communications network from a first group participant; pushing, over the network to at least one other group participant, an access via an access channel; and allowing the other group participant to access at least some of the received information via said access channel in response to selective activation of the access channel by the other group participant.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: September 6, 2011
    Assignee: Groupserve IT Trust LLC
    Inventors: Theodore B. Achacoso, D. Wayne Silby
  • Patent number: 8001298
    Abstract: An article of manufacture, an apparatus, and a method for providing extended measurement word data from a control unit to a channel subsystem of an I/O processing system are disclosed. The article of manufacture includes at least one computer usable medium having computer readable program code logic. The computer readable program code logic performs a method including receiving a command message from the channel subsystem at the control unit, and initiating a timing calculation sequence of a plurality of time values in response to receiving the command message at the control unit. The computer readable program code logic also populates extended measurement word data at the control unit including the plurality of time values, and outputs the extended measurement word data from the control unit to the channel subsystem.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: August 16, 2011
    Assignee: International Business Machines Corporation
    Inventors: Mark P. Bendyk, Daniel F. Casper, John R. Flanagan, Roger G. Hathorn, Catherine C. Huang, Matthew J. Kalos, Louis W. Ricci, Gustav E. Sittmann, Harry M. Yudenfriend