Hashing Patents (Class 711/216)
  • Patent number: 10811082
    Abstract: In a non-volatile memory circuit, read and write performance is improved by increasing the transfer rate of data through the cache buffer during read and write operations. In an array structure where memory cells are connected along bit lines, and the bit lines organized into columns, pairs of data words are stored interleaved on the bit lines of a pair of columns. Data is transferred in and out of the read and write circuit on an internal bus structure, where part of the transfer of one word stored on a pair of columns can overlap with part of the transfer of another word, accelerating transfer times for both read and write.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: October 20, 2020
    Assignee: SanDisk Technologies LLC
    Inventors: YenLung Li, Hua-Ling Cynthia Hsu, Chen Chen, Min Peng
  • Patent number: 10747681
    Abstract: Apparatuses and methods for address translation invalidation are provided. In an apparatus having address translation storage which stores merged address translation information for multiple address translation stages, a set of counters are provided to hold a set of counter values. Entries in the address translation storage are stored with identifiers of first and second counters selected from the set of counters in dependence on respective context information for a first stage and a second stage of address translation together with a counter value of each counter. In response to an invalidation request specifying a first or second addressing scheme invalidation context a counter of the set of counters is selected in dependence on the first or second addressing scheme invalidation context and its value is modified.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: August 18, 2020
    Assignee: Arm Limited
    Inventor: Håkan Lars-Göran Persson
  • Patent number: 10747725
    Abstract: A non-transitory computer-readable recording medium stores a compressing program that causes a computer to execute a process including: extracting words from a file serving as a processing target; counting how many times each of the extracted words appears; registering bit strings each expressing, in multiple bits, the number of times of appearance into an index so as to be kept in correspondence with the words and the file; among the plurality of bit strings registered in the index while being kept in correspondence with the words and the file, each rearranging, within the bit string, bits included in a first bit string and bits included in a second bit string, so as to be in a different order; and compressing the index in which the bits have been rearranged, by using mutually-different mathematical functions.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: August 18, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Masahiro Kataoka, Takahiro Murata, Takafumi Ohta, Masanori Sakai, Masao Ideuchi
  • Patent number: 10734058
    Abstract: A memory device includes an error correction code (ECC) block suitable for performing an ECC operation, and generating a flag signal when an error is detected and corrected through the ECC operation in data read from a memory cell array, and a refresh control block suitable for comparing an active row address with a target address in response to the flag signal, and refreshing data of a neighboring address of the target address based on a comparison result.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: August 4, 2020
    Assignee: SK hynix Inc.
    Inventors: Seok-Bo Shim, Sang-Ho Lee, Seok-Cheol Yoon, Yun-Young Lee
  • Patent number: 10726015
    Abstract: A system and method matches data from a first set of data with that of an other set of data in a manner based on the size of a cache.
    Type: Grant
    Filed: November 1, 2016
    Date of Patent: July 28, 2020
    Assignee: Yellowbrick Data, Inc.
    Inventors: Thomas Kejser, Charles E. Gotlieb
  • Patent number: 10719612
    Abstract: A system and method for detecting vulnerabilities in be images of software containers are disclosed. The method includes receiving an event indicating that at least one base image should be scanned for vulnerabilities, each base image including at least one image layer, wherein the event designates at least one source of the at least one base image, wherein the least one base image includes resources utilized to execute at least a software container; extracting contents of each image layer of each base image; scanning the extracting contents to detect at least one vulnerability; and generating a detection event, when the at least one vulnerability is detected.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: July 21, 2020
    Assignee: Twistlock, Ltd.
    Inventors: Dima Stopel, Ben Bernstein
  • Patent number: 10706082
    Abstract: An apparatus may include a controller configured search a hash database storing entries corresponding to hash values of previously stored data to find a hash page of the hash database corresponding to a range of hash values including the first hash value. When the hash page is found, the controller may be configured to determine whether the hash page does not include an entry for the first hash value, the first hash page further including a base hash value for the range of hash values. When the hash page does not include an entry for the first hash value, the controller may be configured to generate a first entry of the first hash page for the first hash value, the first entry including an offset value from the base hash value corresponding to the first hash value and a data location at which the received data is to be stored.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: July 7, 2020
    Assignee: Seagate Technology LLC
    Inventors: Michael Barrell, Ian Davies, Kenneth F Day, III, Douglas Dewey
  • Patent number: 10706101
    Abstract: Methods and mechanisms for managing data in a hash table are disclosed. A computing system includes a hash table configured to store data and hash management logic. In response to receiving a request to insert data into the hash table, the hash management logic is configured to generate a first hash value by applying a first hash function to the key of the key-value pair, and identify a first bucket within the hash table that corresponds to the first hash table. If the first bucket has a slot available, store the key-value pair in the slot. If the first bucket does not have a slot available, select a first slot of the first bucket for conversion to a remap entry, store the key-value pair in a second bucket, and store information associating the key-value pair with the second bucket in the remap entry.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: July 7, 2020
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Alexander D. Breslow, Dong Ping Zhang, Nuwan S. Jayasena
  • Patent number: 10705735
    Abstract: Techniques manage a hash table, and a computer program product.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: July 7, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Zhe He, Lei Gao, Hao Fang, Zhiqiang Li, Huan Chen
  • Patent number: 10698941
    Abstract: Techniques described herein relate to systems and methods of data storage, and more particularly to providing layering of file system functionality on an object interface. In certain embodiments, file system functionality may be layered on cloud object interfaces to provide cloud-based storage while allowing for functionality expected from a legacy applications. For instance, POSIX interfaces and semantics may be layered on cloud-based storage, while providing access to data in a manner consistent with file-based access with data organization in name hierarchies. Various embodiments also may provide for memory mapping of data so that memory map changes are reflected in persistent storage while ensuring consistency between memory map changes and writes. For example, by transforming a ZFS file system disk-based storage into ZFS cloud-based storage, the ZFS file system gains the elastic nature of cloud storage.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: June 30, 2020
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Mark Maybee, James Kremer, Gavin Gibson
  • Patent number: 10671608
    Abstract: A system and method matches data from a first set of data with that of an other set of data in a manner based on the size of a memory.
    Type: Grant
    Filed: November 1, 2016
    Date of Patent: June 2, 2020
    Assignee: Yellowbrick Data, Inc.
    Inventors: Thomas Kejser, Charles E. Gotlieb
  • Patent number: 10642808
    Abstract: A system and method matches data from a first set of data with that of an other set of data.
    Type: Grant
    Filed: November 1, 2016
    Date of Patent: May 5, 2020
    Assignee: Yellowbrick Data, Inc.
    Inventors: Thomas Kejser, Charles E. Gotlieb
  • Patent number: 10620961
    Abstract: An apparatus and method for a speculative conditional move instruction. A processor comprising: a decoder to decode a first speculative conditional move instruction; a prediction storage to store prediction data related to previously executed speculative conditional move instructions; and execution circuitry to read first prediction data associated with the speculative conditional move instruction and to execute the speculative conditional move instruction either speculatively or non-speculatively based on the first prediction data.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: April 14, 2020
    Assignee: Intel Corporation
    Inventors: Amjad Aboud, Gadi Haber, Jared Warner Stark, IV
  • Patent number: 10599549
    Abstract: A packet backpressure detection method and apparatus are provided. The method includes: a device which having a Peripheral Component Interconnect Express (PCIe) port storing a plurality of packets for transmission in a packet queue and storing a packet that is to be transmitted next in a first buffer, where the queue comprises a plurality of packets that are to be transmitted via the PCIe port; and the queue is stored in a second buffer; recording a storage duration of each packet stored in the first buffer, and accumulating the storage duration of each packet stored in the first buffer; removing the packet from the first buffer after the packet is transmitted via the PCIe port; and generating an indication of packet pressure at the PCIe port based on the accumulated storage duration.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: March 24, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Bin Zhang, Ligang Chen, Jiahuai Chen, Lixia Xu
  • Patent number: 10592149
    Abstract: Embodiments are described for reducing memory usage and disk I/O's for reading and writing streams in a deduplication storage system. Generations of backups of a stream can be tracked for the stream. In the first generation (first backup), stream data is ingested, segmented, and written to disk without looking up a fingerprint of each segment, to save disk I/O's and memory. After the first generation, an amount of stream data processed is tracked, and at dynamically tunable increments of data processed, a fingerprint index lookup is performed to disk. The fingerprint index is read into memory and subsequent fingerprint lookups are preformed to cache, until a next dynamically tunable fingerprint lookup to disk. The dynamically tunable increment of processed data can be randomly reset.
    Type: Grant
    Filed: October 6, 2017
    Date of Patent: March 17, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Fani Jenkins, Srikant Viswanathan, Yamini Allu
  • Patent number: 10579384
    Abstract: Aspects of the invention include a computer-implemented method for executing one or more instructions by a processing unit. The method includes receiving, by an instruction fetch unit (IFU), a request to fetch an instruction for execution, wherein the instruction includes an effective address (EA). The IFU can further access an instruction cache directory (I-directory) using the EA of the requested instruction to determine whether the EA of the requested instruction matches an EA stored in an associated instruction cache (I-cache). An instruction cache (I-cache) can output the requested instruction in response to or based at least in part on determining that the requested instruction EA matches an entry in the I-cache. A decode unit can decode the requested instruction output by the I-cache.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: March 3, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert A. Philhower, Balaram Sinharoy
  • Patent number: 10565183
    Abstract: A data block may be received. Hash values correspond to portions of the data block may be generated. A determination that none of the plurality of hash values matches with another hash value associated with a previously received data block may be made. In response to determining that none of the plurality of hash values match with the other hash value associated with the previously received data block, a subset of the plurality of hash values may be stored based on a first alignment and a second alignment.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: February 18, 2020
    Assignee: Pure Storage, Inc.
    Inventors: John Colgrove, Ronald Karr, Vinay K. Perneti, Feng Wang
  • Patent number: 10565204
    Abstract: Disclosed herein are system, method, and computer program product embodiments for incrementally building hash collision tables. In some embodiments, hashes and hash collision tables may be used to improve efficiency of relational operations, such as those used in relational databases. An embodiment operates by determining hash collisions between data entries, then executing a join operation referencing the hash table and the hash collision table to produce a result set.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: February 18, 2020
    Assignee: SAP SE
    Inventors: Christian Bensberg, Till Merker
  • Patent number: 10565205
    Abstract: Disclosed herein are system, method, and computer program product embodiments for incrementally building hash collision tables. In some embodiments, hashes and hash collision tables may be used to improve efficiency of relational operations, such as those used in relational databases. An embodiment operates by determining hash collisions between data entries, then storing newly determined hash values corresponding to collisions in a hash collision table. The storing can be done incrementally, without needing to rebuild hash tables or hash collision tables for all data entries.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: February 18, 2020
    Assignee: SAP SE
    Inventors: Christian Bensberg, Till Merker
  • Patent number: 10540717
    Abstract: A securities trading system 10 which is an example of an financial products trading system includes: a switch 100 including a processor 104 which checks order issue information included in each of order messages received from a participant terminal 300 against a server management table 125, determines the address of a trading server 200 to which the order message is to be sorted, delivers the order message, receives a notification of a result of a predetermined process for the delivered order message from the trading server 200, and sends the notification to the participant terminal 300; and the trading server 200 including a processor 204 which performs a predetermined error check on each of the delivered order messages, sends the switch 100 an error notification or an order reception notification depending on a result of the error check, performs an execution process for each of the order messages whose result of the error check is normal, and sends the switch 100 an execution notification depending on the
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: January 21, 2020
    Assignees: HITACHI, LTD., TOKYO STOCK EXCHANGE, INC.
    Inventors: Yuki Hidaka, Tsuyoshi Tsukada, Kazuhiko Omata, Yoshihide Sato, Shinobu Sakamoto
  • Patent number: 10503654
    Abstract: Methods and apparatus related to framework and/or methodology for selective caching of Erasure Coded fragments in a distributed storage system are described. In one embodiment, a plurality of fragments of a data object are generated. Each of the plurality of fragments is Erasure Coded (EC) prior to storage at a storage node of a plurality of storage nodes. Each of the plurality of fragments is transmitted with a caching hint to indicate whether that fragment is to be cached at the storage node. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: December 10, 2019
    Assignee: Intel Corporation
    Inventors: Arun Raghunath, Michael P. Mesnier, Yi Zou
  • Patent number: 10503716
    Abstract: A lookup circuit evaluates hash functions that map keys to addresses in lookup tables. The circuit includes multiple hash function sub-circuits, each of which applies a respective hash function to an input key, producing a hash value. Candidate pairs of hash functions to be implemented by the hash function sub-circuits may be generated and tested for suitability in hashing a particular collection of keys. The suitability testing may include computing hash value bit vectors by applying each hash function in a candidate pair to a given key, and determining (using a modified union-find type operation that organizes objects in each set as a directed graph whose root points to itself) whether the resulting hash value bit vectors belong to the same set. The union-find type operation may include a limited distance-from-root test, path compression, or exception handling for special cases, but not a rank test.
    Type: Grant
    Filed: October 31, 2013
    Date of Patent: December 10, 2019
    Assignee: Oracle International Corporation
    Inventors: David R. Chase, Guy L. Steele, Jr.
  • Patent number: 10503717
    Abstract: A method, article of manufacture, and apparatus for locating data inside a deduplicated storage system is discussed. An index on a solid state device may contain a finger print to container identifier mapping. The container identifier may identify a logical container storing data related to the fingerprint. This data may therefore be located using the index given the fingerprint.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: December 10, 2019
    Assignee: EMC IP Holding Company LLC
    Inventors: Satish Visvanathan, Mahesh Kamat, Rahul B Ugale
  • Patent number: 10482129
    Abstract: Disclosed approaches for accessing data involve determining in a first stage of a pipelined processing circuit, hash values from keys in a data access request and determining in a second stage of the pipelined processing circuit and from a hash table, addresses associated with the hash values. In a third stage of the pipelined processing circuit, data are read at the addresses in a memory arrangement, and in a fourth stage of the pipelined processing circuit a subset of the data read from the memory arrangement is selected according to a query in the data access request. In a fifth stage of the pipelined processing circuit, the subset of the data read from the memory arrangement is merged into response data.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: November 19, 2019
    Assignee: XILINX, INC.
    Inventors: Michaela Blott, Ling Liu, Daniel Ziener, Kimon Karras
  • Patent number: 10459845
    Abstract: Devices and techniques for host accelerated operations in managed NAND devices are described herein. A controller can receive an operation. Here, the operation includes address data with a logical address portion and a physical address portion. The controller can then extract an index value and a location value from the physical address portion. The controller can retrieve a key using the index value and invoke a reversible function—using the index value and the location value—to produce a physical address. The controller can then perform the operation using the physical address.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: October 29, 2019
    Assignee: Micron Technology, Inc.
    Inventor: Giuseppe Cariello
  • Patent number: 10452643
    Abstract: Systems and methods for verifying files in bulk in a file system. When files are represented by a segment tree, the levels of the segment trees are walked by level such that that multiple files are verified at the same time in order to identify missing segments. Then, a bottom up scan is performed using the missing segments to identify the files corresponding to the missing segments. The missing files can then be handled by the file system.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: October 22, 2019
    Assignee: EMC IP Holding Company LLC
    Inventors: Abhinav Duggal, Tony Wong
  • Patent number: 10437785
    Abstract: A memory system is disclosed. The memory system may include a Big Hash Table and a Little Hash Table. The memory system may also include an Overflow Region and a Translation Table to map a logical address to a Physical Line Identifier (PLID), which may include a region identifier and a physical address.
    Type: Grant
    Filed: November 27, 2017
    Date of Patent: October 8, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dongyan Jiang, Qiang Peng, Hongzhong Zheng
  • Patent number: 10387397
    Abstract: A method for building a hash table over a subset of data in a data set includes partitioning a subset of keys and values in the data set into multiple partitions. A hash table is formed with space reserved for each partition based on cumulative counts for a number of keys and values in each partition of the multiple partitions. Each thread selects one or more partitions and inserts keys and values belonging to the selected one or more partitions into the hash table in the reserved space for those partitions. A compact hash table is created that includes a bitmap and a compacted army.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: August 20, 2019
    Assignee: International Business Machines Corporation
    Inventors: Gopi K. Attaluri, Ronald J. Barber, Ippokratis Pandis, Vijayshankar Raman
  • Patent number: 10365987
    Abstract: A computer-implemented method that includes monitoring execution of program code by first and second processor components. A computing system detects that a trigger condition is satisfied by: i) identifying an operand in a portion of the program code; or ii) determining that a current time of a clock of the computing system indicates a predefined time value. The operand and the predefined time value are used to initiate trace events. When the trigger condition is satisfied the system initiates trace events that generate trace data identifying respective hardware events occurring across the computing system. The system uses the trace data to generate a correlated set of trace data. The correlated trace data indicates a time ordered sequence of the respective hardware events. The system uses the correlated set of trace data to analyze performance of the executing program code.
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: July 30, 2019
    Assignee: Google LLC
    Inventors: Thomas Norrie, Naveen Kumar
  • Patent number: 10353870
    Abstract: One or more techniques and/or computing devices are provided for utilizing a tracking structure for data replication synchronization. For example, a first storage controller, hosting first storage, may have a replication relationship with a second storage controller hosting second storage (e.g., write requests, modifying the first storage, may be replicated to the second storage). The first storage controller maintains a tracking structure comprising hash buckets, dynamic tree structures, and/or a tracking segment bitmap used to identify portions of the first storage as either comprising dirty data (e.g., data, modified by a write request not yet replicated to the second storage, that may be different than corresponding data within the second storage) or clean data (e.g., the same data as the second storage). The tracking structure may be used to resynchronize the second storage to the first storage, perform a quick resync, facilitate semi-synchronous replication, and/or perform snapshot-less resync.
    Type: Grant
    Filed: February 17, 2016
    Date of Patent: July 16, 2019
    Assignee: NetApp Inc.
    Inventors: Rithin Kumar Shetty, Andrew Eric Dunn
  • Patent number: 10326769
    Abstract: The current document is directed to an interface and authorization service that allows users of a cloud-director management subsystem of distributed, multi-tenant, virtual data centers to extend the services and functionalities provided by the cloud-director management subsystem. A cloud application programming interface (“API”) entrypoint represents a request/response RESTful interface to services and functionalities provided by the cloud-director management subsystem as well as to service extensions provided by users. The cloud API entrypoint includes a service-extension interface and an authorization-service management interface. The cloud-director management subsystem provides the authorization service to service extensions that allow the service extensions to obtain, from the authorization service, an indication of whether or not a request directed to the service extension through the cloud API entrypoint is authorized.
    Type: Grant
    Filed: May 30, 2016
    Date of Patent: June 18, 2019
    Assignee: VMware, Inc.
    Inventors: Maya Ilieva, Kiril Karaatanassov
  • Patent number: 10255208
    Abstract: A data transfer apparatus according to an embodiment includes: a first main memory configured to store first data to be used by a first processor; a first hash table in which a hash value and address information of the first data stored in the first main memory are registered; and a data transfer unit configured to transfer data having a hash value not registered in the first hash table from among second data stored in a second main memory from the second main memory to the first main memory.
    Type: Grant
    Filed: September 21, 2016
    Date of Patent: April 9, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Seiji Maeda, Hiroyuki Usui
  • Patent number: 10216966
    Abstract: A technique perturbs an extent key to compute a candidate extent key in the event of a collision with metadata (i.e., two extents having different data that yield identical hash values) stored in a memory of a node in a cluster. The perturbing technique may be used to compute a candidate extent key that is not previously stored in an extent store instance. The candidate extent key may be computed from a hash value of an extent using a perturbing algorithm, i.e., a hash collision computation, which illustratively adds a perturb value to the hash value. The perturb value is illustratively sufficient to ensure that the candidate extent key resolves to a same hash bucket and node (extent store instance) as the original extent key. In essence, the technique ensures that the original extent key is perturbed in a deterministic manner to generate the candidate extent key, so that the original extent and candidate extent key “decode” to the same hash bucket and extent store instance.
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: February 26, 2019
    Assignee: NetApp, Inc.
    Inventors: Edward D. McClanahan, Jeffrey S. Kimmel
  • Patent number: 10205590
    Abstract: Methods and systems for reducing the size of a cryptographic key in a test simulation environment are disclosed. In one example, a method includes determining a minimum key size value and maximum key size value for a private cryptographic key for each of a plurality of key exchange value pairs and deriving, for each of the plurality of key exchange value pairs, a key sizing constant based on the minimum key size value and the maximum key size value. The method further includes storing each of the plurality of selected key exchange value pairs and associated key sizing constant in a data store, selecting a key exchange value pair to be applied to a test simulation session conducted between a first test simulation endpoint and a second test simulation endpoint, and generating a private cryptographic key based on the key sizing constant associated with the selected key exchange value pair.
    Type: Grant
    Filed: December 11, 2015
    Date of Patent: February 12, 2019
    Assignee: KEYSIGHT TECHNOLOGIES SINGAPORE (HOLDINGS) PTE. LTD.
    Inventors: Andrei Cipu, Alexandru Badea
  • Patent number: 10176117
    Abstract: A method for managing metadata in a storage system is disclosed. The system includes a processor, a storage medium, a first metadata table that maps every data block's LBN to its unique content ID, and a second metadata table that maps every content ID to its PBN on the storage medium. During a data movement process, the processor is configured to determine the content ID of the data block and update its entry in the second metadata table without accessing the first metadata table. A method is also disclosed to reduce the size of the first metadata table. Only content ID is stored in the first metadata table and its LBN is determined by the metadata entry's relative position in the table. Metadata entries are stored in metadata blocks and deduplicated.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: January 8, 2019
    Assignee: Cacheio LLC
    Inventors: Arthur James Beaverson, Bang Chang
  • Patent number: 10162674
    Abstract: Method and system for serializing access to datasets, suitable for use in a workflow management system which executes multiple business processes, wherein a single process instance is enabled to invoke web services which may update datasets of different storages holding redundant information. Business Process Execution Language for Web Services allows defining business processes that make use of web services and business processes that externalize their functionality as web services. As the business process has no knowledge about data that is accessed by invoked web services, concurrent process instances may update the same pieces of information within a database. Unless access to the data is carried out as a transaction, parallel execution of the process instances may cause data inconsistencies, which may be avoided by serializing the execution of process instances based on correlation information associated with messages consumed by the process instances.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: December 25, 2018
    Assignee: International Business Machines Corporation
    Inventors: Frank Leymann, Dieter Roller
  • Patent number: 10164945
    Abstract: An apparatus, computer-readable medium and computer-implemented method for masking data, including applying an irreversible function to a first data element to generate a derivative data element, the first data element being of a first data type and the derivative data element being of a second data type different than the first data type, selecting at least a portion of the derivative data element to serve as a template, generating a masked data element as the result of converting the template from the second data type to the first data type.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: December 25, 2018
    Assignee: Informatica LLC
    Inventors: Igor Balabine, Bala Kumaresan
  • Patent number: 10110377
    Abstract: A communication system and key information sharing method which allows first and second communication devices to share key information and perform cryptograph processing. The monitoring device calculates hash value based on copy data of storage content of an ECU, and transmits a part to the ECU as confirmation information. The ECU further extracts a part from a value, obtained by removing confirmation information from hash value calculated by the ECU, and transmits part to the monitoring device as response information when the received confirmation information is included in the hash value calculated by the ECU. The monitoring device determines whether the received response information is included in hash value of the monitoring device or not. The ECU and monitoring device each use residual value, obtained by removing confirmation information and response information from hash value calculated by the ECU or monitoring device, for following cryptograph processing as a shared key.
    Type: Grant
    Filed: June 22, 2015
    Date of Patent: October 23, 2018
    Assignees: NATIONAL UNIVERSITY CORPORATION NAGOYA UNIVERSITY, AUTONETWORKS TECHNOLOGIES, LTD., SUMITOMO WIRING SYSTEMS, LTD., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hiroaki Takada, Ryo Kurachi, Naoki Adachi
  • Patent number: 10078646
    Abstract: An approach for fingerprinting large data objects at the wire speed has been disclosed. The techniques include Fresh/Shift pipelining, split Fresh, optimization, online channel sampling, and pipelined selection. The architecture can also be replicated to work in parallel for higher system throughput. Fingerprinting may provide an efficient mechanism for identifying duplication in a data stream, and deduplication based on the identified fingerprints may provide reduced storage costs, reduced network bandwidth consumption, reduced processing time and other benefits. In some embodiments, fingerprinting may be used to ensure or verify data integrity and may facilitate detection of corruption or tampering. An efficient manner of generating fingerprints (either via hardware, software, or a combination) may reduce a computation load and/or time required to generate fingerprints.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: September 18, 2018
    Assignee: HGST Netherlands B.V.
    Inventors: Zvonimir Bandic, Cyril Guyot, Dongyang Li, Ashwin Narasimha, Qingbo Wang, Ken Yang
  • Patent number: 10067708
    Abstract: Data synchronization between memories of a data processing system is achieved by transferring the data blocks from a first memory to a second memory, forming a hash list from addresses of data blocks that are written to the second memory or modified in the second memory. The hash list may be to identify a set of data blocks that are possibly written to or modified. Data blocks that are possibly modified may be written back from the second memory to the first memory in response to a synchronization event. The hash list may be updated by computing, in hardware or software, hash functions of an address of the transferred or modified data block to determine bit positions to be set. The hash list may be queried by computing hash functions of an address to determine bit positions, and checking bits in the hash list at those bit positions.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: September 4, 2018
    Assignee: Arm Limited
    Inventor: Jonathan Curtis Beard
  • Patent number: 10067703
    Abstract: Managing a streaming environment of an operator graph by performing corrective actions based on a threshold of changes in state being reached. An operator graph includes states of information stored within a memory of a first processing element configured to process a set of tuples. The memory of the first processing element is monitored. A change in the information from a first state to a second state is identified, based on the monitoring. The change from the first state to the second state is recorded. A determination is made if the change from the first state to the second state has caused a threshold of changes between the states of the information to be reached. A corrective action is performed that modifies a configuration of the operator graph in response to the threshold of changes between the states of the information being reached.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: September 4, 2018
    Assignee: International Business Machines Corporation
    Inventors: Eric L. Barsness, Michael J. Branson, Ryan K. Cradick, John M. Santosuosso
  • Patent number: 10049118
    Abstract: A cluster-wide consistency checker ensures that two file systems of a storage input/output (I/O) stack executing on each node of a cluster are self-consistent as well as consistent with respect to each other. The file systems include a deduplication file system and a host-facing file system that cooperate to provide a layered file system of the storage I/O stack. The deduplication file system is a log-structured file system managed by an extent store layer of the storage I/O stack, whereas the host-facing file system is managed by a volume layer of the stack. Illustratively, each log-structured file system implements a key-value store and cooperates with other nodes of the cluster to provide a cluster-wide (global) key-value store. The consistency checker verifies and/or fixes on-disk structures of the layered file system to ensure its consistency.
    Type: Grant
    Filed: June 1, 2015
    Date of Patent: August 14, 2018
    Assignee: NetApp, Inc.
    Inventors: Dhaval Patel, Chaitanya Patel, John Muth, Srinath Krishnamachari
  • Patent number: 9952922
    Abstract: Apparatus suitable for detecting a fault in a processor comprises a monitor which receives input and output signals from the processor and generates a hash index key which is used to access entries in a hash table. The entries may include actions such as setting a timer so that the response of an output to a change of state of an input may be confirmed as valid within a specified time interval.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: April 24, 2018
    Assignee: NXP USA, Inc.
    Inventors: Graham Edmiston, Alan Devine, David McMenamin, Andrew Roberston, James Andrew Collier Scobie
  • Patent number: 9935917
    Abstract: A method of discovering and assigning an IP address to a device to be discovered in a communication network having multiple interconnected nodes includes continuously monitoring, by the device to be discovered, the network for address resolution protocol (ARP) requests. The discoverer node transmits a number of ARP request to the network. The device to be discovered receives the number of ARP requests. The device to be discovered determines whether the number of ARP requests are unanswered by other devices in the network. The device to be discovered answers to the number of ARP requests with an ARP reply to claim an IP address associated with the number of ARP requests. The discoverer node and the device to be discovered exchange a pair of User Datagram Protocol (UDP) packets to complete the detection process.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: April 3, 2018
    Assignee: Accedian Networks Inc.
    Inventors: Claude Robitaille, Guillaume Lemieux
  • Patent number: 9870227
    Abstract: A method and apparatus for performing stencil computations efficiently are disclosed. In one embodiment, a processor receives an offset, and in response, retrieves a value from a memory via a single instruction, where the retrieving comprises: identifying, based on the offset, one of a plurality of registers of the processor; loading an address stored in the identified register; and retrieving from the memory the value at the address.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: January 16, 2018
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventor: David Donofrio
  • Patent number: 9779123
    Abstract: Techniques for performing database operations using vectorized instructions are provided. In one technique, a hash table build phase involves executing vectorized instructions to determine whether a bucket in a hash table includes a free slot for inserting a key. A number of data elements from the bucket are loaded in a register. A vectorized instruction is executed against the register may be used to determine a position, within the register, that contains the “smallest” data element. If the data element at that position is zero (or negative), then it is determined that the corresponding position in the bucket is an available slot for inserting a key and corresponding data value.
    Type: Grant
    Filed: January 7, 2016
    Date of Patent: October 3, 2017
    Assignee: Oracle International Corporation
    Inventors: Rajkumar Sen, Nipun Agarwal
  • Patent number: 9760283
    Abstract: Systems and methods for managing sparsely updated counters in memory include, for a given interval of time and N counters associated with the given interval, managing a first set of the N counters in a first level of storage in the memory, wherein the first level of storage utilizes a hash table to store a counter identifier and a value for each of the first set; and responsive to filling up the first level of storage for a given user in the given interval, managing the first set and a second set of the N counters in a second level of storage in the memory, wherein the set utilizes memory buckets to incrementally store the first set and the second set.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: September 12, 2017
    Assignee: Zscaler, Inc.
    Inventors: Satish Kalipatnapu, Sushil Pangeni, Kumar Gaurav, Chakkaravarthy Periyasamy Balaiah
  • Patent number: 9747340
    Abstract: The described method and system enables a client at a branch office to retrieve data from a local hosted cache instead of an application server over a WAN to improve latency and reduce overall WAN traffic. A server at the data center may be adapted to provide either a list of hashes or the requested data based on whether a hosted cache system is enabled. A hosted cache at the client side may provide the data to the client based on the hashes. The hashes may be generated to provide a fingerprint of the data which may be used to index the data in an efficient manner.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: August 29, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Ravi T. Rao, Sandeep K. Singhal, See-Mong Tan, R Scott Briggs, Kushal Narkhede, Eliot John Flannery, Nilesh R. Shah, Gianluigi Nusca, Khawar Mahmood Zuberi
  • Patent number: 9703484
    Abstract: Output is produced from a memory block. A key memory is accessed to produce memory output based on a value of a first index. The memory output includes a stored compressed key and a stored index. A compressed key is produced based on the uncompressed key. The produced compressed key is compared with the stored compressed key. The stored index is output when the stored compressed key matches the produced compressed key.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: July 11, 2017
    Assignee: Memobit Technologies AB
    Inventors: Pär S Westlund, Lars-Olof B Svensson
  • Patent number: 9690942
    Abstract: A serial input/output (SIO) device with a serial peripheral interface (SPI) bus gateway controller. The gateway controller retrieves operation code (opcode) from a signal from the SPI bus and an address number from the signal; the gateway controller further compares the retrieved opcode with a restrict opcode, the retrieved address number with a restrict address number. When either the retrieved opcode matches the restrict opcode, or the retrieved address number matches the restrict address number, the gateway controller blocks the signal.
    Type: Grant
    Filed: October 22, 2014
    Date of Patent: June 27, 2017
    Assignees: HONG FU JIN PRECISION INDUSTRY (WuHan) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Hung-Chi Huang