Hashing Patents (Class 711/216)
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Publication number: 20150032989Abstract: Methods, systems, and products describe a robust solution for the dictionary problem of data structures. A hash function based on tabulation is twisted to utilize an additional xoring operation and a shift. This twisted tabulation offers strong robustness guarantees over a set of queries in both linear probing and chaining.Type: ApplicationFiled: October 11, 2014Publication date: January 29, 2015Applicant: AT&T INTELLECTUAL PROPERTY I, L.P.Inventors: Mikkel Thorup, Mihai Patrascu
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Patent number: 8938469Abstract: An example hashing unit includes a plurality of hardware-based hash tables, wherein each of the hash tables comprises a plurality of buckets, and wherein the plurality of hash tables comprise a set of zero or more active hash tables and a set of one or more inactive hash tables. An example hashing unit controller is configured to receive a key value to be stored in the hashing unit, determine that one of the inactive hash tables should be activated, and, based on the determination, activate the one of the set of inactive hash tables as a recently activated hash table, determine one of the buckets of the recently activated hash table to which a hash function associated with the recently activated hash table maps the received key value, and store the key value in the determined one of the buckets of the recently activated hash table.Type: GrantFiled: September 22, 2011Date of Patent: January 20, 2015Assignee: Juniper Networks, Inc.Inventors: John Keen, Jean-Marc Frailong, Deepak Goel
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Patent number: 8938603Abstract: According to an embodiment of the invention, cache management comprises maintaining a cache comprising a hash table including rows of data items in the cache, wherein each row in the hash table is associated with a hash value representing a logical block address (LBA) of each data item in that row. Searching for a target data item in the cache includes calculating a hash value representing a LBA of the target data item, and using the hash value to index into a counting Bloom filter that indicates that the target data item is either not in the cache, indicating a cache miss, or that the target data item may be in the cache. If a cache miss is not indicated, using the hash value to select a row in the hash table, and indicating a cache miss if the target data item is not found in the selected row.Type: GrantFiled: May 31, 2012Date of Patent: January 20, 2015Assignee: Samsung Electronics Co., Ltd.Inventor: Jonathan M. Haswell
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Patent number: 8937942Abstract: In one example, a network device includes a network interface that receives a packet, a storage card that stores session data for monitored network sessions, a plurality of service processing cards that process packets of respective subsets of the network sessions, wherein each of the service processing cards comprises a respective memory to store session data for the respective subset of the network sessions processed by the corresponding service processing card, and a switch fabric coupled to the network interface, the storage card, and the plurality of service processing cards. One or more of the plurality of service cards process the received packet based on the session data stored by the storage card. The one or more of the plurality of service cards retrieve the session data for the network session to which the packet corresponds from the storage card and store the retrieved session data in the respective memory.Type: GrantFiled: July 1, 2010Date of Patent: January 20, 2015Assignee: Juniper Networks, Inc.Inventors: Xianzhi Li, Qingming Ma, Jianhua Gu, Sanjay Gupta, Zeyong Lin, Dongsheng Mu
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Patent number: 8937562Abstract: This disclosure relates to synchronizing dictionaries of acceleration nodes in a computer network. For example, dictionaries of a plurality of acceleration nodes of a client-server network can be synchronized to each include one or more identical data items and data identifier pairs. Synchronization can include transmitting a particular data item, or a combination of a data item and an associated data identifier, to another acceleration node which includes it in its dictionary. A particular acceleration node can, instead of transmitting a data item, transmit an associated data identifier to another acceleration node. As all (or a subset) of the acceleration nodes can have an identical dictionary when employing the methods described herein, the particular acceleration node can use the same dictionary to communicate with all (or the subset of) other acceleration nodes of the computer network.Type: GrantFiled: July 29, 2013Date of Patent: January 20, 2015Assignee: SAP SEInventor: Or Igelka
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Patent number: 8938604Abstract: The present disclosure provides a storage system for data read and write. One embodiment of the storage system includes an origination device that is configured to receive a request for a logical block addressing-based operation on a volume, convert the logical block addressing-based operation request into a key addressing-based operation request carrying a key corresponding to data to be operated, and send the key addressing-based operation request to a routing library; the routing library is configured to receive the key addressing-based operation request, hash the key corresponding to the data to be operated, determine that a storage node taking charge of a hash region in which the hashed key is located is the master storage node, send the key addressing-based operation request to the master storage node of the data to be operated.Type: GrantFiled: December 5, 2012Date of Patent: January 20, 2015Assignee: Huawei Technologies Co., Ltd.Inventors: Xian Liu, Daohui Wang, Deping Yang
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Patent number: 8935508Abstract: A pseudo CAM (PCAM) can be implemented using SRAM to minimize latency associated with a traditional CAM. On receiving a key at a memory controller that executes operations on the PCAM, a hash value of the received key can be calculated. Based on the hash value of the received key, one of a plurality of memory sub-trees comprising a subset of memory locations, that is associated with the received key can be identified. A binary search can be executed on the subset of memory locations that constitute the identified memory sub-tree to identify a memory location at which a data entry comprising the received key is stored. The data entry comprising the received key and corresponding content can then either be retrieved or deleted. Alternatively, a binary search can be executed to identify the memory location where a new data entry comprising the received key should be stored.Type: GrantFiled: August 30, 2010Date of Patent: January 13, 2015Assignee: QUALCOMM IncorporatedInventors: Sivakumar Ardhanari, Srihari Adem
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Patent number: 8929380Abstract: A system for matching data using flow based packet data storage includes a communications interface and a processor. A communications interface receives a packet between a source and a destination. The processor identifies a flow between the source and the destination based on the packet. The processor determines whether some of packet data of the packet indicates a potential match to data in storage using hashes. The processor then stores the data from the most likely data match and second most likely data match without a packet header in a block of memory in the storage based on the flow.Type: GrantFiled: May 5, 2014Date of Patent: January 6, 2015Assignee: Silver Peak Systems, Inc.Inventors: David Anthony Hughes, John Burns, Zhigang Yin
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Publication number: 20150006846Abstract: A method of storing a file in a storage system that includes a plurality of memory-storage hosts includes: specifying a unique chunk identifier for a memory chunk included in the file; specifying a hash mapping to identify one or more storage locations for the chunk identifier, each storage location corresponding to a portion of a memory-storage host; providing metadata corresponding to the hash mapping to the memory-storage hosts; and storing the memory chuck at the one or more storage locations identified by the hash mapping by providing the chunk identifier to one or more memory-storage hosts corresponding to the identified one or more storage locations, the one or more memory-storage hosts implementing the hash mapping to store the memory chunk at the identified one or more locations.Type: ApplicationFiled: March 14, 2014Publication date: January 1, 2015Applicant: SARATOGA SPEED, INC.Inventor: Chris Youngworth
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Patent number: 8922822Abstract: A method is disclosed. The method includes receiving a first data component of an image data stream at a cache within a control unit, appending a first signature value to the first data component to obtain a first modified image data and generating a second signature value based on the first modified image data.Type: GrantFiled: August 5, 2011Date of Patent: December 30, 2014Assignee: Ricoh Production Print Solutions LLCInventor: Arianne T. Hinds
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Patent number: 8924686Abstract: A data processing apparatus is provided comprising a plurality of master devices configured to issue memory access requests including virtual addresses. A memory management unit is configured to receive memory access requests and to translate a virtual address included in a memory access request from a requesting master device into a physical address indicating a storage location in memory. The memory management unit has an internal storage unit having a plurality of entries wherein indications of corresponding virtual address portions and physical address portions are stored. The memory management unit is configured to select an entry of the internal storage unit in dependence on the virtual address and an identifier of the requesting master device. Conflict between the master devices in their usage of the internal storage unit is thus avoided.Type: GrantFiled: October 8, 2009Date of Patent: December 30, 2014Assignee: ARM LimitedInventors: Erik Persson, Ola Hugosson, Andreas Björklund
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Patent number: 8924687Abstract: A data read/write system receives a key associated with a data read request. The data read/write system hashes the key to obtain a first hash value and hashes the key to obtain a second hash value, where the second hash value is different than the first hash value. The data read/write system obtains a pointer from a pointer array using the first and second hash values, and uses one or more bits of the pointer and the first hash value to retrieve data from a data look-up array.Type: GrantFiled: July 8, 2013Date of Patent: December 30, 2014Assignee: Juniper Networks, Inc.Inventors: Jean-Marc Frailong, Anurag P Gupta, David Talaski, Sanjeev Singh
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Patent number: 8913483Abstract: In a hierarchical switching architecture that includes at least one lower level managed switching element that connects to several higher level managed switching elements, some embodiments provide a method of identifying a higher level managed switching element to which the lower level managed switching element forwards a packet for further processing. The method computes a value based on a set of attributes of the packet. The method identifies a record from a hierarchy traversal table based on the computed value. The record specifies (1) a first higher level managed switching element as a primary higher level managed switching element and (2) a second higher level managed switching element as a secondary higher level managed switching element. The primary and secondary higher level managed switching elements are for forwarding the packet for further processing. The method forwards the packet to one of the higher level managed switching elements.Type: GrantFiled: August 26, 2011Date of Patent: December 16, 2014Assignee: Nicira, Inc.Inventors: Benjamin L. Pfaff, Ethan J. Jackson, Teemu Koponen, Pankaj Thakkar
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Patent number: 8914601Abstract: In a multi-processor (e.g., multi-core) computer system, several processors can simultaneously access data without corruption thereof by: designating to each processor a portion of a hash table containing the data; by allowing each processor to access only those data elements belonging to the portion of the hash table designated to that processor; and by sending, via a network, other data elements to the processors that are designated the portions of the hash table to which the other data elements belong. The network avoids memory contention at each processor without requiring a memory-based lock. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules that allow a reader to quickly ascertain the subject matter of the disclosure contained herein. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.Type: GrantFiled: October 18, 2011Date of Patent: December 16, 2014Assignee: Reservoir Labs, Inc.Inventors: Richard A. Lethin, Jordi Ros-Giralt, Peter Szilagyi
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Patent number: 8908696Abstract: A method for optimized route caching includes comparing a destination address of a network packet to a first set of prefixes in a routing cache, and comparing the destination address to a second set of prefixes in a full routing table when a longest matching prefix for the destination address is not found in the routing cache. The method further includes copying the longest matching prefix and a set of sub-prefixes of the longest matching prefix from the full routing table to the routing cache, and forwarding the network packet.Type: GrantFiled: September 9, 2008Date of Patent: December 9, 2014Assignee: AT&T Intellectual Property I, L.P.Inventors: Alexandre Gerber, Changhoon Kim, Jennifer Lynn Rexford, Matthew Caesar
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Publication number: 20140351522Abstract: A system and method are disclosed for storing data in a hash table. The method includes receiving data, determining a location identifier for the data wherein the location identifier identifies a location in the hash table for storing the data and the location identifier is derived from the data, compressing the data by extracting the location identifier; and storing the compressed data in the identified location of the hash table.Type: ApplicationFiled: August 11, 2014Publication date: November 27, 2014Inventors: Mohammad Reza SADRI, Saied KAZEMI, Siddharth CHOUDHURI
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Patent number: 8898393Abstract: Methods and apparatus relating to ring protocols and techniques are described. In one embodiment, a first agent generates a request to write to a cache line of a cache over a first ring of a computing platform. A second agent that receives the write request forwards it to a third agent over the first ring of the computing platform. In turn, a third agent (e.g., a home agent) receives data corresponding to the write request over a second, different ring of the computing platform and writes the data to the cache. Other embodiments are also disclosed.Type: GrantFiled: May 23, 2013Date of Patent: November 25, 2014Assignee: Intel CorporationInventors: Meenakshisundaram R. Chinthamani, R. Guru Prasadh, Hari K. Nagpal, Phanindra K. Mannava
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Patent number: 8898431Abstract: The present invention provides a multi-path network for use in a bridge, switch, router, hub or the like, comprising a plurality of network ports adapted for connection with one or more devices, each device having a different identifying address data; a plurality of network elements; and a plurality of network links interconnecting the network elements and connecting the network elements to the network ports, wherein the multi-path network further comprises separately addressable memory elements each adapted for storing device address data and the multi-path network is adapted to distribute a plurality of device address data amongst the plurality of memory elements.Type: GrantFiled: July 23, 2009Date of Patent: November 25, 2014Assignee: Cray HK LimitedInventors: David Charles Hewson, Jon Beecroft, Anthony Michael Ford, Edward James Turner, Mark Owen Homewood
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Patent number: 8891364Abstract: The present application is directed towards systems and methods for distributing traffic across nodes of a cluster of intermediary devices through distributed flow distribution (DFD). Upon receipt of network traffic, a cluster node, such as an intermediary computing device or appliance, may internally steer a portion of the traffic via an inter-node communications backplane to one or more other nodes in the cluster so that the load is equally handled by all of the nodes in the cluster. A cluster node may determine whether to process the traffic steered via the backplane by computing a hash of packet parameters of the network traffic. Hash keys may be selected such that uniformity is assured, and the key used in hash computation may be synchronized across all of the nodes so that only one node determines that it should process the particular packets or traffic flow.Type: GrantFiled: June 15, 2012Date of Patent: November 18, 2014Assignee: Citrix Systems, Inc.Inventors: Sandhya Gopinath, Ranjith Nath, Abhishek Chauhan
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Patent number: 8886913Abstract: An identifier management apparatus capable of setting identifier conversion information of a new user without affecting identifier conversion processings of other users, and an identifier management method. The identifier management apparatus converts an identifier given to communication data. Its memory stores multiple hash functions, output values of the hash functions corresponding to the respective plurality of hash functions, multiple entry tables that manage the identifier conversion information indicating a correspondence between the input identifier being an input value of the hash function and an output identifier obtained by converting the input identifier, and a management table for managing a setting status of the identifier conversion information in each entry table.Type: GrantFiled: May 2, 2012Date of Patent: November 11, 2014Assignee: Hitachi, Ltd.Inventors: Kenji Fujihira, Yoshihiro Ashi, Masayuki Takase
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Patent number: 8880901Abstract: An embodiment generally pertains to a method of secure address handling in a processor. The method includes detecting an instruction that implicitly designates a target address and retrieving an encoded location associated with the target address. The method also includes decoding the encoded location to determine the target address. Another embodiment generally relates to detecting an instruction having an operand designating an encoded target address and determining a location of a target instruction associated with the target address. The method also includes determining a location of a subsequent instruction and encoding the location of the subsequent instruction. The method further includes storing the encoded location of the subsequent instruction.Type: GrantFiled: May 25, 2006Date of Patent: November 4, 2014Assignee: Red Hat, Inc.Inventor: Ulrich Drepper
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Patent number: 8874877Abstract: Methods and systems to intelligently cache content in a virtualization environment using virtualization software such as VMWare ESX or Citrix XenServer or Microsoft HyperV or Redhat KVM or their variants are disclosed. Storage IO operations (reads from and writes to disk) are analyzed (or characterized) for their overall value and pinned to cache if their value exceeds a certain defined threshold based on criteria specific to the New Technology File System (NTFS) file-system. Analysis/characterization of NTFS file systems for intelligent dynamic caching include analyzing storage block data associated with a Virtual Machine of interest in accordance with a pre-determined data model to determine the value of the block under analysis for long term or short term caching. Integer values assigned to different types of NTFS objects in a white list data structure called a catalog that can be used to analyze the storage block data.Type: GrantFiled: April 25, 2014Date of Patent: October 28, 2014Assignee: Atlantis Computing, Inc.Inventors: Chetan Venkatesh, Sagar Shyam Dixit
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Patent number: 8874876Abstract: A method for performing packet lookups is provided. Packets (which each have a body and a header) are received and parsed to parsing headers. A hash function is applied to each header, and each hashed header is compared with a plurality of binary rules stored within a primary table, where each binary rule is a binary version of at least one ternary rule from a first set of ternary rules. For each match failure with the plurality of rules, a secondary table is searched using the header associated with each match failure, where the secondary table includes a second set of ternary rules.Type: GrantFiled: December 12, 2011Date of Patent: October 28, 2014Assignee: Texas Instruments IncorporatedInventors: Sandeep Bhadra, Aman A. Kokrady, Patrick W. Bosshart, Hun-Seok Kim
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Patent number: 8868884Abstract: Methods and systems to intelligently cache content in a virtualization environment using virtualization software such as VMWare ESX or Citrix XenServer or Microsoft HyperV or Redhat KVM or their variants are disclosed. Storage IO operations (reads from and writes to disk) are analyzed (or characterized) for their overall value and pinned to cache if their value exceeds a certain defined threshold based on criteria specific to the New Technology File System (NTFS) file-system. Analysis/characterization of NTFS file systems for intelligent dynamic caching include analyzing storage block data associated with a Virtual Machine of interest in accordance with a pre-determined data model to determine the value of the block under analysis for long term or short term caching. Integer values assigned to different types of NTFS objects in a white list data structure called a catalog that can be used to analyze the storage block data.Type: GrantFiled: April 25, 2014Date of Patent: October 21, 2014Assignee: Atlantis Computing, Inc.Inventors: Chetan Venkatesh, Sagar Shyam Dixit
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Patent number: 8867355Abstract: An apparatus and methods for transmitting information over a home coax network are provided. A method according to the invention for transmitting information over a home coax network preferably includes adding a multicast transmission mode to a system that previously only had unicast transmission mode and broadcast mode. The method preferably includes broadcasting multicast (“MC”) traffic. The MC traffic may be directed to a predetermined MC group. The MC traffic may be transmitted from an ingress node to a plurality of egress nodes. A portion of the plurality of egress nodes may belong to the MC group. Upon receipt by at least one of the egress nodes of the MC traffic, the method may further include using the at least one egress node to filter the received MC traffic to determine whether the MC traffic is directed to a group for which the egress node is a member.Type: GrantFiled: July 14, 2010Date of Patent: October 21, 2014Assignee: Broadcom CorporationInventors: Philippe Klein, Avraham Kliger, Yitshak Ohana
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Patent number: 8862841Abstract: One embodiment of the present invention provides a distributed, differential electronic-data backup and archiving system that includes client computers and cells. Client computers execute front-end-application components of the distributed, differential electronic-data backup and archiving system, the front-end application components receiving data objects from client computers and sending the received data objects to cells of the distributed, differential electronic-data backup and archiving system for storage. Cells within the distributed, differential electronic-data backup and archiving system store the data objects, each cell comprising at least one computer system with attached mass-storage and each cell storing entire data objects as lists that reference stored, unique data chunks within the cell, a cell storing all of the unique data chunks for all data objects stored in the cell.Type: GrantFiled: April 25, 2006Date of Patent: October 14, 2014Assignee: Hewlett-Packard Development Company, L.P.Inventors: Samuel A. Fineberg, Pankaj Mehra
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Patent number: 8856491Abstract: A computing device is provided and includes a memory module, a sweep engine, a root snapshot module, and a trace engine. The memory module has a memory implemented as at least one hardware circuit. The memory module uses a dual-ported memory configuration. The sweep engine includes a stack pointer. The sweep engine is configured to send a garbage collection signal if the stack pointer falls below a specified level. The sweep engine is in communication with the memory module to reclaim memory. The root snapshot engine is configured to take a snapshot of roots from at least one mutator if the garbage collection signal is received from the sweep engine. The trace engine receives roots from the root snapshot engine and is in communication with the memory module to receive data.Type: GrantFiled: May 23, 2012Date of Patent: October 7, 2014Assignee: International Business Machines CorporationInventors: David F. Bacon, Perry S. Cheng, Sunil K. Shukla
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Patent number: 8856445Abstract: Methods and apparatus are provided for performing byte caching using a chunk size based on the object type of the object being cached. Byte caching is performed by receiving at least one data packet from at least one network node; extracting at least one data object from the at least one data packet; identifying an object type associated with the at least one data packet; determining a chunk size associated with the object type; and storing at least a portion of the at least one data packet in a byte cache based on the determined chunk size. The chunk size of the object type can be determined, for example, by evaluating one or more additional criteria, such as network conditions and object size. The object type may be, for example, an image object type; an audio object type; a video object type; and a text object type.Type: GrantFiled: May 24, 2012Date of Patent: October 7, 2014Assignee: International Business Machines CorporationInventors: Dakshi Agrawal, Franck Le, Vasileios Pappas, Mudhakar Srivatsa, Dinesh C. Verma
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Patent number: 8850127Abstract: Various embodiments of the present invention allow concurrent accesses to a cache. A request to update an object stored in a cache is received. A first data structure comprising a new value for the object is created in response to receiving the request. A cache pointer is atomically modified to point to the first data structure. A second data structure comprising an old value for the cached object is maintained until a process, which holds a pointer to the old value of the cached object, at least one of one of ends and indicates that the old value is no longer needed.Type: GrantFiled: March 27, 2014Date of Patent: September 30, 2014Assignee: International Business Machines CorporationInventors: Paul M. Dantzig, Robert O. Dryfoos, Sastry S. Duri, Arun Iyengar
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Patent number: 8849772Abstract: Data replication with delta compression is disclosed. A primary system and a replica system are determined to both have an identical first data segment that is similar to a second data segment. The second data segment is encoded, wherein the encoding refers to the first data segment.Type: GrantFiled: November 14, 2008Date of Patent: September 30, 2014Assignee: EMC CorporationInventors: Mark Huang, Philip Shilane, Grant Wallace, Ming Benjamin Zhu
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Patent number: 8850101Abstract: In one embodiment, a system comprises a plurality of memory ports. The memory ports are distributed into a plurality of subsets, where each subset is identified by a subset index. The system further comprises a first address hashing unit configured to receive a request including at least one virtual memory address. Each virtual memory address is associated with a replication factor, and the virtual memory address refers to graph data. The first address hashing unit translates the replication factor into a corresponding subset index based on the virtual memory address, and converts the virtual memory address to a hardware based memory address. The hardware based address refers to data in the memory ports within a subset indicated by the corresponding subset index.Type: GrantFiled: September 11, 2013Date of Patent: September 30, 2014Assignee: Cavium, Inc.Inventors: Jeffrey A. Pangborn, Gregg A. Bouchard, Rajan Goyal, Richard E. Kessler
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Patent number: 8838937Abstract: A flash memory controller, a computer readable medium and a method for writing to a flash memory device, the method may include receiving multiple logical pages, each logical page having a logical address; determining to write a logical page into a selected physical page of the flash memory device; calculating a hash value for each logical page of the multiple logical pages in response to (a) a logical address of the logical page and (b) a physical page index, to provide multiple hash values of the multiple logical pages.Type: GrantFiled: May 23, 2012Date of Patent: September 16, 2014Assignee: Densbits Technologies Ltd.Inventors: Michael Katz, Hanan Weingarten
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Patent number: 8831003Abstract: A capability is provided for reducing or even eliminating redundant traffic in cellular wireless networks. A method is provided for encoding a target packet in a manner for reducing redundancy of information in the target packet. The method includes identifying a region of the target packet that matches a region of a stored packet, removing, from the target packet, the identified region of the target packet from the target packet, and inserting, within the target packet, an encoding key comprising a hash of the stored packet. A method is provided for reconstructing a packet from an encoded packet that is encoded in a manner for reducing redundancy of information in a network. The method includes identifying an encoding key within the encoded packet, wherein the encoding key comprises a hash of a stored packet, retrieving the stored packet using the hash of the stored packet, removing the encoding key from the encoded packet, and inserting information from the stored packet within the encoded packet.Type: GrantFiled: June 20, 2013Date of Patent: September 9, 2014Assignee: Alcatel LucentInventors: Katherine H. Guo, Cristian Lumezanu
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Patent number: 8832375Abstract: One or more embodiments perform byte caching. At least one data packet is received from at least one network node. At least one data object is received from the at least one data packet. An object type associated with the at least one data object is identified. The at least one data object is divided into a plurality of byte sequences based on the object type that is associated with the at least one data object. At least one byte sequence in the plurality of byte sequences is stored into a byte cache.Type: GrantFiled: May 24, 2012Date of Patent: September 9, 2014Assignee: International Business Machines CorporationInventors: Dakshi Agrawal, Thai V. Le, Vasileios Pappas, Mudhakar Srivatsa, Dinesh Verma
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Patent number: 8825985Abstract: Mechanisms are provided for data transfer reduction in scale out architectures. When a compute node receives a write input/output (I/O) request for a data stream, the compute node separates the data stream into chunks and generates fingerprints for the individual chunks. Fingerprints are then sent to a scale out node and compared to fingerprints of chunks already maintained at the scale out node. Write data transfers are only made for chunks not already maintained at the scale out node. For a read I/O request for a data stream, fingerprints for chunks of the data stream are requested by the compute node from a scale out node. Fingerprints received are compared to fingerprints of chunks already maintained at the compute node and read data transfers are only made for chunks not already maintained at the compute node.Type: GrantFiled: July 14, 2011Date of Patent: September 2, 2014Assignee: Dell Products L.P.Inventors: Vinod Jayaraman, Abhijit Dinkar
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Patent number: 8823720Abstract: Methods, systems and data structures produce a rasterizer. A graphical state is detected on a machine architecture. The graphical state is used for assembling a shell rasterizer. The machine architecture is used for selecting replacement logic that replaces portions of shell logic in the shell rasterizer. The machine architecture is used for selectively inserting memory management logic into portions of the shell logic to produce.Type: GrantFiled: April 17, 2013Date of Patent: September 2, 2014Assignee: Intel CorporationInventors: William A. Hux, Stephen Junkins
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Patent number: 8826023Abstract: Various methods and systems for securing access to hash-based storage systems are disclosed. One method involves receiving information to be stored in a storage system from a storage system client and then generating a key. The key identifies the information to be stored. The value of the key is dependent upon a secret value, which is associated with the storage system. The key is generated, at least in part, by applying a hash algorithm to the information to be stored. The key can then be returned the key to the storage system client. The storage system client can then use the key to retrieve the stored information.Type: GrantFiled: June 30, 2006Date of Patent: September 2, 2014Assignee: Symantec Operating CorporationInventor: Craig K. Harmer
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Patent number: 8819390Abstract: Patterns of access and/or behavior can be analyzed and persisted for use in pre-fetching data from a physical storage device. In at least some embodiments, data can be aggregated across volumes, instances, users, applications, or other such entities, and that data can be analyzed to attempt to determine patterns for any of those entities. The patterns and/or analysis can be persisted such that the information is not lost in the event of a reboot or other such occurrence. Further, aspects such as load and availability across the network can be analyzed to determine where to send and/or store data that is pre-fetched from disk or other such storage in order to reduce latency while preventing bottlenecks or other such issues with resource availability.Type: GrantFiled: March 11, 2013Date of Patent: August 26, 2014Assignee: Amazon Technoligies, Inc.Inventors: Swaminathan Sivasubramanian, Bradley Eugene Marshall, Tate Andrew Certain, Nicholas J. Maniscalco
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Patent number: 8819348Abstract: Provided is a method for uniquely masking addressing to the cache memory for each user, thereby reducing risk of a timing attack by one user on another user. The method comprises assigning a first mask value to the first user and a second mask value to the second user. The mask values are unique to one another. While executing a first instruction on behalf of the first user, the method comprises applying the first mask value to set selection bits in a memory address accessed by the first instruction. While executing a second instruction on behalf of the second user, the method comprises applying the second mask value to set selection bits in the memory address accessed by the second instruction. The result offers an additional level of security between users as well as reducing the occurrence of threads or processes contending for the same memory address.Type: GrantFiled: July 12, 2006Date of Patent: August 26, 2014Assignee: Hewlett-Packard Development Company, L.P.Inventors: Blaine D. Gaither, Benjamin D. Osecky
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Patent number: 8806175Abstract: A hash table system having a first hash table and a second hash table is provided. The first hash table may be in-memory and the second hash table may be on-disk. Inserting an entry to the hash table system comprises inserting the entry into the first hash table, and, when the first hash table reaches a threshold load factor, flushing entries into the second hash table. Flushing the first hash table into the second hash table may comprise sequentially flushing the first hash table segments into corresponding second hash table segments. When looking up a key/value pair corresponding to a selected key in the hash table system, the system checks both the first and second hash tables for values corresponding to the selected key. The first and second hash tables may be divided into hash table segments and collision policies may be implemented within the hash table segments.Type: GrantFiled: February 6, 2013Date of Patent: August 12, 2014Assignee: Longsand LimitedInventors: Peter D. Beaman, Robert S. Newson, Tuyen M. Tran
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Patent number: 8804507Abstract: A method, apparatus and computer program product for temporal-based flow distribution across multiple packet processors is presented. A packet is received and a hash identifier (ID) is computed for the packet. The hash ID is used to index into a State Table and to retrieve a corresponding record. When a time credit field of the record is zero then the time credit field is set to a to a new value; a Packet Processing Engine (PE) whose First-In-First-Out buffer (FIFO) has the lowest fill level is selected; and a PE number field in the state table record is updated with the selected PE number. When the time credit field of the record is non-zero then the packet is sent to a PE based on the value stored in the record; and the time credit field in the record is decremented if the time credit field is greater than zero.Type: GrantFiled: March 31, 2011Date of Patent: August 12, 2014Assignee: Avaya, Inc.Inventor: Hamid Assarpour
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Patent number: 8806174Abstract: A system and method are disclosed for storing data in a hash table. The method includes receiving data, determining a location identifier for the data wherein the location identifier identifies a location in the hash table for storing the data and the location identifier is derived from the data, compressing the data by extracting the location identifier; and storing the compressed data in the identified location of the hash table.Type: GrantFiled: November 15, 2012Date of Patent: August 12, 2014Assignee: STEC, Inc.Inventors: Mohammad Reza Sadri, Saied Kazemi, Siddharth Choudhuri
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Patent number: 8806173Abstract: A storage device includes first and second buffers. A request to write a new record from a host is received. A hash value (new S) of the new record is calculated. The hash value (new S) of the new record is checked to determine if the hash value exists in a second buffer. If the new S exists in the second buffer, the new record is compared with a record stored in the second buffer corresponding to the new S to check if the new record and the stored record in the second buffer match each other. If the new record and the stored record match each other, a pointer (a record number) is written as write data of the new record to the recording medium. The pointer points to the record already stored in any one of a recording medium and the second buffer.Type: GrantFiled: August 24, 2011Date of Patent: August 12, 2014Assignee: International Business Machines CorporationInventor: Yutaka Oishi
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Patent number: 8799619Abstract: Disclosed herein are a method, a system, and a computer-readable recording medium for providing distributed programming environment by using a distributed space. According to an aspect of the present invention, there is provided a method for processing data in distributed environment, the method including: generating a virtual space using resources provided by a plurality of nodes; and reading or writing data from or in the virtual space by a first application, wherein the data are mapped to a specific location region on the virtual space determined according to attributes of the data and the first application performs a reading operation or a writing operation for the data in the location region.Type: GrantFiled: April 17, 2009Date of Patent: August 5, 2014Assignee: NHN CorporationInventors: Woo Hyun Kim, Du-Ho Kim, Tae Il Yun
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Publication number: 20140215181Abstract: The described systems and methods can facilitate efficient and effective information storage. In one embodiment a system includes a hash component, a queue request order component and a request queue component. The hash component is operable to hash a request indication. The queue request order component is operable to track a queue request order. The request queue component is operable to queue and forward requests in accordance with direction from the queue request order component. In one embodiment, the storage component maintains a request without stalling a request in an aliasing condition.Type: ApplicationFiled: January 28, 2013Publication date: July 31, 2014Applicant: APPLIED MICRO CIRCUITS CORPORATIONInventor: Kjeld SVENDSEN
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Patent number: 8788791Abstract: A comparand word is input to a plurality of hash circuits with each hash circuit responding to a different portion of the comparand word. The hash circuit outputs a hash signal which enables or pre-charges portions of a content addressable memory (CAM). The comparand word is also input to the CAM. The CAM compares the comparand word in the pre-charged portions of the CAM and outputs information responsive to the comparison. When Internet addresses are processed, the output information may be port information or an index for locating.Type: GrantFiled: January 6, 2012Date of Patent: July 22, 2014Assignee: Micron Technology, Inc.Inventor: Keith R. Slavin
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Patent number: 8788841Abstract: Techniques for representation and verification of data are disclosed. The techniques are especially useful for representation and verification of the integrity of data (integrity verification) in safe computing environments and/or systems (e.g., Trusted Computing (TC) systems and/or environments). Multiple independent representative values can be determined independently and possibly in parallel for respective portions of the data. The independent representative values can, for example, be hash values determined at the same time for respective distinct portions of the data. The integrity of the data can be determined based on the multiple hash values by, for example, processing them to determine a single hash value that can serve as an integrity value.Type: GrantFiled: October 23, 2008Date of Patent: July 22, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Onur Aciicmez, Jean-Pierre Seifert, Xinwen Zhang, Afshin Latifi
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Patent number: 8782375Abstract: Managing storage identifiers in a pool is facilitated by providing a hashing-based management protocol in association with a stack which accommodates storage identifiers of the pool. The hashing-based management protocol includes: based on a request, popping a storage identifier from the stack without evaluating for update of a hash link associated with the stack, potentially allowing the hash link to become inconsistent with storage identifiers remaining in the stack; and based on return of a freed storage identifier to the stack, hashing the freed storage identifier and identifying whether there is an inconsistency in the hash link related to return of the freed storage identifier, and based on identifying the inconsistency, one of updating the hash link to remove the inconsistency, or indicating, where ascertained, that the freed storage identifier is a duplicate storage identifier.Type: GrantFiled: January 17, 2012Date of Patent: July 15, 2014Assignee: International Business Machines CorporationInventors: Charles E. Mari, Harris M. Morgenstern
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Patent number: 8775393Abstract: A representation of a new rule, defined as a set of a new transition(s), is inserted into a perfect hash table which includes previously placed transitions to generate an updated perfect hash table. This may be done by, for each new transition: (a) hashing the new transition; and (b) if there is no conflict, inserting the hashed new transition into the table. If, however, the hashed new transition conflicts with any of the previously placed transitions, either (A) any transitions of the state associated with the conflicting transition are removed from the table, the hashed new transition is placed into the table, and the removed transitions are re-placed into the table, or (B) any previously placed transitions of the state associated with the new transition are removed, and the transitions of the state associated with the new transition are re-placed into the table.Type: GrantFiled: March 1, 2012Date of Patent: July 8, 2014Assignee: Polytechniq Institute of New York UniversityInventors: H. Jonathan Chao, Yang Xu
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Patent number: 8775776Abstract: A hash table method and structure comprises a processor that receives a plurality of access requests for access to a storage device. The processor performs a plurality of hash processes on the access requests to generate a first number of addresses for each access request. Such addresses are within a full address range. Hash table banks are operatively connected to the processor. The hash table banks form the storage device. Each of the hash table banks has a plurality of input ports. Specifically, each of the hash table banks has less input ports than the first number of addresses for each access request. The processor provides the addresses to the hash table banks, and each of the hash table banks stores pointers corresponding to a different limited range of addresses within the full address range (each of the different limited range of addresses is less than the full address range).Type: GrantFiled: January 18, 2012Date of Patent: July 8, 2014Assignee: International Business Machines CorporationInventors: Bulent Abali, John J. Reilly