Garbage Collection, I.e., Reclamation Of Unreferenced Memory (epo) Patents (Class 711/E12.009)
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Publication number: 20120278585Abstract: This disclosure provides a computing system and method to profile a program for finding potential optimization in heap usage by reducing lag and drag in lifetimes of heap memory blocks. The process consists of three steps. First, an instrumentation engine analyzes a given program, and inserts additional code at interesting locations to collect needed information. Second, when the instrumented program is executed on a set of test cases, runtime data is collected. Third, since this data could be relatively large for a complex and long running program, data is processed to present it to a user in useful ways so that the programmer can improve the heap utilization in the program.Type: ApplicationFiled: May 2, 2012Publication date: November 1, 2012Applicant: International Business Machines CorporationInventors: Satish Chandra Gupta, Kumar Rangarajan
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Publication number: 20120278530Abstract: A memory controller receives memory access requests from a host terminal, the memory access requests from the host terminal including one or both of host read requests and host write requests. The memory controller generates memory access requests. Priorities are assigned to the memory access requests. The memory access requests are segregated to memory unit queues of at least one set of memory unit queues, the set of memory unit queues associated with a memory unit. Each memory access request is sent to the memory unit according to a priority and an assigned memory unit queue of the memory access request.Type: ApplicationFiled: April 28, 2011Publication date: November 1, 2012Applicant: SEAGATE TECHNOLOGY LLCInventor: David Scott Ebsen
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Publication number: 20120278539Abstract: A memory apparatus includes: a plurality of flash memory sections connected to a common data line; and a control section configured to perform control for data read/write on the plurality of flash memory sections, wherein the control section performs control so as to give a read instruction to a first flash memory section among the plurality of flash memory sections to output read data from the first flash memory section onto the common data line, and to give a write instruction to a second flash memory section other than the first flash memory section to write the read data obtained on the common data line into the second flash memory section with timing in accordance with timing of outputting the read data from the first flash memory section.Type: ApplicationFiled: March 16, 2012Publication date: November 1, 2012Applicant: SONY CORPORATIONInventor: Yuto Hosogaya
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Patent number: 8291187Abstract: Mechanisms for memory management in a scoped memory system are provided. The scoped memory system includes a scoped memory area for the allocation of objects therein for access by one or more software threads in execution. The scoped memory area has an associated thread count for indicating that the scoped memory area is discardable. The mechanisms identify a set of root references for objects allocated in the scoped memory area and recursively traverses and marks objects that are referenced from the set of root references and that are allocated in the scoped memory area. The mechanisms further identify objects in the scoped memory area that are not so marked and discards the identified objects.Type: GrantFiled: September 23, 2008Date of Patent: October 16, 2012Assignee: International Business Machines CorporationInventor: Andrew Johnson
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Patent number: 8266371Abstract: A memory controller, a non-volatile storage device, a host device, and a non-volatile storage system capable of performing real-time recording even in the case where normal data and file management information/auxiliary information are written in alternating manner are provided. The host device (2) issues a memory management command before the start, after the end, or both before and after the start and end of real-time recording. When the non-volatile storage device (1) receives the memory management command, an internal memory controller (11) clears memory control information and performs garbage collection as necessary.Type: GrantFiled: July 28, 2009Date of Patent: September 11, 2012Assignee: Panasonic CorporationInventor: Masayuki Toyama
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Publication number: 20120221821Abstract: A method of managing a memory in a computer system including a processor executing programs and the memory, the memory including a first area, which is managed by a garbage collector, and a second area, which is not managed by the garbage collector, the method including the steps executed by the processor of: checking a reference relation of basic point data associated with the second area by tracing references from the basic point data; when the reference relation of the basic point data has a structure including a reference to data belonging to the same class as the class of the basic point data, determining that particular data out of data constituting the structure is prohibited from being migrated to the second area; and migrating data stored in the first area out of data remaining after excluding the particular data from the data constituting the structure to the second area.Type: ApplicationFiled: March 8, 2010Publication date: August 30, 2012Inventors: Motoki Obata, Hiroyasu Nishiyama, Masahiko Adachi
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Patent number: 8250325Abstract: A data deduplication method using a small hash digest dictionary in fast-access memory. The method includes receiving customer data, dividing the data into smaller chunks, and assigning hash values to each chunk. For each chunk, the method includes performing lookup for a duplicate chunk by accessing a small dictionary in memory with the chunk's hash value. When no entry, the small dictionary is updated to include the hash value to fill the dictionary with earliest received data. When an entry is found, the entry's hash value is compared with lookup value and if matched, reference data is returned and an entry counter is incremented. If not matched, additional accesses are attempted such as with additional indexes calculated using the hash value. Collisions may trigger an entry replacement such that some initially entered entries are replaced when determined to not be most repeating values such as based on their counter value.Type: GrantFiled: April 1, 2010Date of Patent: August 21, 2012Assignee: Oracle International CorporationInventors: Jon Mark Holdman, Robert Michael Raymond, Atiq Ahamad, John Richard Kostraba, Jr., Carl T. Madison, Jr.
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Publication number: 20120198174Abstract: An apparatus, system, and method are disclosed for managing eviction of data. A cache write module stores data on a non-volatile storage device sequentially using a log-based storage structure having a head region and a tail region. A direct cache module caches data on the non-volatile storage device using the log-based storage structure. The data is associated with storage operations between a host and a backing store storage device. An eviction module evicts data of at least one region in succession from the log-based storage structure starting with the tail region and progressing toward the head region.Type: ApplicationFiled: January 31, 2012Publication date: August 2, 2012Applicant: FUSION-IO, INC.Inventors: David Nellans, David Atkisson, Jim Peterson, Jeremy Garff, Mike Zappe
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Publication number: 20120191664Abstract: Systems and methods for coordinating sync points between a non-volatile memory (“NVM”) and a file system are provided. In some embodiments, a file system can issue one or more commands to control circuitry of a NVM, which can indicate whether a transaction is journaled or non-journaled. This way, the control circuitry can maintain a list of journaled transactions and corresponding LBA(s). By keeping track of journaled transactions, the control circuitry can ensure that sync points are not prematurely erased during a garbage collection process. In addition, upon detecting device failure events, the control circuitry can roll back to sync points corresponding to one or more journaled transactions.Type: ApplicationFiled: January 24, 2011Publication date: July 26, 2012Applicant: Apple Inc.Inventors: Nir J. Wakrat, Daniel J. Post, Dominic Giampaolo
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Patent number: 8225050Abstract: The present invention discloses a control method of a memory storage device which includes a high density memory. The high density memory is composed of a plurality of MSB pages and LSB pages. The major feature of the method is such that it determines the property of data by its data length, and then decides where the data is to be written according to its property.Type: GrantFiled: June 10, 2009Date of Patent: July 17, 2012Assignee: A-Data Technology Co., Ltd.Inventors: Li-Pin Chang, Ming-Dar Chen
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Publication number: 20120137101Abstract: A method, system and computer program product for optimizing memory usage of an application running on a virtual machine. A virtual machine memory block is pre-allocated and the average memory usage of the virtual machine is periodically computed using statistics collected from the virtual machine through an API. If the memory usage average becomes higher than a maximum threshold, then a recovery mode is entered by releasing the virtual machine memory block and forcing the running application to reduce its processing activity; optionally, a garbage collector cycle can be forced. If the computed memory usage average becomes lower than a minimum threshold value, which is lower than the maximum threshold value, then a normal mode is entered by re-allocating the virtual machine memory block and forcing the running application to resumes its normal processing activity. Optionally, when the virtual machine is idle, a deep garbage collection is forced.Type: ApplicationFiled: November 7, 2011Publication date: May 31, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Mauro Arcese, Stefano Sidoti
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Patent number: 8190811Abstract: A data storage device includes a solid state data storage medium, a set of related data blocks and a controller. The set of related data blocks are non-contiguously stored on the data storage medium and have an original write sequence. The controller, responsive to a defragmentation request, maps the physical block addresses of the set of related data blocks to contiguous logical block addresses in the original write sequence while maintaining the non-contiguous physical block addresses of the set of related data blocks on the data storage medium.Type: GrantFiled: June 9, 2009Date of Patent: May 29, 2012Assignee: Seagate Technology, LLCInventors: John Edward Moon, Todd Ray Strope
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Patent number: 8190843Abstract: Methods, systems, and computer program products for dynamically allocating memory among a plurality of processes are disclosed. According to one aspect, the subject matter described herein includes a method for dynamically allocating memory among multiple processes. The method includes at a memory broker for allocating memory in a computer system among a plurality of processes executing on the computer system and separate from the memory broker, monitoring amounts of stationary memory, discretionary memory, and unallocated memory in the computer system. The memory broker receives a request for allocating discretionary memory to one of the processes, and in response, determines, using an allocation policy, whether to allocate discretionary memory to the one process. In response to determining to allocate the discretionary memory to the one process, the memory broker allocates the discretionary memory to the one process.Type: GrantFiled: September 27, 2007Date of Patent: May 29, 2012Assignee: EMC CorporationInventors: Miles Aram de Forest, Somnath A. Gulve
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Patent number: 8190823Abstract: An apparatus, system, and method are disclosed for deduplicating storage cache data. A storage cache partition table has at least one entry associating a specified storage address range with one or more specified storage partitions. A deduplication module creates an entry in the storage cache partition table wherein the specified storage partitions contain identical data to one another within the specified storage address range thus requiring only one copy of the identical data to be cached in a storage cache. A read module accepts a storage address within a storage partition of a storage subsystem, to locate an entry wherein the specified storage address range contains the storage address, and to determine whether the storage partition is among the one or more specified storage partitions if such an entry is found.Type: GrantFiled: September 18, 2008Date of Patent: May 29, 2012Assignee: Lenovo (Singapore) Pte. Ltd.Inventors: Rod D. Waltermann, Mark Charles Davis
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Patent number: 8185687Abstract: According to one embodiment, a semiconductor storage device includes a queuing buffer, a read module, a separating module, a write command issuing module, and a write module. The write command issuing module is configured to add a write address indicated by write pointer information to the management data obtained by the separating module in order to issue a write command, and to automatically queue the write command into the queuing buffer. The write module is configured to supply the write command issued by the write command issuing module to the nonvolatile memory in order to write data into the nonvolatile memory.Type: GrantFiled: January 28, 2011Date of Patent: May 22, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Motohiro Matsuyama, Tohru Fukuda, Hiroyuki Moro
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Publication number: 20120117406Abstract: A method for memory management in a mobile device, and a mobile device for performing the method, are provided. The mobile device performs garbage collection in a flexible manner after transitioning from the sleep state to the wakeup state according to the paging cycle. This contributes to securing the sleep interval for the mobile device and reducing power consumption. The memory management method includes transitioning from a sleep state to a wakeup state, performing a paging procedure in the wakeup state, determining whether to initiate garbage collection after completion of the paging procedure, performing, when it is determined that garbage collection is to be initiated, garbage collection according to a paging cycle, and transitioning from the wakeup state to the sleep state after completion of garbage collection.Type: ApplicationFiled: November 9, 2011Publication date: May 10, 2012Applicant: SAMSUNG ELECTRONICS CO. LTD.Inventor: Gee Sung Eun
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Patent number: 8171239Abstract: A storage management system and a storage management method are provided. The storage management system includes a host, a memory buffer, a plurality of storage blocks, and an input/output bus to perform an interface function among the host, the memory buffer, and the plurality of storage blocks, wherein each of the plurality of storage blocks is connected with the input/output bus via a corresponding channel, and the plurality of storage blocks is managed for each channel group generated by grouping at least one channel.Type: GrantFiled: March 20, 2008Date of Patent: May 1, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Keun Soo Yim, Gyu Sang Choi
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Patent number: 8171254Abstract: According to one embodiment, a memory controller comprises a counter and a setting module. The counter is configured to count the number of valid pages in a block includes a page to be invalidated, when data is written in a nonvolatile memory. The setting module is configured to set the block as an object of compaction when the number of valid pages counted by the counter is smaller than a predetermined number.Type: GrantFiled: January 21, 2011Date of Patent: May 1, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Takeshi Takamiya, Yoshimasa Aoyama
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Methods and apparatus to share a thread to reclaim memory space in a non-volatile memory file system
Patent number: 8161226Abstract: Example methods and apparatus to share a thread to reclaim memory space in non-volatile memory file systems are disclosed. A disclosed example method includes associating a memory reclaim thread with first and second flash memory volumes to reclaim memory space in the first and second flash memory volumes and reclaiming the memory space in at least one of the first and second flash memory volumes via the memory reclaim thread.Type: GrantFiled: December 27, 2005Date of Patent: April 17, 2012Assignee: Intel CorporationInventors: Ajith K. Illendula, Philip F. Low -
Patent number: 8156279Abstract: This storage device performs deduplication of eliminating duplicated data by storing a logical address of one or more corresponding logical unit memory areas in a prescribed management information storage area of a physical unit memory area defined in the storage area provided by the flash memory chip, and executes a reclamation process of managing a use degree as the total number of the logical addresses used stored in the management information storage area and a duplication degree as the number of valid logical addresses corresponding to the physical unit memory area for each of the physical unit memory areas, and returning the physical unit memory area to an unused status when the difference of the use degree and the duplication degree exceeds a default value in the physical unit memory area.Type: GrantFiled: October 15, 2010Date of Patent: April 10, 2012Assignee: Hitachi, Ltd.Inventors: Katsuya Tanaka, Shuji Nakamura, Makio Mizuno
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Patent number: 8151086Abstract: Disclosed is a method of detecting an access to de-allocated memory, comprising: creating a pool of fixed size memory blocks that are a non-zero integer multiple of a page size of a processor; receiving a request for an allocation of a block of memory; recording a set of allocation context information in a fixed size memory block; returning a pointer to an allocation of memory within said fixed size memory block; receiving a request to de-allocate said block of memory; recording a set of de-allocation context information in said fixed size memory block; and, setting an indicator in a page table entry associated with said fixed size memory block to a first value that indicates access to said fixed size memory block is not allowed.Type: GrantFiled: October 9, 2008Date of Patent: April 3, 2012Assignee: LSI CorporationInventors: Ben McDavitt, Jeremy Zeller, Dale Harris
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Publication number: 20120066438Abstract: A memory device includes a control module to determine first data blocks needing a garbage collection, to determine second data blocks needing memory refresh among the determined first data blocks, and to execute the garbage collection first on the second data blocks.Type: ApplicationFiled: September 15, 2011Publication date: March 15, 2012Inventors: Han Bin YOON, Jang Hwan Kim, Jung Been Im
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Publication number: 20120059981Abstract: An apparatus, system, and method are disclosed for storage space recovery. A storage division selection module selects a first storage division for recovery. The first storage division comprises a portion of solid-state storage in a solid-state storage device. A data recovery module reads valid data from the first storage division in response to selecting the first storage division for recovery. The data recovery module stores the valid data in a second storage division of the solid-state storage device. The data recovery module passes the valid data through at least a portion of a write data pipeline for the solid-state storage device without passing the valid data to a host device and/or without routing the valid data outside of a solid-state storage controller for the solid-state storage device.Type: ApplicationFiled: November 15, 2011Publication date: March 8, 2012Applicant: FUSION-IO, INC.Inventors: David Flynn, Bert Lagerstedt, John Strasser, Jonathan Thatcher, John Walker, Michael Zappe, Stephan Uphoff, Joshua Aune, Kevin Vigor
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Publication number: 20120054415Abstract: Techniques are described for reducing write operations in memory. In use, write operations to be performed on data stored in memory are identified. A difference is then determined between results of the write operations and the data stored in the memory. Difference information is stored in coalescing memory buffers. To this end, the write operations may be reduced, utilizing the difference information.Type: ApplicationFiled: March 7, 2011Publication date: March 1, 2012Applicant: SANDFORCE INC.Inventor: Radoslav Danilak
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Patent number: 8127103Abstract: A storage device is provided, which allows a write area associated with a data area of interest to be allocated according to write performance of a host computer. The storage apparatus includes one or more flash memory packages having a plurality of flash memories and stores data transmitted from one or more host computers. A storage area provided by the one or more flash memory packages includes a first area that is an area for storing actual data formed by one or more logical devices and a second area that is an area for storing a write instruction from the host computer to the logical device. The first and second areas are provided in each of the one or more flash memory packages. The apparatus further includes a monitoring section monitoring the frequency of write instructions from the host computer and a changing section for changing the size of the second area according to the frequency of write instructions.Type: GrantFiled: October 9, 2008Date of Patent: February 28, 2012Assignee: Hitachi, Ltd.Inventors: Yoshiki Kano, Sadahiro Sugimoto
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Patent number: 8095730Abstract: A computer data storage system is described. A processor maintains a striped volume set by striping a data container over a plurality of storage nodes. A storage node determines whether space available on that node is below a predetermined threshold, the predetermined threshold indicating a low-in-space state. The storage node sends a message indicating that the storage node is in a low-in-space state. The processor accepts no further write messages to the data container as long as the storage node is in a low-in-space state.Type: GrantFiled: July 20, 2010Date of Patent: January 10, 2012Assignee: NetApp, Inc.Inventors: Tianyu Jiang, Richard P. Jernigan, IV, Eric Hamilton
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Patent number: 8074025Abstract: A memory manager that compacts a memory heap and reclaims space allocated to dead entities is disclosed. The memory manager may include threads of a first phase, threads of a second phase, and threads of a third phase. The threads of the first phase may assign a target address to each live entity of the memory heap. The thread of the second phase may update references of the memory heap based upon the target address for each live entity. The threads of the third phase may copy each live entity of the memory heap to its target address.Type: GrantFiled: December 11, 2007Date of Patent: December 6, 2011Assignee: Intel CorporationInventors: Ligang Wang, Xiao Feng Li
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Publication number: 20110283049Abstract: Embodiments of the invention are directed to optimizing the selection of memory blocks for garbage collection to maximize the amount of memory freed by garbage collection operations. The systems and methods disclosed herein provide for the efficient selection of optimal or near-optimal garbage collection candidate blocks, with the most optimal selection defined as block(s) with the most invalid pages. In one embodiment, a controller classifies memory blocks into various invalid block pools by the amount of invalid pages each block contains. When garbage collection is performed, the controller selects a block from a non-empty pool of blocks with the highest minimum amount of invalid pages. The pools facilitate the optimal or near-optimal selection of garbage collection candidate blocks in an efficient manner and the data structure of the pools can be implemented with bitmasks, which take minimal space in memory.Type: ApplicationFiled: May 12, 2010Publication date: November 17, 2011Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: HO-FAN KANG, ALAN CHINGTAO KAN
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Publication number: 20110264843Abstract: An example method includes providing at least two data storage areas in a memory, providing a first amount of over-provisioning for a first of the at least two data storage areas and a second amount of over-provisioning for a second of the at least two data storage areas, categorizing data based on a characteristic of the data, and storing the data in one of the at least two data storage areas based on the categorization.Type: ApplicationFiled: April 22, 2010Publication date: October 27, 2011Applicant: Seagate Technology LLCInventors: Jonathan W. Haines, Timothy R. Feldman, Wayne H. Vinson, Ryan J. Goss, Kevin Gomez, Mark Allen Gaertner
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Publication number: 20110264880Abstract: Objects are copied concurrently with mutator execution, while tracking writes to the objects being copied. Objects (or fields) that are written into during copying are re-copied to the same destination locations. Mutators use the original objects until copying is complete and are, in some embodiments, atomically (with respect to the mutators) switched to use the new copies, together with a final re-copy.Type: ApplicationFiled: May 3, 2010Publication date: October 27, 2011Applicant: TATU YLONEN OY LTDInventor: Tatu J. Ylonen
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Publication number: 20110252216Abstract: A write barrier is implemented using thread-local hash table based write barrier buffers. The write barrier, executed by mutator threads, stores addresses of written memory locations or objects in the thread-local hash tables, and during garbage collection, an explicit or implicit union of the addresses in each hash table is used in a manner that is tolerant to an address appearing in more than one hash table.Type: ApplicationFiled: April 12, 2010Publication date: October 13, 2011Applicant: TATU YLONEN OY LTDInventors: Tatu J. Ylonen, Tero T. Mononen
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Publication number: 20110252199Abstract: Mechanisms are provided for data placement optimization during runtime of a computer program. The mechanisms detect cache misses in a cache of the data processing system and collect cache miss information for objects of the computer program. Data context information is generated for an object in an object access sequence of the computer program. The data context information identifies one or more additional objects accessed as part of the object access sequence in association with the object. The cache miss information is correlated with the data context information of the object. Data placement optimization is performed on the object, in the object access sequence, with which the cache miss information is associated. The data placement optimization places connected objects in the object access sequence in close proximity to each other in a memory structure of the data processing system.Type: ApplicationFiled: April 9, 2010Publication date: October 13, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Mauricio J. Serrano, Xiaotong Zhuang
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Publication number: 20110238886Abstract: Systems and methods are provided for handling uncorrectable errors that may occur during garbage collection of an index page or block in non-volatile memory.Type: ApplicationFiled: March 23, 2010Publication date: September 29, 2011Applicant: Apple Inc.Inventors: Daniel J. Post, Vadim Khmelnitsky
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Publication number: 20110231599Abstract: A storage apparatus includes: an input/output section configured to input and output data related to an external access; a memory for storing input data input by the input/output section by distributing the input data to a plurality of areas while making use of a cache area for temporarily storing the input data; and a control section configured to make an access to the memory on the basis of the external access and carry out a garbage correction operation on the areas including the cache area in order to release the cache area in the access made to the memory on the basis of the external access.Type: ApplicationFiled: February 28, 2011Publication date: September 22, 2011Applicant: SONY CORPORATIONInventors: Keita Kawamura, Shingo Aso
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Publication number: 20110231623Abstract: Method and apparatus for handling data in a data storage device. In accordance with some embodiments, a memory space with a plurality of garbage collection units (GCUs) that are each arranged into pages of memory that store user data identified by logical addresses (LAs) and each GCU has a metadata region that stores metadata that correlates the LAs with physical addresses (PAs). A header region in each page of memory stores a bitmask and a sequence map of the LAs in each page that are used by a log manager to creates a bitmask table stored in a first cache and a hierarchical log stored in a second cache. The bitmask table and hierarchical log are used to determine when the LAs stored in the selected GCU are stale, and update the bitmask for each page in the selected GCU after the stale data has been erased.Type: ApplicationFiled: March 17, 2010Publication date: September 22, 2011Applicant: SEAGATE TECHNOLOGY LLCInventors: Ryan James Goss, Mark Allen Gaertner
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Publication number: 20110225347Abstract: In general, this disclosure relates to storage of logical blocks in a storage device. Aspects of this disclosure describe techniques to monitor the frequency of access of one or more logical blocks referenced by one or more logical block addresses. Based on the frequency of access, in non-limiting aspects of this disclosure, a controller may select one or more physical blocks of a common memory storage block. The storage device may store the logical blocks in the selected physical blocks.Type: ApplicationFiled: March 10, 2010Publication date: September 15, 2011Applicant: Seagate Technology LLCInventors: Ryan J. Goss, Kevin Gomez, Mark Allen Gaertner
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Publication number: 20110225346Abstract: In general, this disclosure relates to garbage collection in a storage device. Aspects of this disclosure describe techniques to identify one or more candidate memory storage blocks that should be recycled during garbage collection. The one or more candidate memory storage blocks may be identified based at least on monitored soft metrics of the candidate memory storage blocks. During garbage collection, the identified one or more candidate memory storage blocks may be recycled to free up storage space.Type: ApplicationFiled: March 10, 2010Publication date: September 15, 2011Applicant: Seagate Technology LLCInventors: Ryan J. Goss, Kevin Gomez, Mark Allen Gaertner
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Publication number: 20110219204Abstract: A system and method for efficient garbage collection. A general-purpose central processing unit (CPU) partitions an allocated heap according to a generational garbage collection technique. The generations are partitioned into fixed size cards. The CPU marks indications of qualified dirty cards during application execution since the last garbage collection. When the CPU detects a next garbage collection start condition is satisfied, the CPU sends a notification to a special processing unit (SPU) corresponding to a determination of one or more card root addresses, each card root address corresponding to one of said marked indications. The SPU has a single instruction multiple data (SIMD) parallel architecture and may be a graphics processing unit (GPU). The SPU may utilize the parallel architecture of its SIMD core to simultaneously compute multiple card root addresses. Following, the SPU sends these addresses to the CPU to be used in a garbage collection algorithm.Type: ApplicationFiled: March 2, 2010Publication date: September 8, 2011Inventor: Eric R. Caspole
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Patent number: 8001336Abstract: Systems and methods for memory management in a computing environment are provided. The method comprises uniquely identifying a first object associated with a first task for an application executed in a computing environment, wherein a first area of memory is allocated to the first object; determining a first execution scope for the first task according to a first execution context associated with the first task, wherein the first context defines a first life expectancy for the first task within the execution environment hierarchy; determining a change in execution scope of the first task, in response to monitoring the first execution context; and deallocating the first area of memory, in response to determining that the first task is no longer executed within the first execution scope.Type: GrantFiled: March 2, 2007Date of Patent: August 16, 2011Assignee: International Business Machines CorporationInventors: Gergana Vassileva Markova, Harry Clayton Husfelt, Jr.
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Publication number: 20110191508Abstract: A method for queuing thread update buffers to enhance garbage collection. The method includes providing a global update buffer queue and a global array with slots for storing pointers to filled update buffers. The method includes with an application thread writing to the update buffer and, when filled, attempting to write the pointer for the update buffer to the global array. The array slot may be selected randomly or by use of a hash function. When the writing fails due to a non-null slot, the method includes operating the application thread to add the filled update buffer to the global update buffer queue. The method includes, with a garbage collector thread, inspecting the global array for non-null entries and, upon locating a pointer, claiming the filled update buffer. The method includes using the garbage collector thread to claim and process buffers added to the global update buffer queue.Type: ApplicationFiled: February 3, 2010Publication date: August 4, 2011Applicant: Sun Microsystems, Inc.Inventors: Antonios Printezis, Paul H. Hohensee
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Publication number: 20110185129Abstract: A computing system includes a first virtual machine associated with a memory region readable by the first virtual machine, and a first private memory region. A data object is created by the first virtual machine in the sharable memory region, readable and writeable by the first virtual machine and a second virtual machine. A mapping is established between the first virtual machine and a particular area of the shareable memory region. The computing system includes the second virtual machine associated with a second private memory region, and a reference to the particular area of the shareable memory region. The mapping enables both the first virtual machine and second virtual machine to read and write second data in the shareable memory region without creating a copy of the second data in the first and second private memory regions.Type: ApplicationFiled: January 22, 2010Publication date: July 28, 2011Applicant: SUN MICROSYSTEMS, INC.Inventors: Erez Landau, Daniel David Blaukopf, Omer Pomerantz
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Publication number: 20110185112Abstract: Method and apparatus for verifying whether metadata identifies a most current version of data stored in a memory space. In accordance with various embodiments, a physical location within a first portion of a solid-state memory space is identified by metadata as storing a current version of user data having a selected logical address. A reverse search is performed upon a second portion of the memory space to determine whether the physical address identified by the metadata stores a stale version of the user data, or whether the physical address stores the current version.Type: ApplicationFiled: January 26, 2010Publication date: July 28, 2011Applicant: SEAGATE TECHNOLOGY LLCInventor: Ryan James Goss
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Publication number: 20110185113Abstract: Method and apparatus for maintaining data integrity in a data storage device. In accordance with some embodiments, a memory space has a plurality of garbage collection units (GCUs) each arranged to store user data identified by logical addresses. Each GCU has a metadata region that stores metadata that correlates the logical addresses LBAs with physical addresses and a header region that stores descriptor data that identifies LBAs stored in the associated GCU. A control circuit identifies an error in the metadata from the descriptor data of a selected GCU and rebuilds the metadata to indicate a storage location of a most current version of data associated with a selected logical address.Type: ApplicationFiled: January 26, 2010Publication date: July 28, 2011Applicant: SEAGATE TECHNOLOGY LLCInventors: Ryan James Goss, Mark Allen Gaertner
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Publication number: 20110161562Abstract: A region-based management method of a non-volatile memory is provided. In the region-based management method, the storage space of all chips in the non-volatile memory is divided into physical regions, physical block sets, and physical page sets, and a logical space is divided into virtual regions, virtual blocks, and virtual pages. In the non-volatile memory, each physical block set is the smallest unit of space allocation and garbage collection, and each physical page set is the smallest unit of data access. The region-based management method includes a three-level address translation architecture for converting logical block addresses into physical block addresses.Type: ApplicationFiled: February 8, 2010Publication date: June 30, 2011Applicant: NATIONAL TAIWAN UNIVERSITYInventors: Yuan-Hao Chang, Tei-Wei Kuo
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Patent number: 7971010Abstract: A mechanism for performing loitering trace is disclosed. A method of embodiments of the invention includes initiating a loitering trace of objects that cause a memory leak and remain in a heap after surviving at least one garbage collection operation. Initiating the loitering trace includes detecting the objects remaining in the heap via a loitering module of a profiling structure at a first virtual machine of an application server of a first computer system. Initiating the loitering trace further includes performing time-based sampling for the objects remaining, the time-based sampling having method statistics identifying an average runtime associated with each of the objects remaining. The method statistics is calculated based on a number of uses called for each of the objects remaining and a time length associated with each use of each of the remaining objects.Type: GrantFiled: December 15, 2009Date of Patent: June 28, 2011Assignee: SAP AGInventors: Ralf Schmelter, Michael Wintergerst, Arno Zeller, Oliver Bendig
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Patent number: 7908441Abstract: Solutions to a value recycling problem facilitate implementations of computer programs that may execute as multithreaded computations in multiprocessor computers, as well as implementations of related shared data structures. Some exploitations allow non-blocking, shared data structures to be implemented using standard dynamic allocation mechanisms (such as malloc and free). Some exploitations allow non-blocking, indeed even lock-free or wait-free, implementations of dynamic storage allocation for shared data structures. In some exploitations, our techniques provide a way to manage dynamically allocated memory in a non-blocking manner without depending on garbage collection. While exploitations of solutions to the value recycling problem that we propose include management of dynamic storage allocation wherein values managed and recycled tend to include values that encode pointers, they are not limited thereto.Type: GrantFiled: January 10, 2003Date of Patent: March 15, 2011Assignee: Oracle America, Inc.Inventors: Mark S. Moir, Victor Luchangco, Maurice Herlihy
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Patent number: 7908454Abstract: Tools and techniques for application-specific heap management are described herein. The tools may provide machine-readable storage media containing machine-readable instructions for profiling an application to facilitate managing heap memory associated with the application, and for managing requests from the application to allocate or deallocate from the heap memory based on the profiling. The tools may also receive requests from the application to allocate buffers, and may determine whether an instance-level memory pool, which is associated with a portion of the application, contains enough free buffers to satisfy the request. Finally, the tools may receive requests from the application to deallocate buffers, and in response to the request, may deallocate the requested buffers into the instance-level memory pool. The tools may also determine whether the instance-level memory pool contains a number of free buffers that exceeds a threshold.Type: GrantFiled: June 26, 2007Date of Patent: March 15, 2011Assignee: Microsoft CorporationInventors: Yiu-Ming Leung, Jiannan Zheng
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Patent number: 7900011Abstract: A memory management system is disclosed having a first memory heap module that assigns newly created objects to a first memory category and assigns persistent objects to a second memory category. The memory management system further assigns infrequently accessed persistent objects to a third memory category. A garbage collecting module collects garbage on objects in the first and second memory categories, but does not access objects in the third memory category. An operating system pages inactive objects assigned to the third memory category to a stable store. A user can debug the system, checking how many objects are assigned to the third memory category, and how many objects assigned to the third memory category are not accessed after initial allocation. Objects can be assigned to the third memory category based on selected criteria including time since access, likelihood of future object access, object size, and object priority.Type: GrantFiled: July 19, 2007Date of Patent: March 1, 2011Assignee: International Business Machines CorporationInventors: Lance C. Amundsen, Scott E. Highbarger, Bruce J. Ryba
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Publication number: 20110035549Abstract: A data storage device is provided. The data storage device may include a buffer memory, a storage medium, and a controller. The buffer memory may be configured to sequentially store written data blocks received from a host. The storage medium may be configured to include at least one drive. The controller may be configured to calculate first parity data for data selected from the written data in the buffer memory, generate journaling data, and control the generated journaling data to be stored in the storage medium. The data storage device may decrease a number of inputs/outputs used for a parity calculation to thereby reduce overhead.Type: ApplicationFiled: April 6, 2010Publication date: February 10, 2011Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventor: Sung Hoon BAEK
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Patent number: RE42396Abstract: A garbage collection method that distinguishes between local objects and managed objects, and between an ordinary pointer to an object, an owning pointer to an object, and a non-owning pointer to an object is presented. Ordinary pointers point only to local objects, and owning and non-owning pointers point only to managed objects. Managed objects have attributes including a count of the number of owning pointers referring to them, and a linked list of non-owning pointers referring to them. Managed objects only possess non-owning pointers. Only an invocation of a subroutine within a thread can possess an owning pointer. Using this method, when an invocation exits, its exit code gives up ownership of all objects it owned. When an object is no longer reachable from any owning pointer, either directly, or indirectly through non-owning pointers, the object is immediately de-allocated.Type: GrantFiled: November 23, 2005Date of Patent: May 24, 2011Assignee: Tangie Data Holdings LLCInventor: Theodore S. Hills