Abstract: An electronic anomaly detection unit for use in a vehicle includes an input component for capturing an input variable, wherein the input variable contains state information for at least one component of the vehicle, a memory component for storing state values based on the input variable, a selection component for selecting selected state values from the stored state values, an association component for associating the selected state values with predefined values, wherein the predefined values define a normal state of the component of the vehicle, and a decision component for deciding whether there is an anomalous behavior in the at least one component of the vehicle, based on the association, wherein one or more of the input component, the memory component, the selection component, the association component and the decision component are implemented in hardware.

Abstract: Methods and related systems are disclosed for retrieving personality data for a first unit a climate control system. In an embodiment, the method includes querying a second unit controller that has replaced the first unit controller. In addition, the method includes determining that the second unit controller lacks personality data that is unique to the first unit. Further, the method includes transferring the personality data to the second unit controller from a memory of the climate control system that is separate from the second unit controller.

Abstract: Described screenshot verification systems and methods for automatically verifying the integrity of a backup image or other process-of-interest using a screenshot verification system, as well as disaster recovery systems including said systems and performing said methods. In accordance with various aspects of the present disclosure, a virtual machine is booted and screenshots of the boot process are taken, which are used by a trained model, such as a convolutional neural network, to determine a boot state consistency. The systems and methods described deliver over 99% accuracy and do not involve regular expression analysis typical of conventional methods.

Abstract: A register reading method and apparatus, a device and a medium. After a server is crashed, a CPU-register collecting request is triggered. Different types of CPUs correspond to different types and quantities of registers that require data collection. Therefore, by firstly determining the register required to be read corresponding to the CPU type, and determining the reading mode of the register, the disadvantage that the reading mode that may merely use a single instruction may not satisfy the demand on field crashing analysis is prevented. Subsequently, by using a PECI bus, the register data of a plurality of registers are read. By collecting the registers of the CPU directly by using the PECI bus, the problem that the performance excessively relies on the stability of the ME due to the intermediate transfer via the ME is prevented, which greatly increases the reading success rate of the registers.

Abstract: A cluster system including a plurality of nodes, a plurality of clusters included in each node and a management module managing the cluster system and an arithmetic module, which are included in each of the clusters, wherein, among all the management modules included in the cluster system, one management module is set representative management module, in the individual clusters, one is set as a master management module, and another is set as a standby management module. Each of the management modules includes a failure monitoring unit and a failover control unit. When a failure in the representative management module is detected by any of the failure monitoring units, any of the management modules included in the non-representative management modules, is set as a new representative management module. A recovery unit restores the failure monitoring unit and the failover control unit in the management module in which a failure is detected.

Abstract: Systems and methods are described for a non-disruptive planned failover from a primary copy of data at a primary storage system to a mirror copy of the data at a cross-site secondary storage system. According to an example, a planned failover feature of a multi-site distributed storage system provides an order of operations such that a primary copy of a first data center continues to serve I/O operations until a mirror copy of a second data center is ready. This planned failover feature improves functionality and efficiency of the distributed storage system by providing non-disruptiveness during planned failover—even if various failures occur. The planned failover feature also includes a persistent fence to avoid serving I/O operations during a timing window when both primary data storage and secondary data storage are attempting to have a master role to serve I/O operations and this avoids a split-brain situation.

Abstract: Continuous data protection, including sending, to a target data repository from a source data repository, metadata describing one or more updates to one or more datasets stored within the source data repository; generating, based on the metadata describing the one or more updates to the one or more datasets, an ordered log of metadata describing an ordered application of the one or more updates to the one or more datasets; and generating, on the source data repository and based on the ordered log of metadata, the one or more datasets in accordance with the one or more updates corresponding to a specified point in time.

Abstract: A method includes detecting in a communication bus a write command to a first circuit and comparing a write address of the write command with a set of safe addresses. When the write address matches a safe address of the set of safe addresses, an error correction code (ECC) is generated based at least on write data of the write command, and the ECC is stored in a memory of a parameter safe storage circuit. A read command to the first circuit is detected in the communication bus, a read address of the read command is compared with the set of safe addresses, and, when the read address matches a safe address of the set of safe addresses, it is determined whether read data of the read command is corrupted based on the stored ECC, and an error notification is provided when the read data is determined to be corrupted.

Abstract: Methods, systems, and devices supporting orchestration for automated performance testing are described. A server may orchestrate performance testing for software applications across multiple different test environments. The server may receive a performance test indicating an application to test and a set of test parameters. The server may determine a local or a non-local test environment for running the performance test. The server may deploy the application to the test environment, where the deploying involves deploying a first component of the performance test to a first test artifact in the test environment and deploying a second component of the performance test different from the first component to a second test artifact in the test environment. The server may execute the performance test to obtain a result set, where the executing involves executing multiple performance test components as well as orchestrating results across multiple test artifacts to obtain the result set.

Abstract: Described is a system and apparatus that provides redundant flight control for an aerial vehicle without the use of independent and dedicated redundant flight control boards and processors. Additional compute resources available on processors of other device boards of an aerial vehicle may be used to execute redundant flight control programs. The device boards and/or those redundant flight control programs monitor the operability of the various flight controllers. If any of the flight controllers is determined to be inoperable, one of the redundant flight control programs assumes the role of the inoperable controller.

Abstract: A method for preserving a media access control (MAC) address of a virtual server is provided. The method includes assigning a physical computing resource to a virtual server, assigning a physical storage memory resource to the virtual server, and assigning a physical network resource to the virtual server. The method includes assigning a virtual MAC address to the virtual server, the virtual MAC address to remain with the virtual server despite reassignment of one or more of the physical computing resource, the physical storage memory resource or the physical network resource, wherein at least one method operation is performed by a processor. A computing and storage system is also provided.

Abstract: A nuclear reactor protection system includes a plurality of functionally independent modules, each of the modules configured to receive a plurality of inputs from a nuclear reactor safety system, and logically determine a safety action based at least in part on the plurality of inputs; and one or more nuclear reactor safety actuators communicably coupled to the plurality of functionally independent modules to receive the safety action determination based at least in part on the plurality of inputs.

Abstract: A computing device includes a hardware switch that is activated when a primary Basic Input/Output System (BIOS) of a first BIOS chip of the device fails to load an Operating System (OS) image from an OS partition of a hard drive. The switch passes control to a backup BIOS that executes from a backup BIOS chip. The backup BIOS loads a recovery image from BIOS recovery partition of the hard drive, which causes a reflash application to execute from the recovery image. Reflash application obtains a recovery BIOS from the BIOS recovery partition of the hard drive, reflashes/writes the recovery BIOS onto the first BIOS chip and reboots the device. Following reboot of the device, recovery BIOS loads the OS image from the OS partition, and recovery BIOS becomes the primary BIOS on the first BIOS chip of the device.

Abstract: a computing system that receives and stores configuration information for the application in a data store. The configuration information comprises (1) identifiers for a plurality of cells of the application that include at least a primary cell and a secondary cell, (2) a defined state for each of the plurality of cells, (3) one or more dependencies for the application, and (4) a failover workflow defining actions to take in a failover event. The computing system receives an indication, from a customer, of a change in state of the primary cell or a request to initiate the failover event. The computing system updates, in the data store, the states for corresponding cells of the plurality of cells based on the failover workflow and updates, in the data store, the one or more dependencies for the application based on the failover workflow.

Abstract: A data access system includes: a data storage medium, a record medium, a first controller, and a second controller. The record medium includes a first record area and a second record area. The first controller includes a first metadata area. The second controller includes a second metadata area. The first controller is connected to the data storage medium and the record medium and corresponds to the first record area. The second controller is connected to the data storage medium and the record medium and corresponds to the second record area. The first controller receives first data, and writes the first data into the data storage medium in a log manner to update the first metadata area, and correspondingly generates a first record in the first record area. The second controller updates the second metadata area according to the first record in the first record area.

Abstract: Techniques are provided for authorizations in a virtual computing infrastructure using a federation token service. The techniques may include receiving a request for a launch plan from a user for launching instances in a plurality of sites, determining object permissions required for actions to be performed to launch one or more of the instances at each site of the plurality of sites, contacting an authorization caching service to obtain authorization tokens for each of the determined object permissions required for the actions, receiving the authorization tokens for each of the determined object permissions required for the actions, and forwarding the request to each site of the plurality of sites with an authentication token and the authorization tokens for each of the determined object permissions required for the actions to be performed to launch the one or more of the instances at each site of the plurality of sites.

Abstract: Methods, systems, and devices supporting orchestration for automated performance testing are described. A server may orchestrate performance testing for software applications across multiple different test environments. The server may receive a performance test indicating an application to test and a set of test parameters. The server may determine a local or a non-local test environment for running the performance test. The server may deploy the application to the test environment, where the deploying involves deploying a first component of the performance test to a first test artifact in the test environment and deploying a second component of the performance test different from the first component to a second test artifact in the test environment. The server may execute the performance test to obtain a result set, where the executing involves executing multiple performance test components as well as orchestrating results across multiple test artifacts to obtain the result set.

Abstract: A power management controller is disclosed. Broadly speaking, the controller may, in response to receiving a timing signal, monitor a temperature of an integrated circuit including multiple processor clusters. The controller may generate a comparison of the temperature and a threshold value, and in response to a determination that the comparison indicates that the temperature is less than the threshold value, transition a particular processor cluster to a new power state.

Abstract: A parallel processing system includes at least three processors operating in parallel, state monitoring circuitry, and state reload circuitry. The state monitoring circuitry couples to the at least three parallel processors and is configured to monitor runtime states of the at least three parallel processors and identify a first processor of the at least three parallel processors having at least one runtime state error. The state reload circuitry couples to the at least three parallel processors and is configured to select a second processor of the at least three parallel processors for state reload, access a runtime state of the second processor, and load the runtime state of the second processor into the first processor. Monitoring and reload may be performed only on sub-systems of the at least three parallel processors. During reload, clocks and supply voltages of the processors may be altered. The state reload may relate to sub-systems.

Abstract: A task in an application node is managed. For instance, based on a type of a predetermined task that is to be executed on a data object in the application node, an address range of a group of objects on which the predetermined task is to be executed is determined in the data object. The predetermined task is executed on the group of objects in an order of addresses of the group of objects. A progress indicator is created for indicating an address of an object that is currently being processed in the group of objects. The predetermined task is managed based on the progress indicator. Thus, an address of an object that is currently being processed may be indicated based on the progress indicator, so that the predetermined task may be managed more easily and effectively based on the progress indicator in subsequent operations.

Abstract: An apparatus includes a primary processor and a secondary processor configured to receive a first signal, a second signal and a plurality of input signals, and perform same operations as each other based on the first signal, the second signal and the plurality of input signals, a comparison circuit configured to receive output signals of the primary processor and the secondary processor, and detect a lockstep mismatch between the primary processor and the secondary processor based on the output signals, a fault capturing circuit configured to receive the first signal and the second signal, and capture a fault signal generated by the comparison circuit, and a first glitch absorption device configured to receive the first signal and the second signal, and absorb glitches fed into the first glitch absorption device.

Abstract: A system for dynamically load-balancing at least one redistribution element across a group of computing resources that facilitates at least an aspect of an Industrial Execution Process in an M:N working configuration is illustrated.

Abstract: A semiconductor device performs a software lock-step. The semiconductor device includes a first circuit group including a first Intellectual Property (IP) to be operated in a first address space, a first bus, and a first memory, a second circuit group including a second IP to be operated in a second address space, a second bus, and a second memory, a third bus connectable to a third memory, and a transfer control circuit coupled to the first to third buses. when the software lock-step is performed, the second circuit group converts an access address from the second IP to the second memory such that an address assigned to the second memory in the second address space is a same as an address assigned to the first memory in the first address space.

Abstract: Method, management node and processing node are disclosed for continuous availability in a cloud environment. According to an embodiment, the cloud environment comprises a plurality of layers and each layer includes at least two processing nodes. Each processing node in a layer can pull job(s) from the processing nodes in the upper layer if any and prepare job(s) for the processing nodes in the under layer if any. A method implemented at a management node comprises receiving measurement reports from the plurality of layers. The measurement report of each processing node comprises information about job(s) pulled from the upper layer if any and job(s) pulled by the under layer if any. The method further comprises determining information about failure in the cloud environment based on the measurement reports.

Abstract: A method and system for detecting faults in a communication interface is disclosed. The communication interface is connected to a field device and a device bus comprising generating periodic diagnostic pulse by a programing unit. The programming unit is communicatively connected to the controller and a controller interface and provides the diagnostic pulse to a multiplexer to periodically apply the diagnostic pulses from the programming unit to a first winding of a transformer. The programming unit provides the diagnostic pulse to the isolation unit. A sensing unit senses a voltage drop across a sense resistor, the sensing unit having an input connected to the sense resistor and an output connected to the programming unit. The sensing unit communicates a sense signal based on the comparison to the programming unit, and switches from a primary or a secondary module to the other based on the sense signal.

Abstract: A multicore processor may include multiple processing cores that were previously designated as active cores and at least one processing core that was previously designated as a functional spare. The processor may include an interface to receive, during operation of the processor in an end-user environment, a request to change the designation of at least one of the processing cores. The processor may be to store, into a desired cores configuration data structure in response to the request, data representing a bitmask that reflects the requested change, and to execute a reset sequence. During the reset sequence, the processor may activate, dependent on the bitmask, a processing core previously designated as a functional spare, or may deactivate, dependent on the bitmask, a processing core previously designated as an active core. The processor may include a predetermined maximum number of active cores and a predetermined minimum number of functional spares.

Abstract: The disclosed computer-implemented method for asynchronously and statelessly loading data while maintaining ordering may include parsing multiple data records, appending an identifier to each data record, where the appended identifier establishes a parsing order indicating an order in which each data record was parsed, inserting the parsed data records into multiple persistent queues in parallel, and asynchronously loading the data records from the persistent queues into a database in parallel according to the appended identifiers. As such, the data records may be stored in the database in the established parsing order. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: The first computing system may interface with an operator of the application and a plurality of hosts of the application distributed between different partitions. The second and third computing systems may host first and second portion of the application in first and second partitions, respectively. The second and third computing systems may poll the first computing system to identify first and second value, respectively, representing state conditions of the first and second partitions, respectively, wherein the first and second partition state conditions are the active state, the passive state, and the fenced state. The second and third computing systems may receive responses from the first computing system comprising the first and second values, respectively, and based on the respective values, initiate a transition to the corresponding partition state condition. The first computing system may assign one of the first and second values to indicate which is the active state.

Abstract: A vehicle safety electronic control system includes a first microcontroller having a lockstep architecture with a lockstep core and a second microcontroller having at least two processing cores. The lockstep core of the first microcontroller is configured to monitor and control outputs of said at least two cores of the second microcontroller.

Abstract: A communication apparatus that can communicate with a public communication network by using an in-vehicle communication module permanently installed in a vehicle or one or more external communication modules not installed permanently in the vehicle. The communication apparatus includes: a memory unit configured to store a selection table recording a criterion for selecting a communication module to be used for the communication; and a control unit configured to evaluate a plurality of the communication modules and acquire an evaluation result; and to select a communication module to be used for communication according to the evaluation result and the selection table.

Abstract: A network interface apparatus includes a host interface for connection to a host processor and a network interface, which includes multiple distinct physical ports. Processing circuitry associates each of a plurality of virtual entities running on the host processor with a respective one of the physical ports, so that while both of the first and second physical ports are operational, the processing circuitry transmits data packets on behalf of first and second virtual entities, using assigned upper-layer addresses, through associated first and second physical ports. In response to an indication that the first physical port has ceased to operate, the processing circuitry transmits the data packets on behalf of the first virtual entity through the second physical port without changing the upper-layer addresses.

Abstract: A total number of messages in a set of messages that are processed by a computing node in a virtual computer cluster during a time interval is determined. The virtual computer cluster is deployed with a cloud computing service and includes the computing node and other computing nodes at an end time of the time interval. It is determined whether the total number of messages in the set of messages processed by the computing node is no less than a maximum per-interval message number threshold. In response to determining that the total number of messages is no less than a maximum per-interval message number threshold, the cloud computing service is caused to start an additional computing node in the virtual computer cluster after the time interval, wherein the additional computing node is used to process one or more subsequent messages to be processed after the time interval.

Abstract: A processor capable of changing redundant processing node comprises a plurality of processing nodes and a plurality of comparators. The plurality of processing nodes comprises a first processing node, a second processing node, and a third processing node, wherein the first processing node performs a first computation, the second processing node selectively performs the first computation or a second computation, and the third processing node performs the second computation. The plurality of comparators comprises a first comparator and a second comparator, wherein the first comparator connects to the first and second processing nodes to compare whether the results of the first computation performed by the first and second processing nodes are identical, and the second comparator connects to the second and third processing nodes to compare whether results of the second computation performed by the second and third processing nodes are identical.

Abstract: A CANopen-based data transmission gateway changeover method includes: making an active gateway go alive, and mutually monitoring heartbeat packet status together with a standby gateway over an active-standby gateway communications network; keeping the active gateway alive and recording a breakdown of the standby gateway if no heartbeat packet of the standby gateway is detected within a preset heartbeat period and a heartbeat packet of the active gateway is successfully transmitted on the active-standby gateway communications network; requesting the standby gateway to go alive if the heartbeat packet of the active gateway fails to be transmitted on the active-standby gateway communications network; stopping requesting the standby gateway in a first in-vehicle communications network to go alive, and requesting the standby gateway to go alive; and keeping the active gateway alive and recording a breakdown of the standby gateway if still no response is received from the standby gateway.

Abstract: Methods, systems, and devices for memory data correction using multiple error control operations are described. A single command may be received to correct an error detected in data stored by a memory array. A first error control operation and a second error control operation may be implemented based on the single command. The first error control operation may be performed on the data stored by the memory array using one or more different reference voltages to read the data. The error may be determined to remain in the data after performing the first error control operation. The second error control operation may then be performed on the data stored by the memory array. The second error control operation may use one or more voltage distributions associated with the memory cells of the memory array.

Abstract: The present disclosure relates to an assembly including a first processor having a first core, a second core and a controller, and a second processor having a first core, and wherein the first core and the second core of the first processor, and the first core of the second processor are configured to execute a first procedure. The controller of the first processor is configured to compare a first result from executing the first procedure on the first core of the first processor with a second result from executing the first procedure on the second core of the first processor; and comparing each of the first and second results with a third result from executing the first procedure on the first core of the second processor, if the first and second results differ from one another.

Abstract: The controlling apparatus for an industrial product of this disclosure has a couple of microcomputers each of which has a CPU and a memory and each of which runs the same controlling program as well as the same diagnostic program sequence parallelly and simultaneously. After the CPU of the microcomputer writes the calculated result of the diagnostic program sequence in the predetermined area of the storing area for monitoring value, such CPU send the same calculated result to the other one of the microcomputers (receiving microcomputer). The CPU of the receiving microcomputer makes a diagnosis for finding whether or not the received result is identical with its own calculated result.

Abstract: Provided are a computer program product, system, and method verifying mirroring of source data units to target data units. Source data units in a source storage are mirrored to corresponding target data units in a target storage. The source data units are read to compare to corresponding mirrored target data units. The read source data units that did not match the corresponding target data units are saved in source version data. The source data units that were read and did not match the corresponding target data units are read. The mirroring of the source data units are verified in response to determining that for each mirrored source data unit, one of a read source data unit and the read source data unit saved in the source version data matches the corresponding target data unit.

Abstract: This disclosure describes hardware-based mutexes that employ software process authentication to prevent a software process from releasing the lock of a mutex locked by another software process. For example, systems are described in which a mutex controller receives a request from a process to lock a mutex. The mutex controller locks the mutex, writing a process key and process identifier to one or more hardware registers associated with the mutex. If the mutex controller receives a request to release the lock on the mutex, the mutex controller determines if the key received with the request matches the process key written in the one or more hardware registers of the mutex and, if so, releases the lock on the mutex.

Abstract: A method for balancing load across multiple file servers is disclosed. In one embodiment, such a method includes monitoring load experienced by multiple file servers arranged in an active-active configuration. The method receives, from a client node, a request for an address associated with one of the file servers. The method determines a particular file server of the file servers that, if assigned to the client node, would reduce load imbalance between the file servers. In certain embodiments the particular file server is the file server experiencing the least load. The method returns, to the client node in response to the request, an address associated with the particular file server, thereby enabling the client node to mount the particular file server to access files thereon. A corresponding system and computer program product are also disclosed.

Abstract: The present disclosure discloses a parameter configuration method and apparatus, and a display device, belonging to the field of display technologies. The method is applicable to a controller connected to a plurality of drivers, and includes: sending a component information request instruction to a first driver over a first signal line, wherein the first driver is one of the plurality of drivers; receiving a component information response instruction sent over the first signal line by the first driver, wherein the component information response instruction includes component information; determining configuration parameters corresponding to the component information; and performing parameter configuration for the plurality of drivers by using the determined configuration parameters.

Abstract: In an embodiment, a method includes: receiving, with a first buffer of a first error compactor unit (ECU), a first memory error packet associated with a first memory; receiving, with the first buffer, a second memory error packet associated with a second memory; transmitting a first reading request for reading the first memory error packet; receiving the first reading request with an arbiter of an error aggregator unit (EAU) of a central memory error management unit (MEMU); in response to receiving the first reading request, reading the first memory error packet from the first buffer, transmitting the first memory error packet to a controller of the central MEMU, and transmitting a first acknowledgement to the first ECU; receiving the first acknowledgement with the first ECU; and in response to receiving the first acknowledgement, transmitting a second reading request for reading the second memory error packet.

Abstract: The present disclosure generally relates to improved foggy-fine programming. Rather than initially writing to SLC and then later performing a foggy write to QLC with the data read from SLC and then a fine write to QLC with data re-read from SLC, the foggy write to QLC can be performed in parallel to the initial writing to SLC using the same buffer. Once the foggy write to QLC has completed, and the writing to SLC has also completed, the data buffer can be released. The data written in SLC is then be read from SLC and passes through a relocation buffer for the first and only time to then be written using fine programming to QLC. Thus, the data only passes through the relocation buffer one time and the relocation buffer can be freed to usage after only one pass of the data therethrough.

Abstract: Techniques to provide direct access to backup data are disclosed. An indication is received to provide access to backup data backed up previously to a target device. The backup data as stored on the target device is used to spawn on the target device a logical volume corresponding to the backup data. Access to the logical volume as stored on the target device is provided to a production host.

Abstract: Aspects of the present invention disclose a method for avoiding overvoltages of a processor chip. The method includes one or more processors identifying one or more processing units of a computing device. The method further includes determining respective activity levels of one or more processing elements of the one or more processing units of the computing device. The method further includes determining respective voltages of the one or more processing units of the computing device. The method further includes regulating the respective voltages of the one or more processing units of the computing device based at least in part on the respective activity levels of the one or more processing elements.

Abstract: A computer system that has two or more processing engines (PE), each capable of performing one or more operations on one or more operands but one or more of the PEs performs the operations unreliably. Initial results of each operation are debiased to create a debiased result used by the system instead of the initial result. The debiased result has an expected value equal to a correct output where the correct output is the initial result the respective operation would have produced if the respective operation performed was reliable.

Abstract: A system, method and computer program product synchronize a plurality of processes of one or more applications executed by a plurality of processors. In addition to the processors, the system includes a plurality of memories with each memory associated with a respective process and configured to maintain a local count representative of a message of the respective process with which the memory is associated and at least one remote count representative of a message of a corresponding process executed by another processor. The system also includes a reflector configured to reflect the local count of the respective process to a remote count of the corresponding process. For synchronization, a first process of a first application executed by a first processor is configured to enter a delay period if the local count and at least one remote count maintained by the memory associated with the first process fail to match.

Abstract: A system for dynamically load-balancing at least one redistribution element across a group of computing resources that facilitates at least an aspect of an Industrial Execution Process in an M:N working configuration is illustrated.

Abstract: A distributed database system may implement dynamic quorum group membership changes. In various embodiments, a quorum set may maintain a replica of a data object among group members according to a protection group policy for the data object. A group member may be identified as to be replaced. In response, a new quorum set may be created from the remaining group members and a new group member. The protection group policy may be updated to include the new group members such that subsequently received updates are maintained at both the previous to quorum set and the new quorum set. Previously received updates may be replicated on the new group member. Upon completion of replicating the previously received updates, the protection group policy for the data object may be revised such that subsequently received updates are maintained at the new quorum set.

Abstract: According to one embodiment, a computing device comprises one or more hardware processor and a memory coupled to the one or more processors. The memory comprises software that supports a virtualization software architecture including a first virtual machine operating under control of a first operating system. Responsive to determining that the first operating system has been compromised, a second operating system, which is stored in the memory in an inactive (dormant) state, is now active and controlling the first virtual machine or a second virtual machine different from the first virtual machine that now provides external network connectivity.