Of Processor Patents (Class 714/10)
  • Patent number: 11960376
    Abstract: The present disclosure is directed to methods and systems for monitoring nodes on a distributed computing network. A distributed computing system can monitor each node within a wireless network to identify when a node is disconnected from the network. The distributed computing system can dynamically perform tasks on behalf of the node until the node is reconnected to the wireless network. In some implementations, the distributed computing system monitors the utilization of the wireless network to identify when the wireless network has the capacity to perform a task.
    Type: Grant
    Filed: December 5, 2022
    Date of Patent: April 16, 2024
    Assignee: DISH Wireless L.L.C.
    Inventors: Owen Christens-Barry, Jennings Maxwell Orcutt, Christopher Ergen
  • Patent number: 11953997
    Abstract: The present disclosure relates to systems and methods for backing up a distributed database provided as a database instance across servers within a first geographic region. In one example, such a system may include at least one processor configured to: generate and transmit a command to duplicate the distributed database in object databases on first region servers; generate and transmit a command to duplicate the object databases on servers in at least a second geographic region independent from servers in the first region; and, when an error is detected with at least one server within the first region: generate and transmit a command to initiate a new distributed database on second region servers, generate and transmit a command to populate the new distributed database using the object databases on second region servers, and generate and transmit a command to re-route traffic from the distributed database to the new distributed database.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: April 9, 2024
    Assignee: Capital One Services, LLC
    Inventors: Raveender Kommera, Nathan Gloier, Raman Gupta
  • Patent number: 11952108
    Abstract: A universal vehicle control router for small fly-by-wire aircraft may include multiple vehicle control computers, such as flight control computers. Each flight control computer may be part of an independent channel that provides instructions to multiple actuators to control multiple vehicle components. Each channel is a distinct pathway capable of delivering a system function, such as moving an actuator. Each flight control computer may include a fully analyzable and testable voter (FAT voter). In the event of a failure to one of the flight control computers, the FAT voters may cause the failing flight control computer to be ignored or shut off power. Each flight control computer may comprise a backup battery. In the event of a power disruption from the primary power source, such as a generator and primary battery, the backup battery may power the flight control computer and all actuators.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: April 9, 2024
    Assignee: Skyryse, Inc.
    Inventors: Gonzalo Javier Rey, David James Manzanares, Sylvain Alarie, Deon Esterhuizen
  • Patent number: 11943098
    Abstract: In a network Fault Management (FM) model, network equipment (160) maintains a ManagedElement object (12). The ManagedElement object contains one or more ManagedFunction objects (14, 22, 24, 26) with each ManagedFunction object (16) comprising an FMControl object specifying the capabilities of the ManagedFunction objects to produce, report, and log fault reports, a Fault Type List object (18) listing the various types of faults the ManagedFunction object can detect, report, and log, and a currentFaultList object (20) listing the current faults and associated fault information. The FMControl object further includes several attributes that are set by a Management System (30) to control the reading of fault reports as well as the sending of the fault reports to other interested network nodes (190).
    Type: Grant
    Filed: April 6, 2020
    Date of Patent: March 26, 2024
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
    Inventors: Edwin Tse, Robert Petersen
  • Patent number: 11914454
    Abstract: In accordance with an embodiment of the invention, a cloud computing system is disclosed. The system includes a software-defined data center (SDDC), the SDDC including at least one cluster supported within the SDDC and at least one host computer running within the cluster, wherein the at least one host computer is configured to support at least one workload comprising an operating system and an application, and a cloud infrastructure, the cloud infrastructure including at least one child VM, the at least one child VM configured to virtualize the at least one host computer running within the cluster, and at least one parent virtual machine, wherein additional child VMs are deployed by forking the at least one parent VM.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: February 27, 2024
    Assignee: VMware, Inc.
    Inventors: Selventhiran Elangovan, Vinaya Lingappa Hanumantharaya, Dinesh Raju Chamarthi, Kiran Eshwarappa
  • Patent number: 11907056
    Abstract: Disclosed herein is a data processing system comprising a processing unit operable to process data to generate a sequence of outputs, wherein the processing unit is configurable, when generating a sequence of outputs, such that the data processing for generating an output in the sequence of outputs will be performed within a respective processing period for the output. A controller for the processing unit is configured to cause the processing unit, when generating a sequence of outputs, during a respective processing period for at least one output in the sequence of outputs, to also undergo one or more fault detection test(s) such that both processing of data for the output and fault detection testing is performed during the respective processing period for the output.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: February 20, 2024
    Assignee: Arm Limited
    Inventors: Eamonn Quigley, Nicholas John Nelson Murphy, Jussi Tuomas Pennala, Henrik Nils-Sture Olsson
  • Patent number: 11875228
    Abstract: The examples disclosed herein provide classifying quantum errors. In particular, a classical computing system receives quantum error data from a first quantum computing device of a quantum computing system. The quantum error data includes error identification data and error correction data. The error identification data is associated with occurrence of a quantum error. The error correction data is associated with a corrective action taken by the first quantum computing device to correct the quantum error. The classical computing system determines an error type of the quantum error of the error identification data. The classical computing system associates an error classification tag with the quantum error data. The error classification tag identifies a quantum error type. The classical computing system sends the error classification tag to the first quantum computing device. The classical computing system processes a quantum computing request based on the error classification tag.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: January 16, 2024
    Assignee: Red Hat, Inc.
    Inventors: Stephen Coady, Leigh Griffin
  • Patent number: 11853429
    Abstract: In various examples there is a computing device comprising: a first microcontroller comprising a first immutable bootloader and first mutable firmware. The first immutable bootloader uses a unique device secret burnt into hardware of the computing device in order to generate an attestation of the first mutable firmware. The computing device has a second microcontroller. There is second mutable firmware at the second microcontroller. There is a second immutable bootloader at the second microcontroller which sends a measurement of the second mutable firmware to the first immutable bootloader whenever the second microcontroller restarts, such that the first microcontroller is able to include the measurement in the attestation.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: December 26, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Stavros Volos, Colin Doak, Simon Douglas Chambers, David Ruggles, Richard Neal, Cédric Alain Marie Fournet, Kapil Vaswani, Balaji Vembu
  • Patent number: 11847466
    Abstract: In described examples, an integrated circuit (IC) includes a first temperature sensor, a processor, a second temperature sensor, and a reset module. The first sensor senses a first body temperature of the IC. The processor asserts a thermal shutdown signal if the first body temperature exceeds a first threshold. In response to the thermal shutdown signal, the second sensor asserts a reset request signal and senses a second body temperature of the IC. If the second body temperature is less than a second threshold, the second sensor asserts a reset end signal. The reset module outputs a system reset signal to the first sensor and the processor if the reset request signal is asserted, and outputs a system recovery signal if the reset end signal is asserted. The first sensor and the processor deactivate if the system reset signal is asserted, and activate if the system recovery signal is asserted.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: December 19, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Robin Osa Hoel, Anand Kumar G
  • Patent number: 11831312
    Abstract: Multi-chip systems and structures for modular scaling are described. In some embodiments an interfacing bar is utilized to couple adjacent chips. For example, a communication bar may utilized to coupled logic chips, and memory bar may be utilized to couple multiple memory chips to a logic chip.
    Type: Grant
    Filed: February 23, 2022
    Date of Patent: November 28, 2023
    Assignee: Apple Inc.
    Inventors: Sanjay Dabral, Bahattin Kilic, Jie-Hua Zhao, Kunzhong Hu, Suk-Kyu Ryu
  • Patent number: 11822326
    Abstract: A voter-based method of controlling a redundancy is provided, including acquiring a processing element array in a target hardware, wherein the processing element array includes a plurality of processing elements, selecting a plurality of groups of processing elements from the processing element array so as to generate a voter set, wherein a corresponding voter is generated for each group of the plurality of groups of processing elements, and the corresponding voter configured to perform a voting operation in a redundancy control, acquiring, in response to a message indicating a fault state of a detected voter, a target voter from the voter set so as to replace the detected voter, and re-performing the voting operation in the redundancy control by using the target voter. An electronic device and a storage medium are further provided, which are implemented based on the processing element array of the target hardware.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: November 21, 2023
    Assignees: Beijing Superstring Academy of Memory Technology, Tsinghua University
    Inventors: Xiangyu Kong, Jianfeng Zhu, Shouyi Yin, Shaojun Wei
  • Patent number: 11803420
    Abstract: Methods, systems, and computer-readable media for execution of replicated tasks using redundant resources are disclosed. Replicas of a task are generated. Computing resources are selected from at least one pool of computing resources of a provider network. The provider network includes a plurality of pools of computing resources that vary in a characteristic, and the computing resources are selected based (at least in part) on the characteristic. Concurrent execution of the replicas of the task is initiated using the selected computing resources. Input data for the concurrent execution does not vary from one of the replicas to another of the replicas, and at least a portion of the replicas produce individual results for the input data. Based (at least in part) on a policy, an individual result of one or more of the replicas is selected as a final result of the task.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: October 31, 2023
    Assignee: Amazon Technologies, Inc.
    Inventors: James Edward Kinney, Jr, Dougal Stuart Ballantyne
  • Patent number: 11797359
    Abstract: Systems and methods for reporting API capability change according to an API filter are provided. According to one aspect, a method for reporting API capability change according to an API filter comprises receiving a request to be notified of an API capability change related to an identified wireless device, the request identifying a set of one or more APIs to be monitored; receiving a notification that the identified wireless device has changed from a first type of core network to a second type of core network; determining an API capability change from the first type of core network to the second type of core network for the identified set of one or more APIs to be monitored; and reporting the API capability change for the identified set of one or more APIs to be monitored and not reporting the API capability change for APIs not in the identified set.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: October 24, 2023
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventor: Wenliang Xu
  • Patent number: 11789829
    Abstract: Methods and systems are disclosed herein for managing software operations in a computer system. A software operation may include many tasks. The tasks may be grouped together based on the tasks' dependencies on output generated from other tasks. Each group of tasks may be placed in a block of a blockchain based on the dependencies. If the output of a block fails to pass a validation test, the tasks in each block may be undone in an organized order (e.g., starting with the most recently performed task and using the one or more rollback functions associated with each task), which may prevent problems that could occur when some asynchronous tasks complete and others fail. Use of the blockchain may allow the computer system to determine more precisely where an operation failed and may allow the computer system to determine more information about the failure.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: October 17, 2023
    Assignee: Capital One Services, LLC
    Inventors: Christian Bartram, Connor Cason, Yvette White
  • Patent number: 11789819
    Abstract: A method includes receiving signaling indicative of performance of a reset operation involving a first physical function associated with a controller of a memory device and initiating a first timer that corresponds to an amount of time available for the first physical function associated with the controller of the memory device to complete execution of pending commands. The method further includes initiating a second timer that corresponds to an amount of time available for a second physical function associated with the controller of the memory device to complete execution of pending commands and initiating a third timer that corresponds to an amount of time available for the second physical function associated with the controller of the memory device to join a recovery operation that is instigated as a result of performance of the reset operation.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: October 17, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Horia C. Simionescu, Ramkumar Venkatachalam, Anirban Kundu
  • Patent number: 11762722
    Abstract: A method for protecting a reconfigurable digital integrated circuit includes multiple parallel processing channels each comprising an instance of a functional logic block and an error detection unit, the method comprising the successive steps of: activating the error detection unit in order to detect an error in at least one processing channel, executing the data replay mechanism, and then activating the error detection unit in order to detect an error in at least one processing channel, if an error is detected again, executing a self-test on each processing channel, for each processing channel, if the self-test does not detect any error, executing the data replay mechanism for this processing channel, if the self-test detects an error, reconfiguring that part of the configuration memory associated with this processing channel.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: September 19, 2023
    Assignee: THALES
    Inventor: Yann Oster
  • Patent number: 11724185
    Abstract: A method is disclosed for requesting data in a cloud gaming system that includes a cloud storage system and a cloud compute system, each of which has a respective peripheral component interconnect express (PCIe) interface and a respective computer memory. The cloud gaming system includes a PCIe switch connected to both the PCIe interface of the cloud storage system and the PCIe interface of the cloud compute system. The PCIe switch exposes a doorbell register that is monitored by the cloud storage system. The cloud compute system writes to the doorbell register, which causes an interrupt to fire on the cloud storage system. The cloud storage system handles the interrupt, which directs the cloud storage system to read a message from a specified computer memory location. The message directs the cloud storage system to read requested data from a storage device accessible by the cloud storage system.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: August 15, 2023
    Assignee: Sony Interactive Entertainment LLC
    Inventor: Roelof Roderick Colenbrander
  • Patent number: 11720438
    Abstract: A system, method and apparatus to record data relevant to hardware errors identified by microprocessors. For example, in response to a hardware error, a microprocessor can store first data about the error in registers in the microprocessor and start to execute instructions configured in firmware and/or in an operating system. Execution of the instructions in response to the hardware error causes the microprocessor to: generating second data about the error based at least in part on the first data in the registers; and store the second data at a location not affected by restarting execution of an operating system in the processor. For example, the execution of the instructions can cause the microprocessor to decode the first data to obtain a temperature of the computing device as part of the second data.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: August 8, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Da Hong, Kexian Huang, Qing Xu
  • Patent number: 11715127
    Abstract: A method and digital signage player for managing display of a distributed digital signage content. The digital signage player stores the distributed digital signage content, and a local placement target for the distributed digital signage content. The digital signage player displays the distributed digital signage content in accordance with the local placement target. The digital signage player exchanges messages with a neighbor digital signage player, for increasing the local placement target of the distributed digital signage content at the request of the neighbor digital signage player. The neighbor digital signage player also displays the distributed digital signage content in accordance with its own placement target, which needs to be decreased. The digital signage player ultimately increases the local placement target of the distributed digital signage content based on the messages exchanged with the neighbor digital signage player.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: August 1, 2023
    Assignee: BROADSIGN SERV INC.
    Inventor: Bryan Mongeau
  • Patent number: 11705195
    Abstract: The present disclosure includes apparatuses, methods, and systems for increase of a sense current in memory. An embodiment includes a memory having a plurality of memory cells, and circuitry configured to count a number of program operations performed on the memory cells of the memory during operation of the memory, and increase a magnitude of a current used to sense a data state of the memory cells of the memory upon the count of the number of program operations reaching a threshold count.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: July 18, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Zhongyuan Lu, Robert J. Gleixner
  • Patent number: 11693723
    Abstract: A system for monitoring job execution includes an interface and a processor. The interface is configured to receive an indication to start a cluster processing job. The processor is configured to determine whether processing a data instance associated with the cluster processing job satisfies a watchdog criterion; and in the event that processing the data instance satisfies the watchdog criterion, cause the processing of the data instance to be killed.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: July 4, 2023
    Assignee: Databricks, Inc.
    Inventors: Alicja Luszczak, Srinath Shankar, Shi Xin
  • Patent number: 11681667
    Abstract: Embodiments of the present systems and methods may provide the capability ensure that data is persisted and accessed correctly without depending on eventually consistent list operations on the object store. For example, in an embodiment, a computer-implemented method for data distribution may comprise attempting to persist a plurality of data parts from a plurality of processing tasks, generating a manifest including information indicating those attempts to persist data parts that have succeeded, and persisting the manifest with the data parts that have been successfully persisted.
    Type: Grant
    Filed: July 30, 2017
    Date of Patent: June 20, 2023
    Assignee: International Business Machines Corporation
    Inventors: Michael Factor, Elliot K Kolodner, Gil Vernik
  • Patent number: 11675999
    Abstract: The machine learning device comprises a training part configured to train a machine learning model used in a vehicle; and a detecting part configured to detect replacement of a vehicle part mounted in the vehicle. The training part is configured to retrain the machine learning model using training data sets corresponding to a vehicle part after replacement when a vehicle part relating to input data of the machine learning model is replaced.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: June 13, 2023
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Daiki Yokoyama, Tomohiro Kaneko
  • Patent number: 11662983
    Abstract: A computer-implemented method for bytecode class verification includes: encountering a class requiring verification of its bytecode during a run of an application; determining whether class relationship data for the class exists in a shared classes cache; in response to a determination that the class relationship data for the class does not exist in the shared classes cache: performing a linear bytecode walk of the bytecode to identify relationship data for the class and verify that the bytecode is well-formed; and storing the identified relationship data as the class relationship data for the class in the shared classes cache; in response to a determination that the class relationship data for the class does exist in the shared classes cache: retrieving the class relationship data for the class from the shared classes cache; and processing the class relationship data.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: May 30, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Sharon Wang, Daniel Heidinga, Hang Shao, Oluwatobi Ajila, Graham Chapman
  • Patent number: 11636910
    Abstract: An apparatus includes a selection data generation circuit configured to generate selection data from fuse data or generate the selection data having a preset test input pattern, depending on whether a failure test is entered; and a failure flag generation circuit configured to generate latch data by latching the selection data, and generate a failure flag by detecting whether the latch data has a preset test pattern.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: April 25, 2023
    Assignee: SK hynix Inc.
    Inventors: Hyeong Soo Jeong, Dong Beom Lee
  • Patent number: 11593141
    Abstract: An information handling system may include at least one processor, and a non-transitory memory coupled to the at least one processor. The information handling system may be configured to execute a configuration procedure to set up a plurality of information handling resources of the information handling system, and wherein the configuration procedure includes a plurality of logical groups related to different types of configuration. Each logical group may include one or more atomic groups, each atomic group including a plurality of logically related atomic operations. In response to a failure of a particular atomic operation of a particular atomic group, the information handling system may be configured to roll back the particular atomic operation and allow the configuration procedure to be restarted at a beginning of the particular atomic group.
    Type: Grant
    Filed: June 29, 2020
    Date of Patent: February 28, 2023
    Assignee: Dell Products L.P.
    Inventors: Tianming Zhang, Jason Jianxin Ye
  • Patent number: 11593295
    Abstract: Systems, methods, and apparatuses relating to operations in a configurable spatial accelerator are described. In one embodiment, a configurable spatial accelerator includes a first processing element that includes a configuration register within the first processing element to store a configuration value that causes the first processing element to perform an operation according to the configuration value, a plurality of input queues, an input controller to control enqueue and dequeue of values into the plurality of input queues according to the configuration value, a plurality of output queues, and an output controller to control enqueue and dequeue of values into the plurality of output queues according to the configuration value.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: February 28, 2023
    Assignee: Intel Corporation
    Inventors: Kermin E. Fleming, Jr., Simon C. Steely, Jr., Kent D. Glossop, Mitchell Diamond, Benjamin Keen, Dennis Bradford, Fabrizio Petrini, Barry Tannenbaum, Yongzhi Zhang
  • Patent number: 11593169
    Abstract: A method of memory deallocation across a trust boundary between a first software component and a second software component is described. Some memory is shared between the first and second software components. An in-memory message passing facility is implemented using the shared memory. The first software component is used to deallocate memory from the shared memory which has been allocated by the second software component. The deallocation is done by: taking at least one allocation to be freed from the message passing facility; and freeing the at least one allocation using a local deallocation mechanism while validating that memory access to memory owned by data structures related to memory allocation within the shared memory are within the shared memory.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: February 28, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: David Thomas Chisnall, Matthew John Parkinson, Sylvan Wesley Clebsch, Roy Schuster
  • Patent number: 11586985
    Abstract: A vehicle control apparatus for controlling a vehicle through a control program using at least one parameter. The at least one parameter is corrected by respective at least one correction value that is obtained after start of execution of a learning operation. The vehicle control apparatus includes: a learning-data storage portion configured to store, as learning data, the at least one correction value obtained after the start of the execution of the learning operation; and a learning-data rewrite portion configured, when the control program is updated, to execute a rewriting operation for rewriting the at least one correction value as the learning data from a pre-update correction value to a post-update correction value, such that the post-update correction value has the same sign as the pre-update correction value, and an absolute value of the post-update correction value is smaller than an absolute value of the pre-update correction value.
    Type: Grant
    Filed: December 1, 2020
    Date of Patent: February 21, 2023
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Atsushi Tabata, Koichi Okuda, Tooru Matsubara, Hiromasa Tatsushiro, Kota Fujii, Yuuki Makino
  • Patent number: 11531603
    Abstract: Systems and techniques are provided for Byzantine agreement in open networks. An indication to change a validation network for an open network from a current validation network to a next validation network may be broadcast. An agreement to change to the validation network to the next validation network may be. An instance of external validity multi-valued Byzantine agreement may be run to determine a continuing sequence number to be used by the next validation network based on the sequence numbers of amendments applied to decentralized database copies stored node computing devices of the open network. The next validation network may be switched to as the validation network for the open network after the continuing sequence number is determined. An amendment validated by the next validation network may be applied to a decentralized database copy. The amendment may include a sequence number that is higher than the continuing sequence number.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: December 20, 2022
    Assignee: Ripple Labs Inc.
    Inventor: Ethan MacBrough
  • Patent number: 11487632
    Abstract: Improved techniques for disaster recover within storage area networks are disclosed. Embodiments include replicating a LIF of a primary cluster on a secondary cluster. LIF configuration information is extracted from the primary cluster. A peer node from a secondary cluster is located. One or more ports are located on the located peer node that match a connectivity of the LIF from the primary cluster. One or more ports are identified based upon one or more filtering criteria to generate a candidate port list. A port from the candidate port list is selected based at least upon a load of the port. Other embodiments are described and claimed.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: November 1, 2022
    Assignee: NetApp Inc.
    Inventors: Raj Lalsangi, Pramod John Mathew, Subramanian Natarajan, Santosh Rao
  • Patent number: 11472420
    Abstract: The machine learning device includes a predicting part configured to use a machine learning model to predict predetermined information, an updating part configured to update the machine learning model, and a part information acquiring part configured to detect replacement of a vehicle part and acquire identification information of the vehicle part after replacement. The updating part is configured to receive a new machine learning model trained using training data sets corresponding to the vehicle part after replacement from a server and apply the new machine learning model to the vehicle, if a vehicle part relating to input data of the machine learning model is replaced with a vehicle part of a different configuration.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: October 18, 2022
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Daiki Yokoyama, Yohei Hareyama
  • Patent number: 11457507
    Abstract: The present disclosure relates to a communication system for serial communication. The communication system may include a master communication device; and at least one slave communication device comprising a unique identifier, wherein the master communication device is connected to the at least one slave communication device via a signal line configured for communications, wherein the master communication device is configured to read at least a part of the unique identifier via the signal line, and assign an address to the at least one slave communication device based at least in part on the unique identifier, and transmit the address to the at least one slave communication device via the signal line.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: September 27, 2022
    Assignee: Phoenix Contact GmbH & Co. KG
    Inventors: Daniel Knoop, Irene Berthold
  • Patent number: 11440559
    Abstract: The machine learning device includes a predicting part configured to use a machine learning model to predict predetermined information, an updating part configured to update the machine learning model, and a part information acquiring part configured to detect replacement of a vehicle part and acquire identification information of the vehicle part after replacement. The updating part is configured to receive a new machine learning model trained using training data sets corresponding to the vehicle part after replacement from a server and apply the new machine learning model to the vehicle, if a vehicle part relating to input data of the machine learning model is replaced with a vehicle part of a different configuration.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: September 13, 2022
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Daiki Yokoyama, Yohei Hareyama
  • Patent number: 11443824
    Abstract: A memory device includes a memory cell array, an input/output circuit, a test register circuit, and a test control block. The memory cell array is suitable for storing data. The input/output circuit is suitable for inputting and outputting the data stored in the memory cell array. The test register circuit is suitable for testing the input/output circuit. The test control block includes a replica circuit having a replica configuration of the test register circuit by modeling the test register circuit, and is suitable for generating the data to test the test register circuit.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: September 13, 2022
    Assignee: SK hynix Inc.
    Inventors: Yucheon Ju, Hosung Cho
  • Patent number: 11442773
    Abstract: An equipment management method comprises a step A of registering, in a database, an alert that includes content of an equipment error, a step B of registering, in the database, a processing status that includes processing of the error, a step C of managing a thread for managing the alert and the processing status in a one-to-one relationship, and a step D of transmitting, to a user terminal, an error notification that includes information indicating generation of the error. The step D includes a step of, when two or more errors do not satisfy a predetermined condition, not integrating the two or more errors in one error notification, and, when the two or more errors satisfy the predetermined condition, integrating the two or more errors in one error notification.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: September 13, 2022
    Assignee: KYOCERA CORPORATION
    Inventors: Kei Iwata, Taku Nakayama, Takashi Furukawa
  • Patent number: 11443340
    Abstract: A method and digital signage player for managing display of a distributed digital signage content. The digital signage player stores the distributed digital signage content, and a local placement target for the distributed digital signage content. The digital signage player displays the distributed digital signage content in accordance with the local placement target. The digital signage player exchanges messages with a neighbor digital signage player, for increasing the local placement target of the distributed digital signage content at the request of the neighbor digital signage player. The neighbor digital signage player also displays the distributed digital signage content in accordance with its own placement target, which needs to be decreased. The digital signage player ultimately increases the local placement target of the distributed digital signage content based on the messages exchanged with the neighbor digital signage player.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: September 13, 2022
    Assignee: BROADSIGN SERV INC.
    Inventor: Bryan Mongeau
  • Patent number: 11442718
    Abstract: A non-volatile memory includes a first block and a second block. The first block is used to store first firmware. The second block is used to store second firmware. A method of controlling the non-volatile memory includes comparing a version of the first firmware and a version of the second firmware, if a comparison result between the version of the first firmware and the version of the second firmware indicates that the second firmware is newer than the first firmware, employing the second firmware to perform a boot process, and if the boot process is successful, upgrading a portion of a firmware image to the first block whenever there is a firmware upgrade request after the boot process.
    Type: Grant
    Filed: March 2, 2021
    Date of Patent: September 13, 2022
    Assignee: Realtek Semiconductor Corp.
    Inventor: Sheng-Kai Hung
  • Patent number: 11436186
    Abstract: An algorithmic matching pipelined compiler and a reusable algorithmic pipelined core comprise a high throughput processor system. The reusable algorithmic pipelined core is a reconfigurable processing core with a pipelined structure comprising a processor with a setup interface for programming any of a plurality of operations as determined by setup data, a logic decision processor for programming a look up table, a loop counter and a constant register, and a block of memory. This can be used to perform functions. A reconfigurable, programmable circuit routes data and results from one core to another core and/or IO controller and/or interrupt generator, as required to complete an algorithm without further intervention from a central or peripheral processor during processing of an algorithm.
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: September 6, 2022
    Assignee: ICAT LLC
    Inventors: Robert D Catiller, Daniel Roig, Gnanashanmugam Elumalai
  • Patent number: 11429451
    Abstract: Examples are disclosed that relate to managing workloads provided by a plurality of clients to a shared resource. One example provides a computing device comprising a processor and a storage device storing instructions executable by the processor. The instructions are executable to provide a first workload from a first client and a second workload from a second client to a shared memory accessible by the first client, the second client, and a resource configured to process the first workload and the second workload. The computing device is configured to determine that an exception has occurred while processing the first workload, and to take an action to prevent execution of at least some additional work from the first client. The instructions are further executable to receive a result of processing the second workload after taking the action to prevent the execution of the additional work.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: August 30, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Chad R. Heinemann, Alexander Robert Paul Grenier, Ziyad Ahmad Ibrahim
  • Patent number: 11422876
    Abstract: A computer system includes a bus interface having error correction capability. The bus interface includes an error register that is configured to provide error information related to correctable errors. System software within the computer system is configured to obtain the error information from the error register and calculate a bit error metric based on the error information. A baseboard management controller within the computer system is configured to take an action in response to obtaining the bit error metric from the system software and determining that a condition related to the bit error metric has been satisfied.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: August 23, 2022
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Jeffrey Matthew Shuey, Neeraj Ladkani, Tao Liu, Subhasish Chakraborty
  • Patent number: 11418382
    Abstract: A method for cooperative active-standby failover between service routers based on health of services configured on the service routers is presented. In an embodiment, a method comprises determining, by a first service router (“SR”) of a SR cluster, a plurality of aggregate score values for a plurality of SRs of the SR clusters. The SR cluster comprises the first SR which is active, and a second SR. An aggregate score value, of the plurality of aggregate score values, indicates health of one or more services configured on a SR. The method further comprises determining, based on the plurality of aggregate score values, whether the first SR, of the SR cluster, is healthier than the second SR. In response to determining that the first SR is healthier than the second SR, the first SR continues to operate in the active mode; otherwise, the first SR switches to a standby mode.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: August 16, 2022
    Assignee: VMware, Inc.
    Inventors: Haihua Luo, Jerry Cheng, Kai-Wei Fan, Michael Hu
  • Patent number: 11403162
    Abstract: An information handling system includes a first memory with a video framebuffer, which in turn includes a regular video framebuffer and a diagnostic video framebuffer. Detected errors within the information handling system are stored within the diagnostic video framebuffer. In response to the error log data being stored within the diagnostic video framebuffer, a processing unit provides a notification signal. In response to the notification signal, a baseboard management controller reads the error log data from the diagnostic framebuffer, and stores the error log data in a second memory of the baseboard management controller.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: August 2, 2022
    Assignee: Dell Products L.P.
    Inventor: Andrew Butcher
  • Patent number: 11360846
    Abstract: Apparatuses of systems that provide Safety Integration Levels (SILs) and Hardware Fault Tolerance (HFT) include a first die, the first die including first processing logic connected to a first connection and the first connection connected to second processing logic of a second die. The first die may further include a second connection to an input/output (I/O) channel where the second connection is coupled to the first processing logic. The apparatuses may further include a second die, the second die including second processing logic and a third connection from a secondary device coupled to the second processing logic. The secondary device is outside the system. The second processing logic is configured to select among three configurations based on signals from the second processing logic and the secondary device: sending first output data on the I/O output channel, sending second output data on the I/O output channel, or de-energizing the I/O channel.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: June 14, 2022
    Assignee: Intel Corporation
    Inventors: Gabriele Boschi, Roger May, Gabriele Paoloni, Nabajit Deka, Matteo Salardi
  • Patent number: 11354299
    Abstract: Described is a system, method, and computer program product to handle unresponsive node communications between two nodes of a database cluster. A high availability monitoring module is provided to address unresponsive node communications before having to automatically evict nodes from the cluster simply for exceeding a communications timeout period threshold.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: June 7, 2022
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Ming Zhu, Cheng-Lu Hsu
  • Patent number: 11356362
    Abstract: Example methods and systems for a network management entity to perform adaptive packet flow monitoring. One example method may comprise receiving a request to monitor a packet flow between a first virtualized computing instance supported by a first host and a second virtualized computing instance supported by a second host. The method may also comprise activating a first set of checkpoints by instructing the first host and/or the second host to monitor the packet flow using the first set of checkpoints. The method may further comprise: in response to detecting a predetermined event based on first performance metric information associated with the packet flow, activating a second set of checkpoints by instructing the first host and/or the second host to monitor the packet flow using the second set of checkpoints.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: June 7, 2022
    Assignee: VMWARE, INC.
    Inventors: Ming Shu, Wenyu Zhang, Qiong Wang, Donghai Han
  • Patent number: 11340957
    Abstract: Techniques for managing computing devices involve: determining an associated weight of each storage device based on a mapping relationship between each storage device in storage devices and partitions included in a switch, the partitions being respectively associated with the computing devices, the storage devices being respectively connected to downstream physical ports of the switch; determining a total associated weight of a storage pool based on the associated weight of each storage device, the storage pool being created based on the storage devices; and if it is determined that the total associated weight does not satisfy a predetermined balance condition, adjusting the mapping relationship between the partitions and the downstream physical ports. Accordingly, such techniques can dynamically adjust the mapping between the partitions of the switch and downstream physical ports, thereby balancing the workloads on the computing devices and buses.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: May 24, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Min Zhang, Yechen Huang
  • Patent number: 11320797
    Abstract: Methods and apparatus to virtualize a process control system are described. A described process control system includes a server cluster including one or more servers. When operating, the server cluster provides a virtual workstation or virtual server, a virtual controller to interoperate with the virtual workstation or server and to implement process control operations, and a virtual input/output device to interoperate with the virtual controller and coupled to one or more field devices within the process control system.
    Type: Grant
    Filed: September 27, 2011
    Date of Patent: May 3, 2022
    Assignee: FISHER-ROSEMOUNT SYSTEMS, INC
    Inventors: Mark Nixon, John Mark Caldwell
  • Patent number: 11321259
    Abstract: A network architecture including network storage. The network architecture includes a plurality of streaming arrays, each streaming array including a plurality of compute sleds, wherein each compute sled includes one or more compute nodes. The network architecture includes a PCI Express (PCIe) fabric configured to provide direct access to the network storage from compute nodes of each of the plurality of streaming arrays, the PCIe fabric including a plurality of array-level PCIe switches, each array-level PCIe switch communicatively coupled to compute nodes of compute sleds of a corresponding streaming array and communicatively coupled to the storage server. The network storage is shared by the plurality of streaming arrays.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: May 3, 2022
    Assignee: Sony Interactive Entertainment Inc.
    Inventor: Roelof Roderick Colenbrander
  • Patent number: 11307921
    Abstract: One embodiment provides for a data processing system comprising multiple independent processors to execute multiple operating system environments of the data processing system, the multiple operating system environments to enable operation of multiple regions of a computing device associated with the data processing system. The multiple operating system environments are interconnected via a transport agnostic communication link. In response to detection of a fatal error in one or more of the multiple operating system environments, the multiple operating system environments coordinate performance of multiple separate error handling operations within the multiple operating system environments to generate a combined error log. The combined error log includes operational states of the multiple operating system environments.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: April 19, 2022
    Assignee: Apple Inc.
    Inventors: Christopher J. Noe, Joshua H. Berlin, Joseph J. Castro, Hardik K. Doshi, Joel N. Kerr, Kerry J. Kopp, Michael J. Smith