Abstract: A data protection system includes a splitter configured to reduce latencies when splitting writes in a computing environment. The splitter captures a write and adds metadata to augment the write with virtual related information. The augmented data is provided to a smartNIC while the write is then processed in the IO stack. The smartNIC may have a volume only visible to the splitter. The smartNIC also includes processing power that allows data protection operations to be performed at the smartNIC rather than with the processing resources of the host.

Abstract: The present disclosure provides a content addressable memory (CAM) for repairing firmware of multi-plane read operations in a flash memory device. The CAM comprises a set of CAM registers configured to store a mapping table. The mapping table comprises a plurality of old addresses, each old address corresponding to a new address. The CAM also comprises N comparators coupling to the set of CAM registers, and configured to compare the old addresses with N input signals for performing the multi-plane read operations on N memory planes, wherein N is an integer greater than 1. The CAM further comprises N multiplexers coupling to the N comparators respectively and to the set of CAM registers, and configured to generate N output signals for the multi-plane read operations. At least one of the N output signals comprises the new address according to the mapping table and a comparison output by the comparators.

Abstract: Methods, systems, and devices for configurable verify level are described. A host device may determine a target level of reliability for a set of data stored in a memory device. The host device may transmit, to the memory device, a command indicating the target level of reliability and a request to perform one or more error management operations for the set of data based on or in response to the target level of reliability. The memory device may determine the target level of reliability and the corresponding error management operations based on or in response to the command. The memory device may perform the error management operations for the set of data. The memory device may transmit, to the host device, an indication of a level of reliability of the set of data based on or in response to the command and performing the set of error management operations.

Abstract: A system-on-chip includes first and second devices. An interconnect segment couples between the first and second devices. A bridge is coupled between the first and second devices and coupled to the interconnect segment. At least one of the bridge or interconnect segment include first and second multiplexers, a monitor circuit, and exclusive-OR logic. The first multiplexer has first and second multiplexer inputs and a first multiplexer output. The second multiplexer has third and fourth multiplexer inputs and a second multiplexer output. The monitor circuit has a first and second monitor circuit outputs. The first monitor circuit output is coupled to the second multiplexer input and the second monitor circuit output is coupled to the fourth multiplexer input. The exclusive-OR logic has first and second exclusive-OR logic inputs. The first exclusive-OR logic input couples to the first multiplexer output and the second exclusive-OR logic input couples to the second multiplexer output.

Abstract: A quantum prediction AI system includes a quantum prediction circuit adapted to receive an input vector representing a subset of a time-sequential sequence; encode the input vector as a corresponding qubit register; apply a trained quantum circuit to the qubit register; and measure one or more qubits output from the quantum prediction circuit to infer a next data point in the series following the subset represented by the input vector.

Abstract: In various examples, a computing device of a dispersed storage network (DSN) receives a store data request including a data object. The computing device identifies a storage unit pool associated with the store data request. The storage unit pool includes a plurality of storage sets, each of the storage sets associated with a plurality of address ranges that are associated with a respective set of memories of the storage set. The computing device identifies a first set of memories of a first storage set of the storage unit pool, and issues a set of write slice requests to the first set of memories to initiate storage of encoded data slices produced from the data object. When an unfavorable storage condition is detected, the computing device identifies a second set of memories of the first storage set and facilitates storage of the data object in the second set of memories.

Abstract: A controller for controlling a memory device may include: a sequence detector suitable for determining, each time a set number of data chunks are processed, whether the set number of recently processed data chunks are sequential data chunks, based on the lengths of the data chunks and logical-address-adjacency of the data chunks; and a processor suitable for performing a sequential operation according to the determination result, until next determination.

Abstract: Provided are a request processing unit to send a first process distribution request to other information processing apparatuses via a communication I/F unit, the first process distribution request being a request for ordering execution of a first process on a first; and an order destination selecting unit to receive, via the communication I/F unit, as a response to the first process distribution request, a first estimated reply time calculated as the time required to receive the transfer of the first data and to reply a first process result obtained by executing the first process on the first data, to use the first estimated reply time to select an order destination to which the execution of the first process is to be ordered by the plurality of information processing apparatuses, and to order the execution of the first process on the first data to the order destination via the communication interface unit.

Abstract: One example method includes intercepting an IO issued by an application, writing the IO and IO metadata to a splitter journal in NVM, forwarding the IO to storage, and asynchronous with operations occurring along an IO path between the application and storage, evacuating the splitter journal by sending the IO and IO metadata from the splitter journal to a replication site. In this example, sending the IO and IO metadata from the journal to the replication site does not increase a latency associated with the operations on the IO path.

Abstract: A storage device includes an integrity checking module checking integrity of data stored in a first host memory buffer (HMB) address of an HMB in a host coupled to the storage device, and an HMB mapping module mapping, if the integrity checking module determines the data as corrupted, the first HMB address to a second address.

Abstract: A method for proactively rebuilding user data in a plurality of storage nodes of a storage cluster is provided. The method includes distributing user data and metadata throughout the plurality of storage nodes such that the plurality of storage nodes can read the user data, using erasure coding, despite loss of two of the storage nodes. The method includes determining that one of the storage nodes is unreachable and determining to rebuild the user data for the one of the storage nodes that is unreachable. The method includes reading the user data across a remainder of the plurality of storage nodes, using the erasure coding and writing the user data across the remainder of the plurality of storage nodes, using the erasure coding. A plurality of storage nodes within a single chassis that can proactively rebuild the user data stored within the storage nodes is also provided.

Abstract: Techniques are provided for storing a row address of a defective row of memory cells to a bank of non-volatile storage elements (e.g., fuses or anti-fuses). After a memory device has been packaged, one or more rows of memory cells may become defective. In order to repair (e.g., replace) the rows, a post-package repair (PPR) operation may occur to replace the defective row with a redundant row of the memory array. To replace the defective row with a redundant row, an address of the defective row may be stored (e.g., mapped) to an available bank of non-volatile storage elements that is associated with a redundant row. Based on the bank of non-volatile storage elements the address of the defective row, subsequent access operations may utilize the redundant row and not the defective row.

Abstract: A method and apparatus for enhancing reliability of a data storage device. The storage device controller is configured to convert a typical UBER-type event to an MTBF (FFR) event by converting a data error event into a drive functional failure. In this context, the converted error is not counted as an UBER type event for purposes of determining the reliability of the storage device.

Abstract: A storage system comprises a plurality of storage nodes each comprising one or more storage devices and a processor coupled to a memory. The storage system is configured to store data blocks across the storage devices of the storage nodes utilizing a redundant array of independent disks (RAID) arrangement. At least a given one of the storage nodes is configured to store a plurality of RAID metadata bitmaps in persistent storage of the storage node so as to be available for a recovery operation in the event of a detected failure, to identify a particular subset of the RAID metadata bitmaps to be updated in conjunction with an additional operation other than the recovery operation, and to temporarily store the identified subset of the RAID metadata bitmaps in the memory of the storage node in a manner determined based at least in part on an operation type of the additional operation.

Abstract: Systems and methods for unified application-level backup and restore using heterogeneous cloud-based backup service providers. An application programming interface is configured to process both data level replication operations as well as application-level operations that are executed to carry out high-level commands between a virtualized computing environment and any one or more of the heterogeneous cloud-based backup service providers. The API receives commands from applications in the virtualized computing environment. The API processes commands from the applications so as to facilitate replication of data to selected one or more cloud-based backup service providers. The commands perform data level replication operations as well as application-level operations for storing content to the cloud-based service provider. After a failure event and/or upon receipt of a restore command, the API initiates application-level operations that restore the application and its constituent entities.

Abstract: Systems and methods related to controlling clock signals for clocking shader engines modules (SEs) and non-shader-engine modules (nSEs) of a graphics processing unit (GPU) are provided. One or more dividers receive a clock signal CLK and output a clock signal CLKA to the SEs and output a clock signal CLKB to the nSEs. The frequencies of CLKA and CLKB are independently selected based on sets of performance counter data monitored at the SEs and nSEs, respectively. The clock signal frequency for either the SEs or the nSEs is reduced when the corresponding sets of performance counter data indicates a comparatively lower processing workload for the SEs or for the nSEs.

Abstract: Aspects include configuring a plurality of functional self-test controllers in a test control device to run a plurality of functional test cases in parallel on a plurality of devices under test. Test traffic is arbitrated between the functional self-test controllers and a plurality of packeted protocol layer interfaces of the test control device. One or more protocol specific conversions are performed between the test traffic and a device-specific packeted protocol of each of the devices under test. Payload checking is performed between the packeted protocol layer interfaces and the devices under test to verify responses of the devices under test to the functional test cases.

Abstract: An information handling system includes a first device having a first data communication interface connected to a first socket area of a socket. A second device includes a second data communication interface connected to a second socket area of the socket. A host processor includes a third data communication interface connected to a third socket area of the socket. When an interposer is installed into the socket in a first orientation, the interposer connects the first data communication interface to the third data communication interface. When the interposer is installed into the socket in a second orientation, the interposer connects the first data communication interface to the second data communication interface.

Abstract: A memory system includes a memory device and a controller. The memory device includes a memory block configured to store target data. The controller is configured to maintain the target data in a write buffer until a program operation to the memory block succeeds, update a write cache tag regarding the target data when the program operation fails and a read only mode is entered, and read the target data from the write buffer based on the write cache tag when a read command regarding the target data is received.

Abstract: According to one embodiment, a semiconductor memory device includes a mounting board and memory dies. The memory dies include first pad electrodes, first pull-up circuits connected to the first pad electrodes, a first output circuit that outputs a first parameter to the first pull-up circuits, first pull-down circuits connected to the first pad electrodes, a second output circuit that outputs a second parameter to the first pull-down circuits, a second pad electrode, a second pull-up circuit connected to the second pad electrode, a third output circuit that is connected to the second pad electrode, a third pad electrode, a second pull-down circuit connected to the third pad electrode, and a fourth output circuit that is connected to the third pad electrode. The second pad electrode of the second memory die is connected to the third pad electrode of the first memory die.

Abstract: Techniques involve determining whether data read from a redundant array of independent disks (RAID) is corrupted, the RAID including two parity disks. The techniques further involve determining, based on the read data being corrupted, whether single-disk data recovery can recover the corrupted data. The techniques further involve recovering, based on the single-disk data recovery failing to recover the corrupted data, the corrupted data using dual-disk data recovery. Such techniques may present a recovery solution for silent data corruption of a RAID with two parity disks, such that corrupted data can be recovered in the case of either a single-disk failure or a dual-disk failure, thereby improving the storage system performance.

Abstract: There are provided a memory system and an operating method of the memory system. The memory system includes: a memory device including a plurality of memory blocks; and a memory controller for controlling the memory device to detect an initial bad block by performing an initial test operation on the plurality of memory blocks. The memory controller registers and manages, as a weak memory block, memory blocks physically adjacent to the detected initial bad block.

Abstract: A memory storage apparatus including a memory array and a controller circuit is provided. The memory array is configured to store a first error correcting code and a first data. The controller circuit is coupled to the memory array. The controller circuit is configured to read the first data from the memory array and determine whether an error bit of the first data is one of one or more data mask bits to decide whether to update the first error correcting code stored in the memory array. The controller circuit includes a switch element. The switch element is coupled to the memory array. The switch element receives the first data from the memory array. An error correcting procedure is not performed on the first data. In addition, a data access method is also provided.

Abstract: A computer-implemented backup management method that includes performing a backup process or method for each one of N backup media storage devices, wherein N is an integer equal to or greater than 1. The method includes performing a filesystem integrity test on test data stored on a device connected to a primary network to obtain a baseline test result. The method includes activating a network switch to connect the primary network to an isolated network associated with one of the N backup media storage devices. The method includes storing a first backup copy of the user data stored on the device on the one of the N backup media storage devices. The first backup copy is stored over a first time period that begins when the storing of the first backup copy is initiated and ends when the storing of the first backup copy is completed.

Abstract: The present disclosure relates to a method, a device, and a computer program product for managing indexes in a storage system. The storage system includes storage data. In the method, a first set of data objects associated with the storage data is acquired. A first set of hashes of the first set of data objects is determined respectively. Hashes in the first set of hashes are hashes of data objects in the first set of data objects. A first file is generated in the storage system to store the first set of hashes. A first name of the first file is determined based on the hashes in the first set of hashes. An index of the storage data is created based on the first file.

Abstract: Embodiments of the present disclosure facilitate handling corrected memory errors on kernel text. An example computer-implemented method includes identifying a correctable error (CE) in an error memory location of a memory and a kernel function impacted by the CE. The kernel function includes a plurality of instructions including a first instruction of the kernel function at a first physical location in a first region of the memory. The first region includes the error memory location. The plurality of instruction is loaded to a second region of the memory. The loading includes storing the first instruction of the kernel function at a second physical location in the second region of the memory. The first physical location in the first region of the memory is updated to include an instruction to branch to the second physical location in the second region of the memory.

Abstract: A method includes determining that initial boot block (IBB) firmware at an information handling system is invalid. The method further includes identifying that a redundant copy of the IBB firmware is stored at the information handling system, and executing the redundant copy of the IBB firmware.

Abstract: A storage system according to certain embodiments includes a client-side repository (CSR). The CSR may communicate with a client at a higher data transfer rate than the rate used for communication between the client and secondary storage. During copy operations, for instance, some or all of the data being backed up or otherwise copied to secondary storage is stored in the CSR. During restore operations, copies of the data stored in the CSR is accessed from the CSR instead of from secondary storage, improving performance. Remaining data blocks not stored in the CSR can be restored from secondary storage.

Abstract: Embodiments are directed to managing data in a file system over a network. A source file system that includes a plurality of objects may be provided. A replication job that copies each object associated with a source replication snapshot to a target file system may be executed. The replication job may be associated with a job identifier. Recovery point information that includes the job identifier, a source snapshot number that corresponds to the source replication snapshot, a target snapshot number that corresponds to a target replication snapshot may be generated. The recovery point information may be stored on the source file system and a copy of the recovery point information may be stored on the target file system. The recovery point information or the copy of the recovery point information may be employed to recover from errors detected during execution of a next replication job.

Abstract: Example embodiments relate generally to systems and methods for continuous data protection (CDP) and more specifically to an input and output (I/O) filtering framework and log management system to seek a near-zero recovery point objective (RPO).

Abstract: A method for providing error correction for a memory array includes for each memory word stored in a data memory portion of the memory array having at least one bit error, storing in an error PROM error data identifying a memory address for the data word in the data memory portion, a bit position of each bit error, and correct bit data for each bit error, monitoring memory addresses presented to the data PROM, if a memory address presented to the data memory portion is an identified memory address, reading from the error PROM the bit position of each bit error and the correct bit data for each bit error, and substituting the correct bit data into each identified bit position of a sense amplifier reading data from the data memory portion.

Abstract: Devices and techniques for managing partial superblocks in a NAND device are described herein. A set of superblock candidates is calculated. Here, a superblock may have a set of blocks that share a same position in each plane in each die of a NAND array of the NAND device. A set of partial super block candidates is also calculated. A partial superblock candidate is a superblock candidate that has at least one plane that has a bad block. A partial superblock use classification may then be obtained. Superblocks may be established for the NAND device by using members of the set of superblock candidates after removing the set of partial superblock candidates from the set of superblock candidates. Partial superblocks may then be established for classes of data in the NAND device according to the partial superblock use classification.

Abstract: A method of responding to failures in a tiered storage system is provided. The method includes (a) rebuilding a set of failed storage extents belonging to a first storage tier; (b) receiving a notification that a particular storage extent has failed while rebuilding the set of failed storage extents belonging to the first tier; and (c) upon determining that the particular storage extent belongs to a second storage tier that has a higher priority than does the first storage tier: (1) pausing rebuilding the set of failed storage extents belonging to the first storage tier, (2) rebuilding the particular storage extent, and (3) resuming rebuilding the set of failed storage extents belonging to the first storage tier after rebuilding the particular storage extent. An apparatus, system, and computer program product for performing a similar method are also provided.

Abstract: A method for coordinating management of operation risks in a distributed storage network (DSN) that includes multiple distributed computing systems including DSN memories begins with a global coordinating unit receiving messages including metadata from managing units associated with the multiple distributed computing systems. The method continues with the global coordinating unit determining, based on the metadata, that storage units in one or more of the distributed computing systems are executing or planning to execute an operation that could result in data loss or data outage. The method continues with the global coordinating unit transmitting an alert, including a command to halt the operation at the affected distributed computing systems.

Abstract: An information handling system includes a first device having a first data communication interface connected to a first socket area of a socket. A second device includes a second data communication interface connected to a second socket area of the socket. A host processor includes a third data communication interface connected to a third socket area of the socket. When an interposer is installed into the socket in a first orientation, the interposer connects the first data communication interface to the third data communication interface. When the interposer is installed into the socket in a second orientation, the interposer connects the first data communication interface to the second data communication interface.

Abstract: A system, and corresponding method, is described for updating or calculating ECC where the transaction volume is significantly reduced from a read-modify-write to a write, which is more efficient and reduces demand on the data access bandwidth. The invention can be implemented in any chip, system, method, or HDL code that perform protection schemes and require ECC calculation, of any kind. Embodiments of the invention enable IPs that use different protections schemes to reduce power consumption and reduce bandwidth access to more efficiently communicate or exchange information.

Abstract: Provided are a computer program product, system, and method for replicating a source data set to a target data store. A point-in-time copy of the source data set is generated having a data structure identifying the data in the source data set as of a point-in-time. A restore operation is initiated to copy the source data set represented by the point-in-time copy to a restored copy of the source data set consistent with the source data set. The source data set records are transferred from the restored copy to the target data store in the target storage.

Abstract: A method and an apparatus for generating a signature representative of the content of a region of an array of data in a data processing system, where the region of the array of data comprising plural data positions, and each data position having an associated data value or values. A data value or values for a data position of the region of the data array is/are generated. The data value or values for the data position of the region of the data array is/are written to storage that stores the region of the data array as it is being generated. A signature representative of the content of the region of the data array is generated in parallel with the data value or values for the data position of the region of the data array being written to the storage.

Abstract: Aspects of the present disclosure relate to an apparatus comprising processing circuitry to execute a plurality of code sequences, and configuration storage to store mode control data for the processing circuitry. When the processing circuitry is executing one of said plurality of code sequences, the mode control data is set so as to identify a high resilience mode of operation of the processing circuitry where usage of one or more components of the processing circuitry is modified so as to increase resilience of the processing circuitry to faults relative to a default mode of operation of the processing circuitry.

Abstract: First information about regions of storage space in a storage environment available for a volume is provided to a service provider, with the storage environment being external to the service provider. The service provider is notified that information usable to locate a storage destination of a portion of the volume is unavailable. Second information that includes the storage destination in the storage environment is obtained from the service provider. A data operation is performed at the storage destination, with the storage destination determined based at least in part from the second information.

Abstract: A computer implemented method for replication includes registering a first database system with a second database system and performing a failback operation on the first database system. The failback operation includes opening a snapshot that includes data known to have existed on the first database system and the second database system at a first time. Transaction log information is requested from the second database system. The transaction log information corresponds to transactions performed on the second database system beginning with the first time. The transaction log information is applied to the snapshot data on the first database system. Related apparatus, systems, techniques and articles are also described.

Abstract: A plurality of tracks that are to be copied to a backup volume are aggregated in a container data structure. The plurality of tracks are stored physically contiguously in a single Redundant Array of Independent Disks (RAID) stride. Mapping metadata is updated in the backup volume to indicate how logical tracks of the backup volume correspond to physical tracks stored in the RAID stride.

Abstract: Examples herein disclose selecting a row of data among multiple rows of data for validation of a repair to the selected row of data. The examples here disclose validating the repair to the selected row of data.

Abstract: A system, method, and computer program product are provided for automated API regression testing with a business flow sense/customer journey. In operation, a system identifies one or more environments for which to perform one or more testing activities. The system discovers an application programming interface (API) architecture associated with the one or more environments by tracing all unique combinations of business flows and/or customer journeys on production and discovering all API paths for each of the business flows. The system stores and categorizes information associated with the API architecture in at least one API dictionary, based on the machine learning. The system automatically recommends relevant API test cases associated with the API architecture for performing API testing on the one or more environments, using the information associated with the API architecture from the API dictionary as a reference.

Abstract: One embodiment provides a method for re-balancing data and metadata across multiple sub-file systems of a file system. The method includes determining sub-file systems including an amount of data that exceeds a threshold. At least one cell in the sub-file systems is identified as a candidate for re-balancing. A re-balance process is performed on the at least one cell that includes performing a flush operation to flush dirty data from file system buffers, copying an inode table for an independent set of files in the at least one cell to a destination sub-file system, notifying an allocation manager for the destination sub-file system of a new storage pool to manage, and performing an un-quiesce operation on I/O operations to each element in the at least one cell.

Abstract: A network sensor that features a data store and a packet processing engine. In communication with the data store, the packet processing engine comprises (1) a cache management logic and (2) deduplication logic. The cache management logic is configured to analyze packets to determine whether (a) a packet under analysis include duplicated data and (b) content of the packet is targeted for storage in a same continuous logical storage area as the duplicated data. The deduplication logic, when activated by the cache management logic, is configured to generate a deduplication reference for insertion into the packet prior to storage.

Abstract: A method for preventing data loss in a RAID includes monitoring storage drives making up a RAID. The method individually tests a storage drive of the RAID by subjecting the storage drive to a stress workload test. This stress workload test may be designed to place additional stress on the storage drive while refraining from adding stress to other storage drives in the RAID. In the event the storage drive fails the stress workload test (e.g., the storage drive cannot adequately handle the additional workload or generates errors in response to the additional workload), the method replaces the storage drive with a spare storage drive and rebuilds the RAID. In certain embodiments, the method tests the storage drive with greater frequency as the age of the storage drive increases. A corresponding system and computer program product are also disclosed.

Abstract: A storage device is provided. The storage device includes a field programmable gate array board connected to a first port of the storage device; and a storage controller including a first interface circuit and a second interface circuit. The first interface circuit is connected to the FPGA board, the second interface circuit is connected to a second port of the storage device, at least one port from among the first port and the second port being configured to connect to an external storage device, and the FPGA board is configured to provide a path for transferring data in a peer-to-peer manner between the storage controller and the external storage device without intervention of a host.

Abstract: Techniques are provided for storage tier verification checks. A determination is made that a mount operation of an aggregate of a set of volumes stored within a multi-tier storage environment has completed. A first metafile and a second metafile are maintained to track information related to the storage of objects of a volume of the aggregate within a remote object store that is a tier of the multi-tier storage environment. A distributed verification is performed between the first metafile and the second metafile to identify an inconsistency. Accordingly, the first metafile and the second metafile are reconciled to address the inconsistency so that storage information within the first metafile and the second metafile are consistent.

Abstract: A system for testing memory and a method thereof are disclosed. In the system, a physical address range of at least one memory module is converted into a logical address range of the memory, and a read and write test is performed on the memory according to the logical address range of the memory, and an error message corresponding to the memory is detected during the read and write test, and a logical address contained in the error message is converted into a physical address of the memory module corresponding to the logical address, so as to improve test coverage and validity of memory test, and effectively determine the problematic memory module, thereby achieving the technical effect of preventing the test program from being closed by the operating system.