Abstract: According to one embodiment, a memory system is capable of being connected to a host. The memory system includes a nonvolatile memory and a controller that receives information regarding an operating state of the host. The controller controls the nonvolatile memory according to commands from the host and selects a parameter for interrupt coalescing for transmissions to the host of interrupts related to command completion notices for the commands from the host based on the information regarding the operating state of the host.

Abstract: One aspect of the instant application can provide a storage system. The storage system can include a plurality of byte-addressable storage devices and a plurality of media controllers. A respective byte-addressable storage device is to store a parity block or a data block of a data stripe, and a respective media controller is coupled to a corresponding byte-addressable storage device. Each media controller can include a tracker logic block to serialize critical sections of multiple media-access sequences associated with an address on the corresponding byte-addressable storage device. Each media-access sequence comprises one or more read and/or write operations, and the data stripe may be inconsistent during a critical section of a media-access sequence.

Abstract: Methods, systems, and devices for error information signaling for memory are described. A memory device may perform an error detection procedure while in a power-saving mode. Upon detecting an error, the memory device may indicate the error to a host device. In response to indicating the error, the memory device may receive a command to exit the power-saving mode. The memory device may comply with the command and exit the power-saving mode by enabling one or more interfaces of the memory device. The memory device may receive a request for error information over the one or more interfaces and, in response to the request, may transmit the error information to the host device.

Abstract: Techniques for managing a redundant array of independent disks (RAID) involve detecting an abnormality of a storage device in a RAID. The techniques further involve resetting the storage device in response to detecting the abnormality. The techniques further involve storing an address of a write operation for the RAID within a preset time period, so as to rebuild the RAID in the case that the storage device is recovered within the preset time period. Accordingly, temporary errors of the RAID can be efficiently handled, the number of downtime of the RAID caused by the storage device or the back end can be reduced, and computing resources and time required to rebuild the RAID can be significantly reduced.

Abstract: A memory storage system comprising a non-volatile semiconductor memory device comprising a memory array and a plurality of buffers, and a controller in communication with the plurality of buffers. The controller may be configured to issue a command to the non-volatile semiconductor memory device to cause a transfer of a data payload from the controller to a subset of n first buffers of the plurality of buffers. The controller may also be configured to issue a command to the non-volatile semiconductor memory device to cause the non-volatile memory device to transfer a data payload from the memory array to a subset of n first buffers of the plurality of buffers.

Abstract: A plurality of failure domains are communicatively coupled to each other via a network, and each of the plurality of failure domains is coupled to one or more storage devices. A failure resilient stripe is distributed across the plurality of storage devices, such that two or more blocks of the failure resilient stripe are located in each failure domain.

Abstract: An apparatus includes a central processing unit (CPU) core and a cache subsystem coupled to the CPU core. The cache subsystem includes a first memory, a second memory, and a controller coupled to the first and second memories. The controller is configured to execute a sequence of scrubbing transactions on the first memory and execute a functional transaction on the second memory. One of the scrubbing transactions and the functional transaction are executed concurrently.

Abstract: A given policy file is obtained at a publishing node of a decentralized system of nodes, wherein the given policy file defines a policy that applies to at least a subset of nodes in the decentralized system of nodes. The given policy file is sent to a decentralized storage network for storage therein. Storage metadata is received from the decentralized storage network, wherein the storage metadata represents address information associated with storage of the given policy file in the decentralized storage network. The publishing node generates policy file retrieval metadata based on the storage metadata received from the decentralized storage system. The policy file retrieval metadata is sent to a blockchain network for storage therein. One or more querying nodes of the decentralized system of nodes access the blockchain network to obtain the policy file retrieval metadata in order to then retrieve the policy file from the decentralized storage network.

Abstract: A method for execution by a vault management device of a storage network includes determining a failure impact level to vaults of the storage network based on a failed storage unit within the vaults, where the vaults include a first vault that is associated with a first set of storage units and a first decode threshold number, and a second vault that is associated with a second set of storage units and a second decode threshold number, and where the failure impact level is based on the number of non-failed storage units within each of the vaults. The method continues with determining a failure abatement approach based on the failure impact level. The method continues by with facilitating the failure abatement approach.

Abstract: Apparatuses, systems, and methods for a wireless device to perform detection and mitigation of data stalls. The mitigation may occur during and/or at initiation of a data connection. The wireless device may establish a data connection(s) with a network over a Wi-Fi or cellular interface and monitor the data connection(s) for a data stall condition(s)/hint(s). The wireless device may perform a remedial action(s) responsive to detection of a data stall condition(s)/hint(s), including initiating a service recovery of the cellular interface, initiating a radio access technology (RAT) upgrade procedure, and/or initiating a handover procedure to a neighbor cell.

Abstract: A memory controller includes a command queue, a memory interface queue, at least one storage queue, and a replay control circuit. The command queue has a first input for receiving memory access commands. The memory interface queue receives commands selected from the command queue and couples to a heterogeneous memory channel which is coupled to at least one non-volatile storage class memory (SCM) module. The at least one storage queue stores memory access commands that are placed in the memory interface queue. The replay control circuit detects that an error has occurred requiring a recovery sequence, and in response to the error, initiates the recovery sequence. In the recovery sequence, the replay control circuit transmits selected memory access commands from the at least one storage queue by grouping non-volatile read commands together separately from all pending volatile reads, volatile writes, and non-volatile writes.

Abstract: Techniques are described for generating an approximate frequency histogram using a series of Bloom filters (BF). For example, to estimate the f1 and f2 cardinalities in a dataset, an ordered chain of three BFs is established (“BF1”, “BF2”, and “BF3”). An insertion operation is performed for each datum in the dataset, whereby the BFs are tested in order (starting at BF1) for the datum. If the datum is represented in a currently-tested BF, the subsequent BF in the chain is tested for the datum. If the datum is not represented in the currently-tested BF, the datum is added to the BF, a counter for the BF is incremented, and the insertion operation for the current datum ends. To estimate the cardinality of f1-values in the dataset, the BF2-counter is subtracted from the BF1-counter. Similarly, to estimate the cardinality of f2-values in the dataset, the BF3-counter is subtracted from the BF2-counter.

Abstract: A storage control device, includes a processor configured to: dispose original blocks to which data on an object basis is divided and assigned and copy blocks which are copies of the original blocks respectively alternately in storage devices of a distributed storage system in a distributed manner; determine, upon reception of a read request for an object, as a first storage control device out of the storage control devices a read task which collectively reads the original blocks and the copy blocks which belong to the object from one of the storage devices; notify the storage control devices of the read task; upon reception of the read request as the first storage control device, collectively read the original blocks and the copy blocks; and transfer the data of the blocks which have been read to a second storage control device which is the read task for the blocks.

Abstract: A plurality of failure domains are communicatively coupled to each other via a network, and each of the plurality of failure domains is coupled to one or more storage devices. A failure resilient stripe is distributed across the plurality of storage devices, such that two or more blocks of the failure resilient stripe are located in each failure domain.

Abstract: One example method includes exposing a block storage which is distributed across a group of multiple sites, receiving a primary write request that identifies data to be stored, separating data identified in the primary write request into multiple data pieces, encoding the data pieces by creating multiple new blocks of data based on the multiple data pieces, where the data pieces are encoded in such a way that when a sufficient number, but fewer than all, of the multiple new blocks of data are retrieved, the data identified in the write request is recoverable by decoding, and writing the new blocks of data to different respective sites of the group, where writing of the new blocks of data is performed in conjunction with a plurality of secondary write requests, each of which corresponds to one of the new blocks of data.

Abstract: Distributed storage systems frequently use a centralized metadata repository that stores metadata in an eventually consistent distributed database. However, a metadata repository cannot be relied upon for determining which erasure coded fragments are lost because of a storage node(s) failures. Instead, when recovering a failed storage node, a list of missing fragments is generated based on fragments stored in storage devices of available storage nodes. A storage node performing the recovery sends a request to one or more of the available storage nodes for a fragment list. The fragment list is generated, not based on a metadata database, but on scanning storage devices for fragments related to the failed storage node. The storage node performing the recovery merges retrieved lists to create a master list indicating fragments that should be regenerated for recovery of the failed storage node(s).

Abstract: A system for controlling a process having a first control device for processing first data, and a first communication interface of a first communication unit designed for receiving the first data, and a second control device for processing second data, and a second communication interface of a second communication unit, designed for receiving the second data. The first communication unit comprises a third communication interface and the second communication unit comprises a fourth communication interface. The third communication interface is connected to the second communication interface and the first processor processes or compares the second data received by the third communication interface with the first data received by the first communication interface.

Abstract: A memory device includes: a first memory bank and a second memory bank; a control logic configured to receive a command and control an internal operation of the memory device; and an error correction code (ECC) circuit configured to retain in a latch circuit first read data read from the first memory bank in response to a first masked write (MWR) command for the first memory bank based on a latch control signal from the control logic, generate a first parity from data in which the first read data retained in the latch circuit is merged with first write data corresponding to the first MWR command in response to a first write control signal received from the control logic, and control an ECC operation to retain in the latch circuit second read data read from the second memory bank based on the latch control signal.

Abstract: The disclosed computer-implemented method for storage block replication in a hybrid storage environment may include receiving a request associated with a data source being replicated to modify a cloud object, storing an instruction for modifying the cloud object, determining that a replication operation for the source has completed, and modifying the cloud object and deleting the instruction for modifying the cloud object in response to determining that the replication operation has completed. In some examples, the request to modify the cloud object may include deleting the cloud object. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: To identify slice errors, a processing module of a computing device in a dispersed storage network (DSN) sends first list digest requests to at least first and second dispersed storage (DS) units. The requests indicates a first range of slice names to include in a first list digest. The processing module receives digest responses from the DS units, and compares the digest responses to determine whether they identify the same slices. If they do not identify the same slices, the processing module sends second list digest requests indicating a sub-range of the first range of slice names to include in second list digests. The sub-range continues to be narrowed until the processing module identifies at least one sub-range of slice names where a slice error exists.

Abstract: A semiconductor device includes an error check and scrub (ECS) command generation circuit and an ECS control circuit. The ECS command generation circuit generates an ECS command based on a refresh command. During an ECS operation, the ECS control circuit generates an ECS mode signal that is activated based on the ECS command and generates an ECS active command, an ECS read command, and an ECS write command to continue the ECS operation.

Abstract: A distributed RAID storage-device-assisted data rebuild system includes a first RAID data storage device, provided in response to data unavailability, that retrieves respective first data for a first data stripe from each of the other RAID data storage devices, performs an XOR operation on the respective first data to generate first rebuilt data for the first data stripe, and stores the first rebuilt data as part of the first data stripe. A second RAID data storage device retrieves respective second data for a second data stripe from third RAID data storage devices, performs an XOR operation on the respective second data and third data for the second data stripe stored on the second RAID data storage device to generate second rebuilt data for the second data stripe, and provides the second rebuilt data for storage on the first RAID data storage device as part of the second data stripe.

Abstract: Embodiments of the present disclosure provide method, device and computer program product for managing a storage system. The storage system includes a disk having a plurality of extents. The method comprises obtaining metadata associated with an RAID stripe in a first RAID of a first type, the first RAID including at least a part of extents from the plurality of extents. The method also comprises allocating an additional extent to the RAID stripe. The method further comprises converting, based on the allocated additional extent and by modifying the metadata, the first RAID of the first type into a second RAID of a second type in a degraded mode. Additionally, the method comprises initiating, based on the modified metadata, a rebuilding process for the second RAID, so as to convert the second RAID from the degraded mode to a normal mode.

Abstract: In a storage system that implements RAID (D+P) with an existing cluster of drives in which the drives have (D+P) partitions that are protection group members, cluster member transfer code creates a new drive cluster when fewer than D+P new drives are added to the storage system. The cluster member transfer code moves one or more drives from the existing cluster into a new cluster so that the number of new drives plus the number of moved drives equals D+P. One or more protection groups may be moved to the new cluster.

Abstract: A system is provided to receive a first request to write data to a non-volatile storage system, which comprises an MRAM, a NAND, and an HDD. The system allocates a first physical address in the MRAM and writes the data to the MRAM at the MRAM first physical address. In response to determining that the data in the MRAM is not accessed within a first predetermined time period, the system copies the data from the MRAM to the NAND at a NAND physical page address and maps a logical page index associated with the data to the NAND physical page address. In response to determining that the data in the NAND is not accessed within a second predetermined time period, the system copies the data from the NAND to the HDD based on an HDD physical address and maps the NAND physical page address to the HDD physical address.

Abstract: A processor system comprises at least a program counter structure, an interrupt control device, a memory, and an apparatus. The interrupt control device is configured to respond to an interrupt request by providing the program counter structure with an address associated with the interrupt request. The program counter structure is configured to output the address to the memory via a memory interface. The apparatus is configured to protect the program counter structure in case of an interrupt request, the apparatus includes an interface, a comparing device, and an outputting device.

Abstract: A system and method for accessing redundancy array of independent disks (RAID) are provided. The system is coupled between a central processing unit (CPU), a main memory and the RAID, and includes an arithmetic circuit, a register and a disk controller. The arithmetic circuit is coupled to the CPU and the main memory, and is configured to access data from the main memory. The arithmetic circuit calculates a plurality of syndromes of the data to be written and store the calculated syndromes of the plurality of syndromes into the main memory. The register is coupled to the arithmetic circuit, and is configured to store a calculation progress of the plurality of syndromes need to be calculated by the arithmetic circuit. The disk controller is coupled to the register and the RAID, and is configured to read the calculation progress from the register, and according to the calculation progress, to store the calculated syndromes of the plurality of syndromes from the main memory to the RAID.

Abstract: The embodiments of the present disclosure disclose a method and apparatus for reading or writing disk data. The disk includes a primary metadata block storing metadata, a backup metadata block for backing up metadata, and at least one object block group. Each object block group includes a data block storing object data, and an index block storing an index of the object data. The primary metadata block is located at a head of the disk; and the backup metadata block is located at a tail of the disk. The at least one object block group is located between the primary metadata block and the backup metadata block. In reading or writing object data, the index in the index block, the metadata in the primary metadata block and the metadata backed up in the backup metadata block can be separately operated. By applying the embodiments of the present disclosure, the life and security of the disk are increased.

Abstract: Disclosed herein is a computer-implemented method of including data characterising values of source data in redundant data, wherein there are K source nodes of source data and R redundant nodes of redundant data such that there are a plurality of N nodes, where N=(K+R), wherein each of the N nodes comprises a plurality of sub-blocks of data, wherein a block of data comprises N sub-blocks with each of the N sub-blocks comprised by a different one of the N nodes, such that each block comprises K sub-blocks of source data and R sub-blocks of redundant data, the method comprising: calculating K data characterising values in dependence on sub-blocks comprised by the source nodes, wherein each of the data characterising values is associated with a different one of the K source nodes, each of the K data characterising values is associated with a different block and each of the K data characterising values is calculated in dependence on all of the sub-blocks of the source node that the data characterising value is as

Abstract: A memory system may include: a plurality of memory devices each including a user area and an over-provisioning area (OP area); and a controller configured for controlling the plurality of memory devices, wherein the controller includes: a detection circuit configured for detecting a defective memory device among the plurality of memory devices; a selection circuit configured for selecting an available memory device excluding the defective memory device among the plurality of memory devices; and a processor configured for moving target data stored in the defective memory device into the OP area of the available memory device.

Abstract: Described herein are embodiments related to defect detection in memory components of memory systems with time-varying bit error rate. A processing device performs an error recovery flow (ERF) to recover a unit of data comprising data and a write timestamp indicating when the unit of data was written. The processing device determines whether to perform a defect detection operation to detect a defect in the memory component using a bit error rate (BER), corresponding to the read operation, and the write timestamp in the unit of data. The processing device initiates the defect detection operation responsive to the BER condition not being expected for the calculated W2R (based on the write timestamp). The processing device can use an ERF condition and the write timestamp to determine whether to perform the defect detection operation. The processing device initiates the defect detection operation responsive to the ERF condition not being expected the calculated W2R (based on the write timestamp).

Abstract: A data storage system that provides improved reliability and performance comprises a first memory device including a plurality of first storage components and a first memory controller, the first memory controller controls operation of the first storage components, a second memory device including a plurality of second storage components and a second memory controller, the second memory controller controls operation of the second storage components, a grading device determining grades for each of the first storage components and the second storage components, and a system controller that the location of data based on the grades of the first storage components and the second storage components.

Abstract: A playlist preview is generated to provide a preview of media content items identified by a media playlist. The playlist preview can be created by selecting all or some of the media content items in the playlist, determining preview portions of the selected media content items, and arranging the preview portions with or without a transition effect. The playlist preview can be easily shared with other users through, for example, social media sites.

Abstract: A plurality of failure domains are communicatively coupled to each other via a network, and each of the plurality of failure domains is coupled to one or more storage devices. A failure resilient stripe is distributed across the plurality of storage devices, such that two or more blocks of the failure resilient stripe are located in each failure domain.

Abstract: The subject technology receives first metadata corresponding to a set of micro-partitions. The subject technology generates second metadata for a grouping of the first metadata. The subject technology generates a first data structure including the first metadata and a second data structure including the second metadata, the second data structure including information associating the second metadata to the first metadata. The subject technology stores the first data structure and the second data structure in persistent storage as a first file and a second file. The subject technology receives a query on a table. Further, the subject technology analyzes the query against cumulative table metadata to determine whether data stored in the table matches the query.

Abstract: The subject technology receives first metadata corresponding to a set of micro-partitions. The subject technology generates second metadata for a grouping of the first metadata. The subject technology generates a first data structure including the first metadata and a second data structure including the second metadata, the second data structure including information associating the second metadata to the first metadata. Further, the subject technology stores the first data structure and the second data structure in persistent storage as a first file and a second file.

Abstract: Division RAID (Redundant Array of Independent Disks) for disk array expansion is provided herein. A data storage system as described herein can include a memory that stores computer executable components and a processor that executes computer executable components stored in the memory. The computer executable components can include a disk initialization component that divides a first storage disk into partitions comprising a uniform number of partitions; an array expansion component that adds the first storage disk to a logical storage array, wherein the logical storage array comprises second storage disks, the second storage disks respectively being divided into partitions comprising the uniform number of partitions; and a data allocation component that allocates a data group to respective partitions of the first storage disk and a subset of the second storage disks in a deterministic order, resulting in a set of allocated partitions.

Abstract: A computer-implemented method according to one embodiment includes identifying an accessing of a file within an operating system, checking an in-memory cache for path information associated with the file, checking an external cache for the path information associated with the file, conditionally retrieving the path information associated with the file by performing a file system lookup and adding the path information associated with the file to the in-memory cache and the external cache, and returning the path information.

Abstract: A computer program product, according to one embodiment, includes a computer readable storage medium having program instructions embodied therewith. The computer readable storage medium is not a transitory signal per se. Moreover, the program instructions are readable and/or executable by a controller to cause the controller to perform a method which includes: assigning data having a first heat to a first data stream, assigning data having a second heat to a second data stream, and writing the data streams simultaneously, in parallel, to page-stripes having a same index across a series of planes of memory. The writing of the first data stream begins at an opposite end of the series of planes as the writing of the second data stream, the writing of the streams being toward one another. Other systems, methods, and computer program products are described in additional embodiments.

Abstract: A method for increasing effective storage capacity in a heterogeneous storage array is disclosed. In one embodiment, such a method determines a number of smaller-capacity storage drives and a number of larger-capacity storage drives in a storage array. The method further determines which RAID arrays in the storage array may be composed exclusively of the larger-capacity storage drives. Using this information, the method establishes a first set of RAID arrays in the storage array that will be composed exclusively of the larger-capacity storage drives and a second set of RAID arrays that may contain the smaller-capacity storage drives. The method then initiates a process to swap the smaller-capacity storage drives in the first set with the larger-capacity storage drives in the second set until the first set of RAID arrays is composed exclusively of the larger-capacity storage drives. A corresponding system and computer program product are also disclosed.

Abstract: The present invention provides a software storage unit, a backup method, and a backup control program capable of completing data transfer to a data backup destination in a shorter time. The software storage unit includes a software storage section constructed across a plurality of physical machines and a switch section coupled to an external network, wherein the software storage section grasps data to back up, among stored data, which is to be transferred to a data backup destination, splits the grasped data into a plurality of data parts, and issues a command to transfer the split data parts from respective ones of the plurality of physical machines to the data backup destination via the switch section.

Abstract: A semiconductor memory device is provided. The device includes a memory cell array including a plurality of dynamic memory cells; an error correction code (ECC) engine; an input/output (I/O) gating circuit connected between the ECC engine and the memory cell array; an error information register configured to store an error address and a first syndrome, the error address and the first syndrome being associated with a first error bit in a first codeword stored in a first page of the memory cell array; and a control logic configured to, based on the first codeword being read again and including a second error bit which is different from the first error bit, recover a second syndrome associated with the second error bit by using the first syndrome stored in the error information register and sequentially correct the first error bit and the second error bit.

Abstract: A storage system interface (SSI) located externally to a data storage system serves as an interface between a host system and the data storage system. The SSI may be part of the host system, and in some embodiments may be a separate and discrete component from the remainder of the host system, physically connected to the remainder of the host system by one or more buses that connect periphery devices to the remainder of the host system. The SSI may be physically connected directly to the internal fabric of the data storage system, and may be implemented on a card or chipset physically connected to the remainder of a host system by a PCIe bus. The SSI may provide functionality traditionally provided on data storage systems, enabling at least some I/O processing to be offloaded from data storage systems to hosts that include SSIs.

Abstract: Systems, devices, and methods for providing ECC-assisted scrubbing of memory devices and error correction of memory devices. In one embodiment, a method is disclosed comprising obtaining, at a storage device, data and a first parity portion to write to a memory device, the first parity portion generated via a first encoding; encoding, at the storage device, the data with a second encoding to generate a second parity portion; aligning, by the storage device, the data, the first parity portion, and the second parity portion according to a predefined alignment scheme, the aligning generating aligned data; and writing, by the storage device, the aligned data to the memory device.

Abstract: The failure of a storage unit in a storage array of a storage system may render the storage unit unresponsive to any requests. Any writes to the storage system that occur during the failure of the storage unit will not be reflected on the failed unit, rendering some of the failed unit's data stale. Assuming the failed unit's data is not corrupted but is just stale, a partial rebuild may be performed on the failed unit, selectively reconstructing only data that is needed to replace the stale data. Described herein are techniques for storing information that identifies the data that needs to be rebuilt. When the storage unit fails, the segment identifier associated with the last data segment written to the storage system may be stored. Upon the storage unit recovering, the storage system can rebuild only those data segments whose identifier is greater than the stored segment identifier.

Abstract: Methods, systems, and computer-readable media for a bulk ingestion interface for a distributed data storage system are described. A bulk ingestion interface may allow bulk data to be ingested into a distributed data storage system using compute resources separate from respective compute resources of the distributed data storage system used to perform access requests to datasets stored on one or more resource hosts of the distributed data storage system.

Abstract: A semiconductor system may include a first and second rank, and a semiconductor device. The semiconductor device may be configured to receive information on the first and second ranks to prioritize which rank out of the first and second ranks to perform an operation with instead of the other rank. The information may include PVT conditions. The information may include error occurrences of the first or second ranks.

Abstract: A device including an equalizer that includes a first input configured to receive an input signal, a second input configured to receive a reference signal, and a third input configured to receive an adjustment signal. The equalizer also includes a first output configured to transmit a corrected signal, wherein the corrected signal is generated based on data outputs controlled via the input signal, the reference signal, and a clock signal, wherein the data outputs are modified based on the first adjustment signal, wherein corrected signal offsets inter-symbol interference on the input signal based on a data bit received at the first input prior to reception of the input signal.

Abstract: An apparatus is described that includes a memory card. The memory card also includes volatile memory devices. The memory card also includes non volatile memory devices. The memory card is configurable to implement a first portion of the storage space of the non volatile memory devices as system memory. The memory card also includes a controller to manage, upon a power down event, the transfer of information from the volatile memory devices into a second portion of the storage space of the non volatile memory devices.

Abstract: A data storage system includes: a storage device having a first storage and a physically separate second storage. A first core includes first data information related to first data to be written to the first storage, and a second core includes second data information related to second data to be written to the second storage. A shared memory is accessible by the first and second cores, and an emergency power system supplies backup power to the first and second cores when external power supplied to the data storage system is less than a minimum threshold operating power. When a write operation error of the second core is detected in a first mode, the first core writes the second data information to the first storage as third data information and writes the second data to the first storage as third data by referring to the second data information.