Abstract: Methods and systems for variable rate control include determining a new communications rate in response to measured data traffic patterns. A receive change message is transmitted to a receiver that triggers the receiver to wait for an end of transmission (EoT) message and to set a new communications rate. A transmit change message is transmitted to a transmitter that triggers the transmitter to send the EoT message to the receiver, to set the new communications rate, and to send a start of transmission (SoT) message to the receiver before resuming data communications.

Abstract: Method and device for processing a communication network A method and a device for processing a communication network are provided, wherein (a) a first performance parameter of the communication network is determined; (b) a third performance parameter is determined based on the first performance parameter and a second performance parameter, which second performance parameter was previously determined, wherein the second performance parameter comprises a forecast of an expected network performance over time until the end of the scheduled lifetime of the communication network; and (c) the communication network is processed based on the third performance parameter. Furthermore, an according computer program product is suggested.

Abstract: An apparatus includes an error correction code circuit and an error correction code selection circuit. The error correction code circuit may be configured to encode and decode data using any of a plurality of error correction codes. The error correction code selection circuit may be configured to control which of the plurality of error correction codes is used by the error correction code circuit to encode and decode data responsive to one or more reliability statistics and predetermined data characterizing distribution properties of each of the plurality of error correction codes.

Abstract: Teachings presented herein provide a method and apparatus for processing input information bits for coding using a code, such that the length of the information word formed from the input information bits matches a fixed information word length defined by the code. In at least one embodiment, a coding circuit receives input information bits (and adds error protection bits as needed, to make the information word length match the fixed information word length. The method and apparatus contemplate generating the error protection bits by sub-coding a subset of the input information bits (e.g., parity bit generation), thereby providing extra protection for that subset. These teachings allow the same code to be used for coding feedback or other information, where the amount of information to be coded varies as a function of operating modes.

Abstract: A receiver configured for use in a communication system, such as a magnetic recording channel, and having a soft-output channel detector provided with a soft-input/soft-output (SISO) modulation codec for parity bits of a block error-correction code. A transmitter of the communication system is configured to encode data by applying a modulation code to the parity bits that have been generated using the block error-correction code. The SISO modulation codec provides an interface between the soft-output channel detector and a parity-check decoder that enables decoding iterations between them in a manner that takes into account inter-bit correlations imposed by the modulation code. In some embodiments, the soft-output channel detector is configured to operate at a fractional rate and to process an input signal carrying non-binary symbols, and the parity-check decoder is configured to apply parity-check-based decoding that is based on a non-binary low-density parity-check code.

Abstract: A computer reduces data fragmentation on a thin provisioned storage system. The computer receives a storage request. The computer determines a virtual storage size based at least in part on the received storage request. The computer creates an assigned virtual list that includes a list of reserved physical storage locations associated with the storage request. The computer further receives a WRITE command, and responsive to the WRITE command, allocates storage based at least in part on the created assigned virtual list.

Abstract: A method for data storage includes, in a memory that includes multiple memory blocks, specifying at a first time a first over-provisioning overhead, and storing data in the memory while retaining in the memory blocks memory areas, which do not hold valid data and whose aggregated size is at least commensurate with the specified first over-provisioning overhead. Portions of the data from one or more previously-programmed memory blocks containing one or more of the retained memory areas are compacted. At a second time subsequent to the first time, a second over-provisioning overhead, different from the first over-provisioning overhead, is specified, and data storage and data portion compaction is continued while complying with the second over-provisioning overhead.

Abstract: A technique for encoding a signal used in a digital communication system in which individual traffic channel data rates may be adapted to specific channel conditions. In particular, a forward error correction coding rate is adapted for individual channels while at the same time maintaining a fixed block size independent of the FEC coding rate. This allows the system data rate to adapt to the channel conditions experienced by a specific user. Thus, users experiencing good communication conditions with low multipath distortion may be allocated higher capacity, whereas users with significant multipath distortion may make use of lower rate (higher levels of coding) error codes to maintain high quality. Messages are sent from a transmitter to a receiver to inform the receiver of the coding rate implemented at any given point in time.

Abstract: A data storage device includes a data storage medium, and an error correction code unit configured to process an error correction code for data to be stored in the data storage medium. The error correction code unit includes a storage block configured to store the data to be stored in the data storage medium, and an encoder configured to divide the data stored in the storage block into a plurality of data groups according to an address of the storage block, to encode the plurality of data groups, to encode a plurality of parity data groups that are generated by encoding the plurality of data groups, and to generate final parity data.

Abstract: By utilizing Reed-Solomon erasure decoding algorithms and techniques, the system is able to perform error detection for the case where the number of bytes received in error exceeds a correcting capability of a decoder. The error detection can be used, for example, to determine whether a codeword is decodable, and whether the retransmission of data is necessary. The retransmission can be accomplished by assembling a message that is sent to another modem requesting retransmission of one or more portions of data, such as one or more codewords.

Abstract: Methods and systems for communicating in a wireless network may distinguish different types of packet structures by modifying the phase of a modulation constellation, such as a binary phase shift keying (BPSK) constellation, in a signal field. Receiving devices may identify the type of packet structure associated with a transmission or whether the signal field is present by the phase of the modulation constellation used for mapping for the signal field. In one embodiment, the phase of the modulation constellation may be determined by examining the energy of the I and Q components after Fast Fourier Transform. Various specific embodiments and variations are also disclosed.

Abstract: An operating method of a controller includes selecting bits of code word to be punctured; detecting locations of incapable bits of an input word based on locations of the bits to be punctured and a structure of a generation matrix calculation unit; refreezing the input word such that frozen bits and incapable bits of the input word overlap; generating input word bits by replacing information word bits with frozen bits based on the refreezing result; generating the code word by performing generation matrix calculation on the input word bits; generating output bits by puncturing the code word based on locations of the bits to be punctured; and transmitting the output bits to a nonvolatile memory device.

Abstract: A data storage device is disclosed comprising a head actuated over a disk. Data is written to the disk and read from the disk to measure a quality metric. A recording parameter is repeatedly adjusted and the quality metric is measured for each adjustment of the recording parameter. An operating value for the recording parameter is selected that corresponds to a substantially maximum areal density for the disk when the measured quality metric substantially matches a target quality metric.

Abstract: A base station device receives an acquisition request for data from a first terminal and transmits, to the first terminal, data associated with the acquisition request. At this point, while the base station device is in the process of transmitting the requested data to the first terminal by using a first transmission line, the base station device receives, from a second terminal, an acquisition request for data that is the same as the requested data. In such a case, the base station device transmits, to both the first terminal and the second terminal by using the first transmission line, data that has not been transmitted to the first terminal to which the requested data is being transmitted among the requested data and transmits, to the second terminal by using a second transmission line, data that has been transmitted to the first terminal among the requested data.

Abstract: A data storage system configured to adaptively code data and related methods are disclosed. In some embodiments of the present invention, a data storage system includes a controller and a non-volatile memory array having a plurality of memory pages. The controller includes a channel monitor that determines the quality of read signals from the pages when they are read, and provides adjustment metrics to aid in the selection of a code rate, such as a code rate for a low-density parity-check (LDPC) code. In this way, the code rate used for data encoding can be dynamically adjusted to accommodate degradation of the non-volatile memory array over its useable life.

Abstract: An apparatus and method are provided for a mobile communication system. The method includes receiving a signal; determining location information of symbol groups; and acquiring the symbol groups, to which an orthogonal sequence is applied, from the signal, based on the location information. The symbol groups are mapped to orthogonal frequency division multiple (OFDM) symbols and multiple antennas based on a symbol group index and a physical HARQ indicator channel (PHICH) group index, and the symbol groups are mapped to the OFDM symbols and the multiple antennas in an alternating pattern in accordance with the symbol group index.

Abstract: A method for encoding a reduced polar code is disclosed. The method generally includes (a) modifying an input codeword including polar code encoded input data by removing one or more bits from one of (i) a first part of the input codeword and (ii) a second part of the input codeword and (b) generating an output codeword by concatenating the first and the second parts of the modified input codeword.

Abstract: The present invention provides an encoding method and an encoding device. The method includes: dividing to-be-encoded input data into M parts according to the number of levels of concatenated Polar encoding, where M is the number of levels of concatenated Polar encoding; and performing Polar encoding for information bits of each level of Polar encoding level by level to obtain Polar-encoded data of the input data, where each part of data obtained through the dividing and output bits of a previous level of Polar encoding serve together as information bits of a next level of Polar encoding. Embodiments of the present invention can improve performance of Polar codes.

Abstract: Methods for dynamic memory cache size adjustment, enabling dynamic memory cache size adjustment, memory devices, and memory systems are disclosed. One such method for dynamic memory cache size adjustment determines available memory space in a memory array and adjusts a size of a memory cache in the memory array responsive to the available memory space.

Abstract: Subject matter disclosed herein relates to determining that a portion of a memory is at least partially non-functional, replacing the portion of at least partially non-functional memory; and adjusting an error detection and/or correction process responsive to determining that the portion of the memory is at least partially non-functional and/or replacing the portion of at least partially non-functional memory.

Abstract: Provided is a multicarrier communication apparatus by which information quantity of CQI reporting can be reduced. In the apparatus, each CQI is recorded in a CQI table section (122) by being classified into a plurality of CQI groups by following a certain rule. A CQI selecting section (123) estimates fluctuation range and variance of reception qualities of the entire resource block to be reported, based on an SINR value outputted from a quality level calculating section (121). Then, based on the estimated values, the CQI selecting section selects a suitable CQI group in a first step, selects a suitable CQI value from among the CQIs included in the selected CQI group in a second step, and outputs the ID of the selected CQI group and the selected CQI value to a CQI generating section (124). Based on such information, the CQI generating section (124) generates a CQI frame to be transmitted to a base station.

Abstract: An apparatus and method are provided for transmitting a symbol group in a mobile communication system. The method includes generating the symbol group to which an orthogonal sequence is applied; mapping the generated symbol group to an orthogonal frequency division multiple (OFDM) symbol and a multiple antenna array based on a symbol group index and a physical hybrid automatic repeat request (HARQ) indicator channel (PHICH) group index; and transmitting the mapped symbol group. The generated symbol group is mapped to the OFDM symbol and the multiple antenna array in an alternating pattern in accordance with the symbol group index.

Abstract: Systems and processes may be used to retrieve metadata from a nonvolatile memory of a portable device and transmit the retrieved metadata to an external host. Metadata may be analyzed using the external host and/or at least a portion of the metadata may be modified based on the analysis. Modified metadata may be transmitted from the external host to a memory controller of the host.

Abstract: To calculate sequential CRCs, a CRC pipeline may be used to calculate the sequential CRCs for a block of data The CRC pipeline includes a plurality of stages, where, in each subsequent stage a CRC calculated from a previous stage is used to calculate an offset CRC. For example, using at least one CRC calculator and CRC shifter, a stage in the pipeline removes an effect of first portion of the data represented by a previously calculated CRC from the CRC and then adds an effect of a second portion of data neighboring the first portion in a received data block to yield an offset CRC. For example, a stage may change CRC(0:63) to CRC(32:95) by removing the effect of bytes 0:31 and adding the effect of bytes 64:95. At each stage, the byte offset may get smaller until all the sequential CRCs have been calculated.

Abstract: Disclosed embodiments are directed to systems and methods for dynamic overprovisioning for data storage systems. In one embodiment, a data storage system can reserve a portion of memory, such as non-volatile solid-state memory, for overprovisioning. Depending on various overprovisioning factors, recovered storage space due to compressing user data can be allocated for storing user data and/or overprovisioning. Utilizing the disclosed dynamic overprovisioning systems and methods can result is more efficient utilization of cache memory, reduction of write amplification, increase in a cache hit rate, and the like. Improved data storage system performance and increased endurance and longevity can thereby be attained.

Abstract: Technologies are generally described herein for adapting an error correction coding scheme. Some example technologies may receive a message. The technologies may generate a portion of a codeword by encoding the message based on the error correction coding scheme. The technologies may transmit a copy of the portion of the codeword from a transmitter to a receiver via a feedforward communications channel. The technologies may generate feedback based on the copy of the portion of the codeword. The technologies may transmit a copy of the feedback from the receiver to the transmitter via a feedback communications channel. The technologies may generate an adapted error correction coding scheme by adjusting the error correction coding scheme based on the copy of the feedback.

Abstract: A machine-implemented method of generating trapping-set information for use in LDPC-decoding processing of read signals generated, e.g., by sensing a storage medium, such as a magnetic platter. In one embodiment, the method can be implemented as an add-on to any other trapping-set search method in which the discovered trapping sets are evaluated to determine their influence on the overall bit-error rate and/or error-floor characteristics of the LDPC decoder. The method can advantageously reuse at least some of the computational results obtained during this evaluation, thereby requiring a relatively small amount of additional computations, while providing a significant benefit of discovering many more trapping sets in addition to the ones that are being evaluated.

Abstract: Low complexity error correction using cyclic redundancy check (CRC). Communications between communication devices, sometimes including at least one redundant transmission from a transmitter to a receiver, undergo low complexity error correction. CRC may be employed in conjunction with using any desired type of ECC or using uncoded modulation. Based on CRC determined bit-errors, as few as a singular syndrome associated with a singular bit-error or a linear combination of syndromes associated with two or more singular bit-errors within two or more received signal sequences are employed to perform error correction of the received signal. Real time combinations of multiple syndromes associated with respective single bit-errors (that may themselves be calculated off-line) are employed in accordance with error correction. In addition to CRC, any ECC may be employed including convolutional code, RS code, turbo code, TCM code, TTCM code, LDPC code, or BCH code.

Abstract: The present invention provides an approach for FEC encoding based on intermediate code block lengths not associated with any supported mother FEC code. A first string of k2 data bits is received. The first string of data bits is encoded to generate an N2 bit code block for transmission over a channel of a wireless communications network. The first data bit string is encoded based on a supported (N1,k1) forward error correction (FEC) code of a code rate R=k1/N1, configured to encode a string of data bits of a length k1 bits to generate a code block of a length N1 bits. To facilitate the encoding of the first string of data bits based on the (N1,k1) FEC code, the encoding comprises padding, repeating and/or puncturing the first string of data bits and a resulting N1 bit code block to generate the N2 bit code block.

Abstract: A method and device for receiving a data block in a wireless communication system, the method performed by a receiver. The method includes: receiving a physical layer protocol data unit (PPDU) from a transmitter over an operating channel, the PPDU including a signal field, a Very High Throughput-Signal-A (VHT-SIG-A) field, a Very High Throughput-Signal-B (VHT-SIG-B) field and a padded data block, generating a first data block by removing zero or more physical padding bits from the padded data block in a physical layer; and generating a second data block by removing zero or more Medium Access Control (MAC) padding bits from the first data block in a MAC layer.

Abstract: A method and an apparatus for puncturing bits in parity bit groups in a digital broadcasting system are provided. In a method for transmitting signaling information in a digital broadcasting system, a received information bit stream is encoded and a parity bit is added. The parity bit is punctured such that parity bits of different patterns are formed between adjacent frames.

Abstract: An encoding method changes an encoding rate of an erasure correcting code. One cycle is defined as 12k bits (wherein k represents a natural number) which is an encoding output using LDPC-CC with an encoding rate of 1/2, and includes information and parity. From the one cycle, only the information is arranged in the output order of the encoding output to obtain 6k bit information X6i, X6i+1, X6i+2, X6i+3, X6i+4, X6i+5, . . . , X6(i+k?1) X6(i+k?1)+1, X6(i+k?1)+2, X6(i+k?1)+3, X6(i+k?1)+4, and X6(i+k?1)+5. Known information is inserted in 3k pieces of information (Xj) among the 6k bit information, so that when 3k pieces of mutually different j is divided by 3, there is a remainder of 0 regarding k pieces, there is a remainder of 1 regarding k pieces, and there is a remainder of 2 regarding k pieces, to thereby obtain the parity from the information containing the known information.

Abstract: Mechanisms are provided for broadcasting data to a plurality of receiver devices. A data broadcast transmission rate and a level of error correction to be used when broadcasting data are determined based on prior feedback received from the plurality of receiver devices. The feedback comprises channel condition information specifying conditions of one or more connections of a channel over which data was previously broadcast to the receiver devices. Data to be broadcast to the plurality of receivers is encoded in accordance with the determined level of error correction. The encoded data is broadcast at the determined data broadcast transmission rate over the channel to the plurality of receiver devices.

Abstract: Encoded least significant bit (LSB) values are generated for a cell based at least in part on a readback value for the cell. The encoded LSB values is decoded in order to obtain one or more decoded LSB values. Encoded most significant bit (MSB) values are generated for the cell based at least in part on (1) the readback value for the cell and (2) the decoded LSB values. The encoded MSB values are decoded in order to obtain one or more decoded MSB values, wherein the bit positions of the decoded LSB values do not overlap with the bit positions of the decoded MSB values.

Abstract: A system, a method and an apparatus are disclosed herein for receiver terminal driven joint encoder and decoder mode adaptation for SU-MIMO transmission. In one embodiment, the system comprises a transmitter that is able to be directed to transmit wireless signals over a multiple-input, multiple output (MIMO) system using any of a plurality of encoding modes; and a user terminal having a receiver comprising a decoding module which has a plurality of decoding modes, each of which can be used to decode communications from the transmitter received over a multiple-input, multiple output (MIMO) channel, wherein at least one encoding mode is operable with multiple of the decoding modes.

Abstract: Embodiments of the present disclosure describe device, methods, computer-readable media and system configurations for decoding codewords using a side channel. In various embodiments, a memory controller may be configured to determine that m of n die of non-volatile memory (“NVM”) have failed iterative decoding. In various embodiments, the memory controller may be further configured to generate a side channel from n-m non-failed die and the m failed die other than a first failed die. In various embodiments, the memory controller may be further configured to reconstruct, using iterative decoding, a codeword stored on the first failed die of the m failed die based on the generated side channel and on soft input to an attempt to iteratively decode data stored on the first failed die. In various embodiments, the iterative decoding may include low-density parity-check decoding. Other embodiments may be described and/or claimed.

Abstract: A method and system for constructing a generator matrix is disclosed. The method includes: receiving a parity check matrix H, wherein the parity check matrix H includes multiple circulant sub-matrices; rearranging the parity check matrix H by column and row permutations to obtain a rearranged parity check matrix H?; and constructing the generator matrix G based on the rearranged parity check matrix H?.

Abstract: A hard decision memory interacts with a multi-layered low-density parity-check decoder by sending multiple L values and E values to a multi-layered low-density parity-check decoder (LDPC), and the L value E value hard decision memory (LE hard decision memory) receives one or more hard decisions. The LE hard decision memory comprises a global mapping element to interleave L values from a first and second circulant and store the interleaved values in a first memory element. A low-density parity-check decoder then processes the circulants from the first memory element and stores output in a second memory element. The LE hard decision memory does not include any mux-demux elements. The use of the LE hard decision memory results improved multi-level LDPC decoding of an LDPC encoded message.

Abstract: A check node processing unit updates an extrinsic value ratio based on a prior value ratio for each row of a parity check matrix with respect to input data. An identifying unit identifies, based on an element of the parity check matrix that can be identified by a row and column associated with the updated extrinsic value ratio, a next-target element in the same column and in a different row. The identifying unit identifies an element to be updated in the next step by the check node processing unit, from among multiple elements included in the same column. A variable node processing unit updates, based on the extrinsic value ratio, a prior value ratio associated with the identified next-target element after the check node processing unit completes the updating of each row. The check node processing unit and the variable node processing unit alternately and iteratively execute their operations.

Abstract: The present disclosure includes apparatuses and methods for physical page, logical page, and codeword correspondence. A number of methods include error coding a number of logical pages of data as a number of codewords and writing the number of codewords to a number of physical pages of memory. The number of logical pages of data can be different than the number of physical pages of memory.

Abstract: The present invention relates to a software radio system and a decoding apparatus and method thereof. According to an embodiment of the present invention, there is provided a forward error correction decoding apparatus for a software radio system, including: a receiving module for receiving decoding tasks from a plurality of uplink channels; and a decoder matrix for executing the decoding tasks, wherein the decoder matrix is shared by the plurality of uplink channels. The decoding apparatus and method as well as the software radio system according to the embodiments of the present invention can be well adapted to the high computing capabilities, sufficient flexibility and scalability as required by base station systems for next-generation wireless communication systems.

Abstract: Apparatus and methods provide relatively low uncorrectable bit error rates, low write amplification, long life, fast and efficient retrieval, and efficient storage density such that a solid-state drive (SSD) can be implemented using relatively inexpensive MLC Flash for an enterprise storage application.

Abstract: A programmable Built In Self Test (pBIST) system used to test embedded memories where the memories may be operating at a voltage domain different from the voltage domain of the pBIST. A plurality of buffer and synchronizing registers are used to avoid meta stable conditions caused by the time delays introduced by the voltage shifters required to bridge the various voltage domains.

Abstract: Error correction decoding is performed on a codeword where the codeword is unable to be successfully decoded. One or more bits in the codeword are selected to be replaced with an erasure. The selected bits in the codeword is/are replaced with an erasure to obtain a codeword with one or more erasures. Error correction decoding is performed on the codeword with one or more erasures.

Abstract: According to exemplary embodiments, a system, is provided for bit error rate (BER)-based wear leveling in a solid state drive (SSD). A block-level BER value for a block in the SSD is determined. An adjusted PE cycle count for the block is incremented or decremented based on the block-level BER value. Wear leveling is then performed in the SSD based on the adjusted PE cycle count.

Abstract: In one embodiment, the present invention includes an error correction method. The error correction method comprises receiving a digital signal and processing the digital signal to perform a first error correction. The first error correction includes a first correction for data insertions or deletions and a first correction of data errors to generate a reference signal. The reference signal corresponds to the digital signal having been corrected to a first correction accuracy. The digital signal and the reference signal may be processed to perform a second correction for data insertions or deletions to generate a synchronized signal. The second correction of the digital signal is based on the reference signal, and the correction accuracy of the second correction is more accurate than the first correction accuracy.

Abstract: A method begins by a dispersed storage (DS) processing module mapping a set of data partitions to a set of storage regions. For each data partition, the method continues with the DS processing module segmenting the data partition into a plurality of data segments and designating a first data segment. The method continues with the DS processing module generating data storage mapping information. The method continues with the DS processing module encoding the data storage mapping information to produce at least one set of encoded mapping information slices and for each data partition, encoding the plurality of data segments to produce a plurality of sets of encoded data slices. The method continues with the DS processing module outputting the at least one set of encoded mapping information slices and, for each data partition, the plurality of sets of encoded data slices to the DSN for storage therein.

Abstract: Embodiments provide a method comprising estimating a first set of log-likelihood ratio (LLR) values for a plurality of memory cells of a memory; based on the first set of LLR values, performing a first error correcting code (ECC) decoding operation; in response to determining a failure of the first ECC decoding operation, generating, by adjusting the first set of LLR values, a second set of LLR values for the plurality of memory cells; and based on the second set of LLR values, performing a second ECC decoding operation.

Abstract: A method and apparatus are provided for adapting the data blocks to be supplied to a turbo coder, wherein the adaptation of the block length of the data blocks to the minimum required block length of the turbo coder is insured without the disadvantage of the suboptimum termination of the turbo coder.

Abstract: Methods, apparatuses, and computer program products are disclosed for encoding/decoding a wireless control signal. For encoding, control bits are received and encoded with a first error control code so as to create a first set of encoded bits. The encoded bits are then encoded with a second error control code so as to create a second set of encoded bits, which are modulated as beacon tones and subsequently transmitted. For decoding, beacon tones corresponding to a set of control bits are received and subsequently demodulated so as to ascertain a set of demodulated bits. The demodulated bits are then decoded with a decoder so as to ascertain a set of decoded bits. The decoded bits are then decoded with a second decoder so as to ascertain a second set of decoded bits, which includes the set of control bits.