Parallel Patents (Class 717/119)
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Patent number: 8448135Abstract: System and method for executing a graphical program. A first structure in a graphical program is displayed on a display. The first structure includes two or more frames, each configured to contain a respective portion of the graphical program. The respective portions of the graphical program are included in the two or more frames. During execution of the graphical program, the first structure executes the respective portions of the graphical program in the two or more frames in parallel via respective execution processes. When a first portion of the respective portions completes execution prior to all others of the portions, execution of the other portions is terminated.Type: GrantFiled: April 1, 2010Date of Patent: May 21, 2013Assignee: National Instruments CorporationInventor: Jeffrey L. Kodosky
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Patent number: 8441488Abstract: Exemplary apparatus, method, and system embodiments provide for processing an action script for a graphical image for visual display. An exemplary apparatus comprises: a first memory; first circuitry configured to convert a plurality of descriptive elements of the action script into a plurality of operational codes; and second circuitry configured to execute the plurality of operational codes using corresponding data stored in the first memory to generate pixel data for the graphical image. Exemplary embodiments may further include third circuitry configured to parse the action script into the plurality of descriptive elements and the corresponding data, and fourth circuitry configured to extract data from the action script and to store the extracted data in the first memory as a plurality of control words having the corresponding data in predetermined fields.Type: GrantFiled: September 5, 2012Date of Patent: May 14, 2013Assignee: LeoNovus USA Inc.Inventors: Bhaskar Kota, Lakshmikanth Surya Naga Satyavolu, Ganapathi Venkata Puppala, Praveen Kumar Bollam, Sairam Sambaraju, Paul L. Master
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Patent number: 8432404Abstract: Exemplary apparatus, method, and system embodiments provide for accelerated hardware processing of an action script for a graphical image for visual display. An exemplary method comprises: converting a plurality of descriptive elements into a plurality of operational codes which at least partially control at least one processor circuit; and using at least one processor circuit, performing one or more operations corresponding to an operational code to generate pixel data for the graphical image. Another exemplary method for processing a data file which has not been fully compiled to a machine code and comprising interpretable descriptions of the graphical image in a non-pixel-bitmap form, comprises: separating the data file from other data; parsing and converting the data file to a plurality of hardware-level operational codes and corresponding data; and performing a plurality of operations in response to at least some hardware-level operational codes to generate pixel data for the graphical image.Type: GrantFiled: February 14, 2009Date of Patent: April 30, 2013Assignee: LeoNovus USA Inc.Inventors: Bhaskar Kota, Lakshmikanth Surya Naga Satyavolu, Ganapathi Venkata Puppala, Praveen Kumar Bollam, Sairam Sambaraju, Paul L. Master
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Patent number: 8432403Abstract: Exemplary apparatus, method, and system embodiments provide for accelerated hardware processing of an action script for a graphical image for visual display. An exemplary apparatus comprises: a first memory; and a plurality of processors to separate the action script from other data, to convert a plurality of descriptive elements of the action script into a plurality of hardware-level operational or control codes, and to perform one or more operations corresponding to an operational code of the plurality of operational codes using corresponding data to generate pixel data for the graphical image. In an exemplary embodiment, at least one processor further is to parse the action script into the plurality of descriptive elements and the corresponding data, and to extract data from the action script and to store the extracted data in the first memory as a plurality of control words having the corresponding data in predetermined fields.Type: GrantFiled: February 14, 2009Date of Patent: April 30, 2013Assignee: LeoNovus USA Inc.Inventors: Bhaskar Kota, Lakshmikanth Surya Naga Satyavolu, Ganapathi Venkata Puppala, Praveen Kumar Bollam, Sairam Sambaraju, Paul L. Master
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Patent number: 8424011Abstract: A first instance and a second instance of an activity of a process model may be executed, the first instance, the second instance, and the activity being associated with activity state data describing one or more states thereof. A co-process associated with the first instance, the second instance, and the activity may be spawned, and the co-process may be executed based on the activity state data.Type: GrantFiled: May 31, 2007Date of Patent: April 16, 2013Assignee: SAP AGInventors: Alistair P. Barros, Alexander Grosskopf
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Patent number: 8423750Abstract: Mechanisms are provided for offloading a workload from a main thread to an assist thread. The mechanisms receive, in a fetch unit of a processor of the data processing system, a branch-to-assist-thread instruction of a main thread. The branch-to-assist-thread instruction informs hardware of the processor to look for an already spawned idle thread to be used as an assist thread. Hardware implemented pervasive thread control logic determines if one or more already spawned idle threads are available for use as an assist thread. The hardware implemented pervasive thread control logic selects an idle thread from the one or more already spawned idle threads if it is determined that one or more already spawned idle threads are available for use as an assist thread, to thereby provide the assist thread. In addition, the hardware implemented pervasive thread control logic offloads a portion of a workload of the main thread to the assist thread.Type: GrantFiled: May 12, 2010Date of Patent: April 16, 2013Assignee: International Business Machines CorporationInventors: Ronald P. Hall, Hung Q. Le, Raul E. Silvera, Balaram Sinharoy
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Patent number: 8413047Abstract: The aspects enable a processor to concurrently execute markup language code (e.g., HTML) having embedded scripting language code (e.g., JAVASCRIPT®) during a page load operation by a browser. A markup language parser parses markup language code until embedded scripting language code is encountered. The segment of embedded scripting language code is extracted for execution by a scripting language engine which proceeds concurrently with speculative parsing of the markup language code. Markup language code generated by execution of scripting language code is evaluated to determine if it is well formed, and a partial rollback of the markup language parse and re-parsing of portions of the markup language code is accomplished if not. Concurrent parsing of markup language code and execution of scripting language code, with partial roll back of the parsing process when necessary, continues until all markup language code has been parsed and all scripting language code has been executed.Type: GrantFiled: May 12, 2011Date of Patent: April 2, 2013Assignee: QUALCOMM IncorporatedInventors: Christopher A. Vick, Bin Wang, Mehrdad Mohammad H Reshadi
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Patent number: 8397224Abstract: A system and methods are disclosed for executing a technical computing program in parallel in multiple execution environments. A program is invoked for execution in a first execution environment and from the invocation the program is executed in the first execution environment and one or more additional execution environments to provide for parallel execution of the program. New constructs in a technical computing programming language are disclosed for parallel programming of a technical computing program for execution in multiple execution environments. It is also further disclosed a system and method for changing the mode of operation of an execution environment from a sequential mode to a parallel mode of operation and vice-versa.Type: GrantFiled: September 13, 2004Date of Patent: March 12, 2013Assignee: The MathWorks, Inc.Inventor: Cleve Moler
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Patent number: 8387009Abstract: In general, in one aspect, the disclosure describes a method that includes initializing a queue for a master thread. A cyclic pointer buffer is created based on heap variables in arguments in the master thread. At least one heap variable is passed from the master thread to a slave thread. A pointer for the master thread is exchanged with a pointer for an entry in the buffer. The entry in the buffer is indicated as being available for processing by the slave thread.Type: GrantFiled: February 28, 2007Date of Patent: February 26, 2013Assignee: Intel CorporationInventors: Wenlong Li, Eric Li
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Patent number: 8387032Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for captive runtime deployment. In one aspect, a method performed by data processing apparatus employing a runtime environment includes accessing software code of a software application that relies on a runtime of the runtime environment to operate; selecting a proper subset of the runtime, including sharable library code, based on information associated with the software application; combining the software code and the proper subset of the runtime to form a computer program configured to effect the software application using a version of the runtime captive to the computer program, the captive version of the runtime including the proper subset of the runtime; and storing the computer program on a computer-readable medium coupled with a processor.Type: GrantFiled: March 4, 2009Date of Patent: February 26, 2013Assignee: Adobe Systems IncorporatedInventors: Oliver Goldman, Edward R. W. Rowe
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Patent number: 8387004Abstract: A compositional application programming interface (API) permits non-sequential construct declaration independent of other API calls. A wrapper is applied to an imperative API to provide a compositional interface that enables arbitrary and autonomous construct declaration. Additionally, a literal syntax (e.g., code literals, graphic literals . . . ) affords a convenient declaration mechanism for such constructs.Type: GrantFiled: February 9, 2007Date of Patent: February 26, 2013Assignee: Microsoft CorporationInventors: Brian C. Beckman, Henricus Johannes Maria Meijer, Danny Van Velzen, Evgueni Zabokritski
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Patent number: 8381174Abstract: System and method for deterministic modification of global variables in a graphical program. Input including the structure in the graphical program may be received, where the structure is displayed in the graphical program. At least one graphical program node is associated with the structure. The at least one graphical program node may be executable to modify the value of a global variable. During execution of the graphical program the structure ensures deterministic modification of values of the global variable.Type: GrantFiled: October 31, 2007Date of Patent: February 19, 2013Assignee: National Instruments CorporationInventor: Steven W. Rogers
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Patent number: 8375359Abstract: A method for using available server threads to process resources and reduce the overall time of performing XA interactions in two-phase commit protocol implemented by the transaction manager. A TM processing XA interactions dispatches interaction commands for multiple resources to a thread manager, which dispatches the commands to idle server threads. In one embodiment, the TM attempts to dispatch all but one of the interaction commands to separate threads. The primary thread then processes the remaining resource command. Any commands relating to dispatch requests that were unable to be dispatched to separate threads due to unavailability are processed by the primary thread. Once the primary server has processed its interaction commands and received a signal indicating the threads receiving dispatch requests have completed their respective processing of dispatched commands, the next group of commands is processed in a similar manner.Type: GrantFiled: December 21, 2009Date of Patent: February 12, 2013Assignee: Oracle International CorporationInventors: Alexander J. Somogyi, Adam Messinger, Anno R. Langen
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Patent number: 8307337Abstract: Embodiments of parallelization and/or instrumentation in a producer graph oriented programming framework have been presented. In one embodiment, a request to run an application program is received, wherein object-oriented source code of the application program includes methods and producer dependency declarations, wherein the producer dependency declaration for a given method identifies a set of zero or more producers with outputs that are an input to the given method, wherein a producer is at least an instance and a method associated with that instance. Further, execution of the application program may be parallelized based on dependency between producers of the application program using the runtime. In some embodiments, the application program is instrumented using the runtime.Type: GrantFiled: December 1, 2006Date of Patent: November 6, 2012Assignee: Murex S.A.S.Inventors: Fady Chamieh, Elias Eddé
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Patent number: 8302076Abstract: Systems and methods for parallel incomplete LU (ILU) factorization in distributed sparse linear systems, which order nodes underlying the equations in the system(s) by dividing nodes into interior nodes and boundary nodes and assigning no more than three codes to distinguish the boundary nodes. Each code determines an ordering of the nodes, which in turn determines the order in which the equations will be factored and the solution performed.Type: GrantFiled: November 12, 2008Date of Patent: October 30, 2012Assignee: Landmark Graphics CorporationInventors: Qinghua Wang, James William Watts, III
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Patent number: 8286198Abstract: A method and an apparatus for a parallel computing program calling APIs (application programming interfaces) in a host processor to perform a data processing task in parallel among compute units are described. The compute units are coupled to the host processor including central processing units (CPUs) and graphic processing units (GPUs). A program object corresponding to a source code for the data processing task is generated in a memory coupled to the host processor according to the API calls. Executable codes for the compute units are generated from the program object according to the API calls to be loaded for concurrent execution among the compute units to perform the data processing task.Type: GrantFiled: November 4, 2008Date of Patent: October 9, 2012Assignee: Apple Inc.Inventors: Aaftab A. Munshi, Nathaniel Begeman
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Patent number: 8266587Abstract: Disclosure for using SLP in processing a plurality of statements, wherein the statements are associated with an array having a number of array positions, and each statement includes one or more expressions. Expressions are gathered for each of the statements into a structure comprising a single merge stream furnished with a location for each expression. The location for a given expression is associated with one of the array positions. A plurality of expressions are selectively identified and SLP packing operations are applied to the identified expressions to merge into one or more isomorphic sub-streams. Expressions of the isomorphic sub-streams and other expressions of the single merge stream are combined into a number of input vectors that are substantially equal in length to one another. A location vector is generated that contains the respective locations for all of the expressions in the single merge stream.Type: GrantFiled: December 26, 2007Date of Patent: September 11, 2012Assignee: International Business Machines CorporationInventors: Alexandre E. Eichenberger, Kai-Ting Amy Wang, Peng Wu
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Patent number: 8230353Abstract: Iterative development of services may be provided by simultaneously developing service implementations and the corresponding WSDL description. At least one web service may be specified by WSDL code accepted as input. Output code may be created corresponding to each of the inputted web service. A graphical display item may be displayed corresponding to each inputted web service. The WSDL code, output code, and graphical display may be updated to reflect user input modifying a web service. A WSDL document and/or an output code document may be generated including modified web services.Type: GrantFiled: October 11, 2007Date of Patent: July 24, 2012Assignee: Oracle America, Inc.Inventors: Roderico A. Cruz, Christopher B. Webster, Nam Tuan Nguyen, Srividhya Narayanan
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Patent number: 8209664Abstract: General-purpose distributed data-parallel computing using high-level computing languages is described. Data parallel portions of a sequential program that is written by a developer in a high-level language are automatically translated into a distributed execution plan. A set of extensions to a sequential high-level computing language are provided to support distributed parallel computations and to facilitate generation and optimization of distributed execution plans. The extensions are fully integrated with the programming language, thereby enabling developers to write sequential language programs using known constructs while providing the ability to invoke the extensions to enable better generation and optimization of the execution plan for a distributed computing environment.Type: GrantFiled: March 18, 2009Date of Patent: June 26, 2012Assignee: Microsoft CorporationInventors: Yuan Yu, Ulfar Erlingsson, Michael A Isard, Frank McSherry
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Publication number: 20120131552Abstract: A high level programming language provides a read-only communication operator that prevents a computational space from being written. An indexable type with a rank and element type defines the computational space. For an input indexable type, the read-only communication operator produces an output indexable type with the same rank and element type as the input indexable type but ensures that the output indexable type may not be written. The read-only communication operator ensures that any attempt to write to the output indexable type will be detected as an error at compile time.Type: ApplicationFiled: November 19, 2010Publication date: May 24, 2012Applicant: MICROSOFT CORPORATIONInventors: Yosseff Levanoni, Paul F. Ringseth, Weirong Zhu, Lingli Zhang
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Patent number: 8161455Abstract: A method to concurrently execute multiple primitive commands in a command line interface (CLI) is provided. Each of a plurality of signal parameters is designated for each of a plurality of primitive commands. The plurality of primitive commands is encapsulated into a header CLI command. The CLI command is executed.Type: GrantFiled: January 31, 2008Date of Patent: April 17, 2012Assignee: International Business Machines CorporationInventors: Ezequiel Cervantes, Minghao M. Chu, Juan A. Coronado, Dinh Hai Le, Eric S. Shell, Clarisa Valencia
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Patent number: 8156471Abstract: A data processing representation is expressed in the form of code sections, which may be nested, using multiple programming languages. The representation is read by an execution engine. The execution engine identifies the language of each code section, and a corresponding language specific processing unit is invoked to process the code section. The processing unit reads that section, identifying sub-sections specified in it's associated language and other sub-sections specified in unknown languages. It executes the sub-sections specified in its associated language with the intended semantics and in the appropriate order. When a sub-section specified in an unknown language is encountered, it delegates processing of that sub-section back to the execution engine, which repeats this process for the unknown sub-section. The execution result is returned back to the requesting language specific processing unit, which continues processing from where it left off.Type: GrantFiled: November 9, 2001Date of Patent: April 10, 2012Assignee: Oracle International CorporationInventors: Adam Bosworth, David Bau, III, Kenneth Eric Vasilik
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Patent number: 8095933Abstract: Modeling grid projects is provided. A prediction of processor and network availability in a grid computing system are identified during a period of time. A grid project description model is generated utilizing a modeling language designed to describe phases of the grid project. The grid project description model is processed to determine an amount of processor and network resources needed for execution of the grid project. A graph is generated including a first curve representing the prediction of processor availability and a second curve representing the prediction of network availability. A simulation of execution of the grid project is generated based on the prediction of processor and network availability. A plot of utilization of processor and network resources required to complete execution of the grid project is added to the graph while keeping utilization of processor resources within the first curve and utilization of network resources within the second curve.Type: GrantFiled: June 10, 2008Date of Patent: January 10, 2012Assignee: International Business Machines CorporationInventors: Viktors Berstis, Ellen Kay Harper, Brian E. Leonard, Kyle Joseph Prestenback
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Patent number: 8037462Abstract: A method for providing parallel processing capabilities including: performing scalar and array privatization analysis via a compiler; checking whether an assignment statement is reducible; recognizing reduction patterns through a pattern matching algorithm; classifying a reduction type of each of the reduction patterns; and performing transformations and code generation for each reduction the reduction type of each of the reduction patterns.Type: GrantFiled: August 2, 2006Date of Patent: October 11, 2011Assignee: International Business Machines CorporationInventors: Roch G. Archambault, Yaoqing Gao, Zhixing Ren, Raul E. Silvera
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Patent number: 8028299Abstract: The present invention discloses a modified computer architecture (50, 71, 72) which enables an applications program (50) to be run simultaneously on a plurality of computers (M1, . . . Mn). Shared memory at each computer is updated with amendments and/or overwrites so that all memory read requests are satisfied locally. During initial program loading (75), or similar, instructions which result in memory being re-written or manipulated are identified (92). Additional instructions are inserted (103) to cause the equivalent memory locations at all computers to be updated. In particular, the finalization of JAVA language classes and objects is disclosed (162, 163) so finalization only occurs when the last class or object present on all machines is no longer required.Type: GrantFiled: October 25, 2005Date of Patent: September 27, 2011Assignee: Waratek Pty, Ltd.Inventor: John Matthew Holt
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Patent number: 7984422Abstract: Embodiments of systems, methods and computer program products are described for implementing repository relationship programming. Implementations described herein describe processes for implementing a union of concerns, integrating concerns, assembling concerns and separating concerns.Type: GrantFiled: September 30, 2005Date of Patent: July 19, 2011Inventor: Kevin P. Graham
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Patent number: 7979844Abstract: This invention teaches a way of implementing formally verified massively parallel programs, which run efficiently in distributed and shared-memory multi-core chips. It allows programs to be developed from an initial abstract statement of interactions among parallel software components, called cells, and progressively refine them to their final implementation. At each stage of refinement a formal description of patterns of events in computations is derived automatically from implementations. This formal description is used for two purposes: One is to prove correctness, timings, progress, mutual exclusion, and freedom from deadlocks/livelocks, etc. The second is to automatically incorporate into each application a Self-Monitoring System (SMS) that constantly monitors the application in parallel, with no interference with its timings, to identify and report errors in performance, pending errors, and patterns of critical behavior.Type: GrantFiled: May 5, 2009Date of Patent: July 12, 2011Assignee: EDSS, Inc.Inventor: Chitoor V. Srinivasan
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Patent number: 7912895Abstract: A system and method for managing service interactions launches a process that is defined by a programming abstraction based on a syntax of a general purpose programming language. Interaction with a service, such as a web-based service, is initiated and the process requests the service to perform an action. Execution of the process is suspended until a response is received from the service. Execution of the process continues after receiving a response from the service.Type: GrantFiled: October 31, 2007Date of Patent: March 22, 2011Assignee: Jade Acquisition CorporationInventors: Edwin Khodabakchian, Albert Chung Ming Tam, Weiqun Mi, Muruganantham Chinnananchi, Roman Dobrik
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Patent number: 7890929Abstract: A Toolbox and Instrument software design and runtime system which simulates real-world Tools by providing Instruments for the Tools' configuration, control, and state monitoring before, during, and after runtime. A Tool is a software function which may be used to modify an existing object or to create a new object. Tools with related functionality are grouped by their containment within appropriately named, static classes, or object references, their grouping which represents a Toolbox. Each Tool accepts one or more input (operand) objects to be changed or zero operands if a new object will be created, and each Tool also a Configuration Instrument, a State monitoring instrument, and optional Control Instrument. Alternatively, the Control and State Instrument's functionality can be consolidated into a single Instrument, or the Control and Configuration Instrument's functionality can be consolidated into a single Instrument.Type: GrantFiled: July 25, 2006Date of Patent: February 15, 2011Inventor: Kenneth Raymond Johanson
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Patent number: 7865911Abstract: Hybrid programming combines certain aspects of the synchronous calling nature of a thread-oriented programming model with certain aspects of the asynchronous calling nature of an event-oriented programming model by creating parallelized calls. In a described implementation, multiple synchronous calls are transformed into multiple asynchronous calls and encapsulated within a barrier time period. A hybrid programming model or protocol may be employed, for example, in conjunction with communication exchanges in a multiple-phase and multiple-party distributed programming environment.Type: GrantFiled: November 8, 2005Date of Patent: January 4, 2011Assignee: Microsoft CorporationInventors: Shiding Lin, Zhenyu Guo, Zheng Zhang
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Patent number: 7856625Abstract: A program conversion device for converting a program source is provided. The program conversion device comprises: a section and index acquisition device for acquiring a section code for indicating a section embedded in the program and performance index information embedded in the program in association with the section code; a task code conversion device for separating the acquired section code into task codes and adding a code to indicate the beginning of the task and a code to indicate the end of the task; and a task index attachment device for attaching a performance index, to input to the scheduler, to the task.Type: GrantFiled: October 21, 2005Date of Patent: December 21, 2010Assignee: Panasonic CorporationInventor: Kunihiko Hayashi
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Publication number: 20100318963Abstract: A hypergraph implementation system is described. The hypergraph implementation system provides for a hypergraph template library that contains many hypergraphs and many bulk data areas. The hypergraphs allow a developer to program an application such that the pointers to files are contained in the memory cache. The hypergraphs consist of hyperedges and vertices residing in tables of indices that point into each other in a flat organization. Bulk data is hung directly off hyperedges and vertices via a set of features. Thus, all the relationships among objects are contained within the hypergraphs and all the bulk data such as audio, large tables, geometry and images are directly tied to hyperedges or vertices with one link.Type: ApplicationFiled: June 15, 2009Publication date: December 16, 2010Applicant: Microsoft CorporationInventor: James T. Kajiya
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Publication number: 20100306741Abstract: A method, computer system and computer program for optimizing the processing of a character string during execution of the program by using characteristic information that indicates a characteristic of the character string and is associated with the character string. The method includes the steps of determining, on the basis of a characteristic of a first character string and operation for the first character string, a characteristic information of at least one of the first character string and a second character string obtained as a result of the operation, and associating the characteristic information with the at least one character string.Type: ApplicationFiled: May 26, 2010Publication date: December 2, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kazuaki Ishizaki, Kiyokuni Kawachiya, Kazunori Ogata
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Patent number: 7844946Abstract: Methods and an apparatus for forming a transaction object instruction construct are provided. An example method translates a source instruction construct to form a transactional objective instruction construct, executes the transactional objective instruction construct, intercepts an aborted transaction associated with the transactional objective instruction construct during execution, maintains a graph of nodes and edges associated with the executed transactional objective instruction construct to predict a deadlock situation, and resolves the deadlock situation associated with the transactional objective instruction construct based on the graph.Type: GrantFiled: September 26, 2006Date of Patent: November 30, 2010Assignee: Intel CorporationInventors: Youfeng Wu, Cheng Wang
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Publication number: 20100281464Abstract: Techniques for using one or more aspect-oriented parallelism primitives to implement one or more aspects of a program in parallel are provided. The techniques include using one or more aspect-oriented parallelism primitives to implement one or more aspects of a program in parallel, wherein implementing the one or more aspects of a program in parallel comprises implementing the one or more aspects of a program in parallel on a multi-core processor.Type: ApplicationFiled: April 30, 2009Publication date: November 4, 2010Applicant: International Business Machines CorporationInventor: Sriram Vajapeyam
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Patent number: 7818726Abstract: The adaptation of at least a portion of an object provided by a previous script component to a subsequent script component, despite the subsequent component being incapable of recognizing a format of the at least a portion of the object as provided by the previous component. The previous component generates an object having a property. Adaptation script identifies adaptation(s) to perform on the property prior to being used by the subsequent component. The adaptation is performed, and the adapted property is then used by the subsequent component.Type: GrantFiled: January 25, 2006Date of Patent: October 19, 2010Assignee: Microsoft CorporationInventors: Jeffrey P. Snover, Bruce Gordon Payette, Jeffrey Dick Jones, Kenneth M. Hansen
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Patent number: 7814462Abstract: In one embodiment, a process may be performed in parallel on a parallel server by defining a data type that may be used to reference data stored on the parallel server and overloading a previously-defined operation, such that when the overloaded operation is called, a command is sent to the parallel server to manipulate the data stored on the parallel server. In some embodiments, the previously-defined operation that is overloaded may be an operation of an operating system. Further, in some embodiments, when the data stored on the parallel server is no longer needed, a command may be sent to the parallel server to reallocate the memory used to store the data.Type: GrantFiled: August 31, 2005Date of Patent: October 12, 2010Assignees: Massachusetts Institute of Technology, The Regents of the University of CaliforniaInventors: Parry Jones Reginald Husbands, Long Yin Choy, Alan Edelman, Eckart Jansen, Viral B. Shah
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Patent number: 7810084Abstract: Computer-implemented methods, computer systems and computer program products are provided for parallel processing a plurality of data objects with a plurality of processors. As disclosed herein, the data objects to be assembled for further processing may be in bundles, the bundles obeying first predefined criteria, which is dynamically controlled by using a bundle specific master table. The methods and systems may generate pipelines of data objects by pre-selecting and grouping the data objects according to second predefined criteria by a first group of the plurality of processors, and create the bundles from each pipeline of the pre-selected data objects by a second group of the plurality of processors.Type: GrantFiled: June 1, 2006Date of Patent: October 5, 2010Assignee: SAP AGInventor: Karsten S. Egetoft
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Patent number: 7802231Abstract: An embodiment of the present invention is a technique for translating a business rule. An operation for a rule to authorize a provision of information is created. A current container is established. A propositional expression in the rule describing the provision of the information is processed. If the current container is null, a context for the propositional expression is recorded as null, else an object type in the current container is recorded as a resulting context from the propositional expression.Type: GrantFiled: April 30, 2004Date of Patent: September 21, 2010Assignee: Microsoft CorporationInventors: Donald Edward Baisley, Ravi Anthony Joseph Dirckze, Jonathan Virgil Ziebell, Russel Elliot Cole
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Patent number: 7797329Abstract: A method for committing memory transactions in an application that includes executing a plurality of sections of the application in parallel, logging a plurality of memory transactions that occur while executing the plurality of sections to obtain a plurality of logs and a plurality of temporary results, wherein the plurality of memory transactions that includes a plurality of writes to at least one memory location, comparing the plurality of logs to identify an optimal list of writes from the plurality of writes, and committing memory transactions corresponding to a subset of the plurality of temporary results, wherein the subset of the plurality of temporary results is identified by the optimal list of writes.Type: GrantFiled: June 9, 2006Date of Patent: September 14, 2010Assignee: Oracle America Inc.Inventors: Miguel Angel Lujan Moreno, Phyllis E. Gustafson, Michael H. Paleczny, Christopher A. Vick, Jay R. Freeman, Olaf Manczak
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Patent number: 7774750Abstract: The common concurrency runtime (CCR) provides a simple and self-consistent set of concurrency primitives that developers can use to more readily split their computation into more discrete chunks that can scale better with additional processors. This set of primitives provides for very scalable applications that are well suited for the coming world of ubiquitous communication and very large scale out for the number of local processors. The CCR may be implemented as a single library in C# that implements channels with input and asynchronous output capabilities, along with an atomic test-and-input primitive. On top of this, richer derived operators (e.g., choice, join, replication, reader-writers, scatter-gather, etc.) may be encoded. Thus, existing C# may be built upon to provide the capability to concurrently issue I/O requests to remote systems while simultaneously performing other functions locally to increase the efficiency of the distributed system.Type: GrantFiled: July 19, 2005Date of Patent: August 10, 2010Assignee: Microsoft CorporationInventor: Georgios Chrysanthakopoulos
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Patent number: 7739530Abstract: Provided is a method of reliably reducing power consumption of a computer, while promoting prompt compilation of a source code and execution of an output code. The method according to this invention includes the steps of: reading a code which is preset and analyzing an amount of operation of the CPU and an access amount with respect to the cache memory based on the code; obtaining an execution rate of the CPU and an access rate with respect to the cache memory based on the amount of operation and the access amount; determining an area in which the access rate with respect to the cache memory is higher than the execution rate of the CPU, based on the code; adding a code for enabling the power consumption reduction function to the area; and generating an execution code executable on the computer, based on the code.Type: GrantFiled: February 16, 2007Date of Patent: June 15, 2010Assignee: Hitachi, Ltd.Inventors: Koichi Takayama, Naonobu Sukegawa
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Patent number: 7712090Abstract: Methods and apparatus, including computer program products, for generating an executable program, including receiving serial compile commands in a pseudo-compiler to compile source code modules, scheduling the serial compiler commands in parallel compilers to compile the source code modules, compiling the source code modules in the parallel compliers to generate object code modules, sending compiler completion acknowledgements to a synchronizer and linking the object code modules in linkers in response to linker initiation commands from the synchronizer.Type: GrantFiled: February 7, 2003Date of Patent: May 4, 2010Assignee: SAP AktiengesellschaftInventor: Thomas Stuefe
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Patent number: 7712080Abstract: The present invention relates generally to computer programming, and more particularly to systems and methods for parallel distributed programming. Generally, a parallel distributed program is configured to operate across multiple processors and multiple memories. In one aspect of the invention, a parallel distributed program includes a distributed shared variable located across the multiple memories and distributed programs capable of operating across multiple processors.Type: GrantFiled: May 21, 2004Date of Patent: May 4, 2010Assignee: The Regents of the University of CaliforniaInventors: Lei Pan, Lubomir R. Bic, Michael B. Dillencourt
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Patent number: 7698272Abstract: An apparatus, system, and method for determining the maximum supported degree of parallel sort operations in a multi-processor computing environment. An allocation module allocates a minimum number of sort files to a sort operation for each data source that participates in the parallel sort. The allocation module attempts to allocate sort files of one-half the sort operation data source file size, and iteratively reduces the sort file size requests in response to determinations that sort files of the requested size are not available. After allocation, a parallel operation module determines whether there is sufficient virtual storage to execute the sort operations in parallel. If there is not, the parallel operations module collapses the two smallest sort operations, thereby reducing the degree of parallelism by one, and repeats the request. The parallel operation module repeats the process until the sorts are executed or the process fails for lack of virtual storage.Type: GrantFiled: August 30, 2007Date of Patent: April 13, 2010Assignee: International Business Machines CorporationInventors: David R. Betten, John M. Garth, Christian Michel, Bryan F. Smith, Timm Zimmermann
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Patent number: 7673295Abstract: Compile-time non-concurrency analysis of parallel programs improves execution efficiency by detecting possible data race conditions within program barriers. Subroutines are modeled with control flow graphs and region trees having plural nodes related by edges that represent the hierarchical loop structure and construct relationship of statements. Phase partitioning of the control flow graph allows analysis of statement relationships with programming semantics, such as those of the OpenMP language, that define permitted operations and execution orders.Type: GrantFiled: April 27, 2004Date of Patent: March 2, 2010Assignee: Sun Microsystems, Inc.Inventor: Yuan Lin
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Patent number: 7640535Abstract: A method for using available server threads to process resources and reduce the overall time of performing XA interactions in two-phase commit protocol implemented by the transaction manager. A TM processing XA interactions dispatches interaction commands for multiple resources to a thread manager, which dispatches the commands to idle server threads. In one embodiment, the TM attempts to dispatch all but one of the interaction commands to separate threads. The primary thread then processes the remaining resource command. Any commands relating to dispatch requests that were unable to be dispatched to separate threads due to unavailability are processed by the primary thread. Once the primary server has processed its interaction commands and received a signal indicating the threads receiving dispatch requests have completed their respective processing of dispatched commands, the next group of commands is processed in a similar manner.Type: GrantFiled: January 22, 2004Date of Patent: December 29, 2009Assignee: BEA Systems, Inc.Inventors: Alexander J. Somogyi, Adam Messinger, Anno R. Langen
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Patent number: 7555745Abstract: A translator apparatus for analyzing a parallel language program and converting the parallel language program into a sequential language program that is subject to a distributed processing by a plurality of processors includes a parameter generating unit that generates a setting code for setting a value in a distribution parameter; and an index localizing unit that generates a localizing code for localizing a loop index and an array index based on the distribution parameter of which the value is set by the setting code generated.Type: GrantFiled: November 18, 2004Date of Patent: June 30, 2009Assignee: Fujitsu LimitedInventor: Hidetoshi Iwashita
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Publication number: 20090125883Abstract: Methods, apparatus, and products are disclosed for node selection for executing a Java application among a plurality of nodes connected together for data communications using a data communication network, the plurality of nodes also connected to a service node, that include: tracking, by the service node, loaded Java classes currently loaded on each of the plurality of nodes; receiving, in the service node, an instruction to execute a Java application using the plurality of nodes; identifying, by the service node, Java classes utilized in executing the Java application; selecting, by the service node, one of the plurality of nodes for executing the Java application in dependence upon the loaded Java classes and the Java classes utilized in executing the Java application; and configuring, by the service node, the Java application for execution on the selected node.Type: ApplicationFiled: November 9, 2007Publication date: May 14, 2009Inventors: Eric L. Barsness, David L. Darrington, Amanda Peters, John M. Santosuosso
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Patent number: 7516446Abstract: A method of detecting a datarace between first and second memory accesses within a program, including: determining whether the first and second memory accesses are to the same memory location; determining whether the first and second memory accesses are executed by different threads in the program; determining whether the first and second memory accesses are guarded by a common synchronization object; and determining whether there is an execution ordering enforced between the first and second memory accesses.Type: GrantFiled: June 25, 2002Date of Patent: April 7, 2009Assignee: International Business Machines CorporationInventors: Jong-Deok Choi, Keunwoo Lee, Robert W. O'Callahan, Vivek Sarkar, Manu Sridharan