In A Logic Circuit Patents (Class 977/940)
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Patent number: 7635856Abstract: A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the carbon-nanotube, respectively, and a gate formed substantially over a portion of the carbon-nanotube, separated from the carbon-nanotube by a dielectric film.Type: GrantFiled: August 7, 2007Date of Patent: December 22, 2009Assignee: International Business Machines CorporationInventors: Joerg Appenzeller, Phaedon Avouris, Kevin K. Chan, Philip G. Collins, Richard Martel, Hon-Sum Philip Wong
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Publication number: 20090271971Abstract: Nanotube-based switching elements and logic circuits. Under one embodiment of the invention, a switching element includes an input node, an output node, a nanotube channel element having at least one electrically conductive nanotube, and a control electrode. The control electrode is disposed in relation to the nanotube channel element to controllably form an electrically conductive channel between the input node and the output node. The channel at least includes said nanotube channel element. The output node is constructed and arranged so that channel formation is substantially unaffected by the electrical state of the output node. Under another embodiment of the invention, the control electrode is arranged in relation to the nanotube channel element to form said conductive channel by causing electromechanical deflection of said nanotube channel element.Type: ApplicationFiled: June 2, 2009Publication date: November 5, 2009Applicant: Nantero, Inc.Inventors: Claude L. BERTIN, Thomas RUECKES, Brent M. SEGAL
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Patent number: 7609086Abstract: A control circuit includes a crossbar array having input columns and output rows configured to store first stored data in the form of high or low resistance states. The input columns are connected to a common electrical input and the output rows are connected to a common summing circuit. The crossbar control circuit may be implemented in a control system to provide for adjustment of the control system to changes in environmental conditions.Type: GrantFiled: October 30, 2007Date of Patent: October 27, 2009Inventor: Blaise Laurent Mouttet
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Publication number: 20090256594Abstract: A digital inverter formed by three carbon nanotubes (CNTs) extending vertically from a substrate, one CNT functioning as first source (S1) and having a first logic signal applied to it, another CNT functioning as second source (S2) and having a second logic signal applied to it, a third CNT functioning as gate (G), and disposed between the two sources (S1, S2). A drain (D) contact is associated with the gate (G). A logic signal applied to the gate (G) causes one or the other of the sources (S1, S2) to deflect, contacting the drain (D) and transferring its logic signal thereto—such as logic “0” on the gate resulting in logic “1” (from one of the sources) being transferred to the drain (D), and logic “1” on the gate resulting in logic “0” (from the other of the sources) being transferred to the drain (D).Type: ApplicationFiled: April 9, 2008Publication date: October 15, 2009Applicant: International Business Machines CorporationInventor: Huilong Zhu
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Patent number: 7602069Abstract: A micro electronic component, preferably in the form of an electronic memory, includes the use of clusters as an electronic memory. Also disclosed as part of the present invention is a method for fabricating a micro electronic component. The present invention contemplates fabrication of an especially compact electronic memory that works especially with single-electron transistors or single-electronic transfers. According to the present invention, clusters with a metallic cluster nucleus are arranged in parallel grooves essentially in lines or rows and are connected individually to first and second connecting electrodes, such that individually the clusters can be electrically modified or polled independently of each other.Type: GrantFiled: July 25, 2006Date of Patent: October 13, 2009Assignee: Universität Duisburg-EssenInventors: Günter Schmid, Ulrich Simon, Dieter Jäger, Venugopal Santhanam, Torsten Reuter
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Patent number: 7583438Abstract: A quantum circuit and a quantum computer are capable of performing multi-bit quantum computation. In the quantum circuit, a quantum bit is represented by polarization directions of light, a sequence of polarized light pulses representing a quantum bit string is sequentially supplied to the quantum circuit, and an amount of polarization rotation and phase difference applied to a certain light pulse are determined on the basis of a result of a polarization measurement of a preceding input light pulse sequence, thus realizing a controlled-unitary transform. In addition, regarding the light pulses representing the quantum bits, the number of photons included in one pulse is larger than 1, resulting in a reduction of the influence of error.Type: GrantFiled: October 2, 2002Date of Patent: September 1, 2009Assignees: Japan Science and Technology AgencyInventor: Akihisa Tomita
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Patent number: 7566436Abstract: A mixing reactor for mixing efficiently streams of fluids of differing densities. In a preferred embodiment, one of the fluids is supercritical water, and the other is an aqueous salt solution. Thus, the reactor enables the production of metal oxide nanoparticles as a continuous process, without any risk of the reactor blocking due to the inefficient mixing inherent in existing reactor designs.Type: GrantFiled: February 11, 2005Date of Patent: July 28, 2009Assignee: The University of NottinghamInventors: Edward Henry Lester, Barry James Azzopardi
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Patent number: 7566945Abstract: Nano semiconductor switch devices are provided that include a semiconductor substrate and a conductive layer on the semiconductor substrate. A first insulating layer is provided on the conductive layer and the semiconductor substrate. The first insulating layer defines a contact hole that exposes at least a portion of the conductive layer. Carbon nano tubes are provided on the exposed portion of the conductive layer in the contact hole. The carbon nano tubes are in a vertical direction with respect to the semiconductor substrate. Related methods of fabrication are also provided herein.Type: GrantFiled: May 4, 2006Date of Patent: July 28, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Young-moon Choi, Sun-woo Lee
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Publication number: 20090174435Abstract: The invention discloses new and advantageous uses for carbon/graphene nanoribbons (GNRs), which includes, but is not limited to, electronic components for integrated circuits such as NOT gates, OR gates, AND gates, nano-capacitors, and other transistors. More specifically, the manipulation of the shapes, sizes, patterns, and edges, including doping profiles, of GNRs to optimize their use in various electronic devices is disclosed.Type: ApplicationFiled: October 1, 2008Publication date: July 9, 2009Applicant: University of VirginiaInventors: Mircea R. Stan, Avik Ghosh
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Patent number: 7541842Abstract: Nanotube-based switching elements and logic circuits. Under one embodiment of the invention, a switching element includes an input node, an output node, a nanotube channel element having at least one electrically conductive nanotube, and a control electrode. The control electrode is disposed in relation to the nanotube channel element to controllably form an electrically conductive channel between the input node and the output node. The channel at least includes said nanotube channel element. The output node is constructed and arranged so that channel formation is substantially unaffected by the electrical state of the output node. Under another embodiment of the invention, the control electrode is arranged in relation to the nanotube channel element to form said conductive channel by causing electromechanical deflection of said nanotube channel element.Type: GrantFiled: November 21, 2006Date of Patent: June 2, 2009Assignee: Nantero, Inc.Inventors: Claude L. Bertin, Thomas Rueckes, Brent M. Segal
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Patent number: 7542334Abstract: A nanotube-based switching element includes an input node, an output node, and a nanotube channel element having at least one electrically conductive nanotube. A control structure is disposed in relation to the nanotube channel element to controllably form and unform an electrically conductive channel between said input node and said output node. The output node is constructed and arranged so that channel formation is substantially unaffected by the electrical state of the output node. The control structure includes a control electrode and a release electrode, disposed on opposite sides of the nanotube channel element. The control and release may be used to form a differential input, or if the device is constructed appropriately to operate the circuit in a non-volatile manner. The switching elements may be arranged into logic circuits and latches having differential inputs and/or non-volatile behavior.Type: GrantFiled: January 9, 2008Date of Patent: June 2, 2009Assignee: Nantero, Inc.Inventors: Claude L. Bertin, Thomas Rueckes, Brent M. Segal
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Patent number: 7530032Abstract: Various embodiments of the present invention are directed to nanowire crossbars that use configurable, tunneling resistor junctions to electronically implement logic gates. In one embodiment of the present invention, a nanowire crossbar comprises two or more layers of approximately parallel nanowires, and a number of configurable, tunneling resistor junctions that each interconnects a nanowire in a first layer of approximately parallel nanowires with a nanowire in a second layer of approximately parallel nanowires.Type: GrantFiled: October 28, 2005Date of Patent: May 5, 2009Assignee: Hewlett-Packard Development Company, L.P.Inventor: Gregory S. Snider
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Publication number: 20090091352Abstract: Nanotube-based switching elements with multiple controls and circuits made from such. A switching element includes an input node, an output node, and a nanotube channel element having at least one electrically conductive nanotube. A control structure is disposed in relation to the nanotube channel element to controllably form and unform an electrically conductive channel between said input node and said output node. The output node is constructed and arranged so that channel formation is substantially unaffected by the electrical state of the output node. The control structure includes a control electrode and a release electrode, disposed on opposite sides of the nanotube channel element. The control and release may be used to form a differential input, or if the device is constructed appropriately to operate the circuit in a non-volatile manner. The switching elements may be arranged into logic circuits and latches having differential inputs and/or non-volatile behavior.Type: ApplicationFiled: October 6, 2008Publication date: April 9, 2009Inventors: Claude L. Bertin, Thomas Rueckes, Brent M. Segal
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Patent number: 7508039Abstract: Carbon nanotube (CNT) based devices include an actuator/switch that includes one or more fixed CNTs and a moveable CNT that can be urged toward or into contact with a selected fixed CNT with a magnetic field produced by a current in a control conductor. The control conductor can be formed of one or more CNTs, and the fixed and moveable CNTs can be retained by a support, and motion of the moveable CNT limited by a cavity defined in the support. In other examples, CNT FETS are used to form CNT transmission gates that are arranged to define circuits configured as multiplexers or to realize logical functions, addition, multiplication, or other operations such as Galois field arithmetic.Type: GrantFiled: May 4, 2005Date of Patent: March 24, 2009Assignee: State of Oregon Acting By and Through The State Board of Higher Education On Behalf of Portland State UniversityInventor: Anas N. Al-Rabadi
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Patent number: 7492015Abstract: Disclosed is a CNT technology that overcomes the intrinsic ambipolar properties of CNTFETs. One embodiment of the invention provides either a stable p-type CNTFET or a stable n-type CNTFET. Another embodiment of the invention provides a complementary CNT device. In order to overcome the ambipolar properties of a CNTFET, source/drain gates are introduced below the CNT opposite the source/drain electrodes. These source/drain gates are used to apply either a positive or negative voltage to the ends of the CNT so as to configure the corresponding FET as either an n-type or p-type CNTFET, respectively. Two adjacent CNTFETs, configured such that one is an n-type CNTFET and the other is a p-type CNTFET, can be incorporated into a complementary CNT device. In order to independently adjust threshold voltage of an individual CNTFET, a back gate can also be introduced below the CNT and, particularly, below the channel region of the CNT opposite the front gate.Type: GrantFiled: November 10, 2005Date of Patent: February 17, 2009Assignee: International Business Machines CorporationInventors: Jia Chen, Edward J. Nowak
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Patent number: 7459933Abstract: A method including storing two-dimensional binary data in the form of high or low resistance states into a crossbar array with a programmable material layer and transforming the two-dimensional binary data into one-dimensional analog data via the crossbar array.Type: GrantFiled: April 26, 2007Date of Patent: December 2, 2008Inventor: Blaise Laurent Mouttet
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Publication number: 20080291946Abstract: Apparatus and methods of performing fast single-qubit quantum gates using ultrafast femtosecond frequency chirped laser pulses are disclosed. The use of chirped pulses removes the demanding restrictions of prior art approaches and allows for the construction of fast quantum gates that operate at speeds on the of order several picoseconds. The apparatus includes two synchronized lasers (pump and Stokes) used to manipulate a qubit wave function in a select manner. Each laser system generates a train of optical pulses. Pulse pickers choose pump and Stokes pulses, which propagate though respective pulse shapers that apply necessary time-dependent phases. To achieve complete overlap between the pulses in time domain, necessary adjustments can be made by using an additional time delay line, which can be located in any path or in both paths.Type: ApplicationFiled: May 21, 2008Publication date: November 27, 2008Inventor: Vladimir Malinovsky
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Publication number: 20080258773Abstract: A universal logic gate apparatus is disclosed, which include a plurality of self-assembling chains of nanoparticles having a plurality of resistive connections, wherein the plurality of self-assembling chains of nanoparticles comprise resistive connects utilized to create A plasticity mechanism is also provided, which is based on a plasticity rule for creating stable connections from the plurality of self-assembling chains of nanoparticles for use with the universal, reconfigurable logic gate. The plasticity mechanism can be based, for example, on a 2-dimensional binary input data stream, depending upon design considerations. A circuit is also associated with the plurality of self-assembling chains of nanoparticles, wherein the circuit provides a logic bypass that implements a flip-cycle for second-level logic. Additionally, an extractor logic gate is associated with the plurality of self-assembling chains of nanoparticles, wherein the extractor logic gate provides logic functionalities.Type: ApplicationFiled: June 22, 2008Publication date: October 23, 2008Inventor: Alex Nugent
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Publication number: 20080231320Abstract: Nanotube-based logic circuitry is disclosed. Tri-stating elements add an enable/disable function to the circuitry. The tri-stating elements may be provided by nanotube-based switching devices. In the disabled state, the outputs present a high impedance, i.e., are tri-stated, which state allows interconnection to a common bus or other shared communication lines. In embodiments wherein the components are non-volatile, the inverter state and the control state are maintained in the absence of power. Such an inverter may be used in conjunction with and in the absence of diodes, resistors and transistors or as part of or as a replacement to CMOS, biCMOS, bipolar and other transistor level technologies.Type: ApplicationFiled: October 30, 2007Publication date: September 25, 2008Applicant: NANTERO, INC.Inventor: Claude L. BERTIN
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Patent number: 7420396Abstract: A universal logic gate apparatus is disclosed, which include a plurality of self-assembling chains of nanoparticles having a plurality of resistive connections, wherein the plurality of self-assembling chains of nanoparticles comprise resistive connects utilized to create a universal, reconfigurable logic gate A plasticity mechanism is also provided, which is based on a plasticity rule for creating stable connections from the plurality of self-assembling chains of nanoparticles for use with the universal, reconfigurable logic gate. The plasticity mechanism can be based, for example, on a 2-dimensional binary input data stream, depending upon design considerations. A circuit is also associated with the plurality of self-assembling chains of nanoparticles, wherein the circuit provides a logic bypass that implements a flip-cycle for second-level logic.Type: GrantFiled: June 8, 2006Date of Patent: September 2, 2008Assignee: Knowmtech, LLCInventor: Alex Nugent
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Publication number: 20080197881Abstract: Receiver circuits using nanotube based switches and logic. Preferably, the circuits are dual-rail (differential). A receiver circuit includes a differential input having a first and second input link, and a differential output having a first and second output link. First, second, third and fourth switching elements each have an input node, an output node, a nanotube channel element, and a control structure disposed in relation to the nanotube channel element to controllably form and unform an electrically conductive channel between said input node and said output node. The receiver circuit can sense small voltage inputs and convert them to larger voltage swings.Type: ApplicationFiled: February 12, 2008Publication date: August 21, 2008Inventor: Claude L. BERTIN
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Patent number: 7414437Abstract: An electromechanical switching device employs a first nanoscale pillar shuttling charge between opposed charged electrodes. Motion of the first pillar is coupled to a second set of pillars providing controlled charge transfer between a second isolated set of electrodes. Standard logic elements may be constructed using this switching device.Type: GrantFiled: May 16, 2007Date of Patent: August 19, 2008Assignee: Wisconsin Alumni Research FoundationInventors: Robert H. Blick, Robert A. Marsland
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Publication number: 20080191742Abstract: Receiver circuits using nanotube-based switches and transistors. A receiver circuit includes a differential input having a first and second input link, a differential output having a first and second output link, and first and second switching elements in electrical communication with the input links and the output links. Each switching element has an input node, an output node, a nanotube channel element, and a control structure disposed in relation to the nanotube channel element to controllably form and unform an electrically conductive channel between said input node and said output node. First and second MOS transistors are each in electrical communication with a reference signal and with the output node of a corresponding one of the first and second switching elements.Type: ApplicationFiled: February 11, 2008Publication date: August 14, 2008Inventor: CLAUDE L. BERTIN
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Patent number: 7408184Abstract: A functional molecular element whose functions can be controlled by an electric field based on a new principle. A Lewis base molecule (14) with positive permittivity anisotropy or a dipole moment in the major axis direction of the molecule is disposed, via a metal ion (3) that can act as a Lewis acid, in a pendant-like form on a key molecule (2) in the form of a line or film that has a conjugated system and exhibits conductivity, thereby forming a functional molecular element 1 that can realize a function where the conformation changes due to the application of an electric field. The conductive key molecule (2) and the Lewis base molecule (14) form a complex with the metal ion (3). When an electric field is applied in a direction perpendicular to the plane of the paper in FIG. 1(b), for example, the Lewis base molecule (14) performs a 90° “neck twisting” movement with the up-down direction in the drawing as the axis.Type: GrantFiled: December 25, 2003Date of Patent: August 5, 2008Assignee: Sony CorporationInventors: Eriko Matsui, Oliver Harnack, Nobuyuki Matsuzawa, Akio Yasuda
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Patent number: 7405420Abstract: Chalcogenide-based nanowire memories are implemented using a variety of methods and devices. According to an example embodiment of the present invention, a method of manufacturing a memory circuit is implemented. The method includes depositing nanoparticles at locations on a substrate. Chalcogenide-based nanowires are created at the locations on the substrate using a vapor-liquid-solid technique. Insulating material is deposited between the chalcogenide-based nanowires. Lines are created to connect at least some of the chalcogenide-based nanowires.Type: GrantFiled: September 29, 2006Date of Patent: July 29, 2008Assignee: The Board of Trustees of the Leland Stanford Junior UniversityInventors: H. S. Philip Wong, Stefan Meister, SangBum Kim, Hailin Peng, Yuan Zhang, Yi Cui
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Publication number: 20080100345Abstract: Various method and system embodiments of the present invention are directed to implementing serial logic gates using nanowire-crossbar arrays with spintronic devices located at nanowire-crossbar junctions. In one embodiment of the present invention, a nanowire-crossbar array comprises a first nanowire and a number of substantially parallel control nanowires positioned so that each control nanowire overlaps the first nanowire. The nanowire-crossbar array includes a number of spintronic devices. Each spintronic device is configured to connect one of the control nanowires to the first nanowire and operate as a latch for controlling signal transmissions between the control nanowire and the first nanowire.Type: ApplicationFiled: October 31, 2006Publication date: May 1, 2008Inventors: Alexandre M. Bratkovski, Wei Wu, Gregory S. Snider, R. Stanley Williams
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Patent number: 7342413Abstract: A device including a nanowire crossbar array including a programmable material layer, at least one of input or output circuitry, and at least one array of input or output tips to provide an electrical connection between the nanowire crossbar array and the input or output circuitry.Type: GrantFiled: April 26, 2007Date of Patent: March 11, 2008Inventor: Blaise Laurent Mouttet
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Patent number: 7339401Abstract: Nanotube-based switching elements with multiple controls and circuits made from such. A switching element includes an input node, an output node, and a nanotube channel element having at least one electrically conductive nanotube. A control structure is disposed in relation to the nanotube channel element to controllably form and unform an electrically conductive channel between said input node and said output node. The output node is constructed and arranged so that channel formation is substantially unaffected by the electrical state of the output node. The control structure includes a control electrode and a release electrode, disposed on opposite sides of the nanotube channel element. The control and release may be used to form a differential input, or if the device is constructed appropriately to operate the circuit in a non-volatile manner. The switching elements may be arranged into logic circuits and latches having differential inputs and/or non-volatile behavior depending on the construction.Type: GrantFiled: August 4, 2005Date of Patent: March 4, 2008Assignee: Nantero, Inc.Inventors: Claude L. Bertin, Thomas Rueckes, Brent M. Segal
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Patent number: 7335579Abstract: A memory device including a substrate, and multiple self-aligned nano-rectifying elements disposed over the substrate. Each nano-rectifying element has multiple first electrode lines, and multiple device structures disposed on the multiple first electrode lines forming the multiple self-aligned nano-rectifying elements. Each device structure has at least one lateral dimension less than about 75 nanometers. The memory device also includes multiple switching elements disposed over the device structures and self-aligned in at least one direction with the device structures. In addition, the memory device includes multiple second electrode lines disposed over, electrically coupled to, and self-aligned to the switching elements, whereby a memory device is formed.Type: GrantFiled: January 12, 2006Date of Patent: February 26, 2008Assignee: Hewlett-Packard Development Company, L.P.Inventors: James Stasiak, Kevin F Peters, Jennifer Wu, Pavel Kornilovich, Yong Chen
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Patent number: 7330709Abstract: Receiver circuits using nanotube based switches and logic. Preferably, the circuits are dual-rail (differential). A receiver circuit includes a differential input having a first and second input link, and a differential output having a first and second output link. First, second, third and fourth switching elements each have an input node, an output node, a nanotube channel element, and a control structure disposed in relation to the nanotube channel element to controllably form and unform an electrically conductive channel between said input node and said output node. The receiver circuit can sense small voltage inputs and convert them to larger voltage swings.Type: GrantFiled: January 10, 2005Date of Patent: February 12, 2008Assignee: Nantero, Inc.Inventor: Claude L. Bertin
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Patent number: 7292498Abstract: Embodiments of the present invention are related to nanoscale multiplexers and demultiplexers that employ randomly fabricated interconnections between nanowire signal lines and microscale or sub-microscale address lines. A greater number of address lines than a minimal number of address lines needed for unique addressing in a deterministic, non-randomly fabricated multiplexer or demultiplexer are used. The number of address lines in excess of the minimal number of address lines needed for unique addressing in a deterministic multiplexer or demultiplexer are referred to as supplemental address lines.Type: GrantFiled: May 6, 2005Date of Patent: November 6, 2007Assignee: Hewlett-Packard Development Company, L.P.Inventor: Gregory S. Snider
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Patent number: 7288961Abstract: Nanotube-based logic circuitry is disclosed. Tri-stating elements add an enable/disable function to the circuitry. The tri-stating elements may be provided by nanotube-based switching devices. In the disabled state, the outputs present a high impedance, i.e., are tri-stated, which state allows interconnection to a common bus or other shared communication lines. In embodiments wherein the components are non-volatile, the inverter state and the control state are maintained in the absence of power. Such an inverter may be used in conjunction with and in the absence of diodes, resistors and transistors or as part of or as a replacement to CMOS, biCMOS, bipolar and other transistor level technologies.Type: GrantFiled: January 22, 2007Date of Patent: October 30, 2007Assignee: Nantero, Inc.Inventor: Claude L. Bertin
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Patent number: 7288970Abstract: Hybrid switching devices integrate nanotube switching elements with field effect devices, such as NFETs and PFETs. A switching device forms and unforms a conductive channel from the signal input to the output subject to the relative state of the control input. In embodiments of the invention, the conductive channel includes a nanotube channel element and a field modulatable semiconductor channel element. The switching device may include a nanotube switching element and a field effect device electrically disposed in series. According to one aspect of the invention, an integrated switching device is a four-terminal device with a signal input terminal, a control input terminal, a second input terminal, and an output terminal. The devices may be non-volatile. The devices can form the basis for a hybrid NT-FET logic family and can be used to implement any Boolean logic circuit.Type: GrantFiled: January 10, 2005Date of Patent: October 30, 2007Assignee: Nantero, Inc.Inventor: Claude L. Bertin
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Patent number: 7279760Abstract: The present invention relates to a nanotube device (100, 600), comprising a nanotube with a longitudinal and a lateral extension, a structure for supporting at least a first part of the nanotube, and first means for exerting a force upon the nanotube in a first direction defined by its lateral extension. At least a second part of the nanotube protrudes beyond the support of said structure, so that when said force exceeds a certain level, the second part of the nanotube will flex in the direction of its lateral extension, and thereby close a first electrical circuit. Suitably, the first means for exerting said force upon the nanotube is an electrical means, the force being created by applying a voltage to the means.Type: GrantFiled: May 2, 2002Date of Patent: October 9, 2007Assignee: Chalmers Intellectual Property Rights ABInventors: Susanne Viefers, Tomas Nord, Jari Kinaret
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Patent number: 7254799Abstract: Various embodiments of the present invention provide methods for allocating nanowire junctions in a nanowire crossbar having one or more randomly distributed non-functional crossbar nanowire junctions. In certain embodiments, the method constructs a circuit graph based on the circuit and constructs a crossbar graph based on the nanowire crossbar. A search is then conducted, in the embodiments, in order to determine a monomorphism that respectively maps the nodes and edges of the circuit graph to a subset of nodes and a subset of edges of the crossbar graph. The subset of nodes and subset of edges of the crossbar graph can then be used to allocate nanowire junctions in the nanowire crossbar.Type: GrantFiled: January 31, 2005Date of Patent: August 7, 2007Assignee: Hewlett-Packard Development Company, L.P.Inventor: Gregory S. Snider
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Patent number: 7228518Abstract: Various embodiments of the present invention provide methods for designing multilayer nanowire crossbars that are functionally equivalent to two-layer nanowire-crossbar designs. Given a two-layer nanowire-crossbar design having two or more columns of microregions, in certain embodiments, the method conceptually folds the two-layer nanowire crossbar between columns of microregions. The folded nanowires, located in the conceptually folded, two-layer nanowire-crossbar design, are collapsed into shorter length nanowires to give a multilayer nanowire-crossbar design that includes the same number of nanowire junctions as in the two-layer nanowire-crossbar design.Type: GrantFiled: January 31, 2005Date of Patent: June 5, 2007Assignee: Hewlett-Packard Development Company, L.P.Inventor: Gregory S. Snider
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Patent number: 7187201Abstract: Pullup and pulldown structures can be formed using nanoscale programmable junctions. These devices can be integrated into nanoscale circuit designs and can be programmably configured, e.g., desired resistance values set. Additionally, the pullup and pulldown devices allow for convenient integration of nanoscale devices with microscale devices.Type: GrantFiled: June 24, 2004Date of Patent: March 6, 2007Assignee: Xilinx, Inc.Inventor: Stephen M. Trimberger
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Patent number: 7167026Abstract: Nanotube-based logic circuitry is disclosed. Tri-stating elements add an enable/disable function to the circuitry. The tri-stating elements may be provided by nanotube-based switching devices. In the disabled state, the outputs present a high impedance, i.e., are tri-stated, which state allows interconnection to a common bus or other shared communication lines. In embodiments wherein the components are non-volatile, the inverter state and the control state are maintained in the absence of power. Such an inverter may be used in conjunction with and in the absence of diodes, resistors and transistors or as part of or as a replacement to CMOS, biCMOS, bipolar and other transistor level technologies.Type: GrantFiled: January 10, 2005Date of Patent: January 23, 2007Assignee: Nantero, Inc.Inventor: Claude L. Bertin
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Patent number: 7138832Abstract: Nanotube-based switching elements and logic circuits. Under one embodiment of the invention, a switching element includes an input node, an output node, a nanotube channel element having at least one electrically conductive nanotube, and a control electrode. The control electrode is disposed in relation to the nanotube channel element to controllably form an electrically conductive channel between the input node and the output node. The channel at least includes said nanotube channel element. The output node is constructed and arranged so that channel formation is substantially unaffected by the electrical state of the output node. Under another embodiment of the invention, the control electrode is arranged in relation to the nanotube channel element to form said conductive channel by causing electromechanical deflection of said nanotube channel element.Type: GrantFiled: August 13, 2004Date of Patent: November 21, 2006Assignee: Nantero, Inc.Inventors: Claude L. Bertin, Thomas Rueckes, Brent M. Segal
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Patent number: 7117454Abstract: Various nanoscale logic gates are disclosed. An alternating current (“AC”) source is superimposed on a direct-current (“DC”), largely resistor-based nanoscale logic circuit in order to provide distinguishable, AC current or voltage logical output signals despite potentially narrow DC-voltage or DC-current ranges produced by the resistor-based nanoscale logic circuit. AC-enhanced AND, OR, NAND, and NOR nanoscale logic gates are provided as four specific embodiments of the present invention.Type: GrantFiled: October 23, 2003Date of Patent: October 3, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Richard A Baugh, Yong Chen