Abstract: This invention relates to a rotary valve device for controlling and distributing flow of a fluid medium directly in response to the rotary motion of a motor shaft. Fluid medium is continuously supplied to a cavitated disk through a manifold by a pump source where the cavitated disk rotates at the same rotational speed as the motor shaft. The cavitated disk has a first void region in continuous fluid communication with the pump source and alternately communicates with cylinder conduits to drive a piston. A second void region in the cavitated disk is so dimensioned and proportioned to permit fluid medium to be alternately exhausted from the cylinder and to be distributed to exhaust conduits and then to the atmosphere.

Abstract: A method of transforming a n-bit data packet to a m-bit data packet with a lookup table. The lookup table includes at least one entry data packet and at least one respective delta value associated with each entry data packet. The method includes the acts of receiving an input data packet having n-bits, indexing the lookup table with at least a portion of the input data packet to obtain one of the at least one entry data packet, and decompressing the obtained entry data packet with the at least one respective delta value associated with the obtained entry data packet, thereby resulting in an output data packet having m-bits. The decompressing act includes using a portion of the input data packet to determine the number of delta values called for decompressing the obtained entry data packet. The method can be used in, for example, an image processor.

Abstract: An aircraft emergency landing assist vehicle for assisting an aircraft during an emergency landing where one or more of the retractable wheels of the aircraft landing gear is damaged, has failed to extend, or is only partially extended from the aircraft wing or fuselage. During an emergency aircraft landing, the landing assist vehicle supports one of the wings or the fuselage of the aircraft proximate to the malfunctioning landing gear wheel.

Abstract: A Bingo-type game and method for playing which incorporates various exercises as part of the game. The Bingo-type game generally includes a plurality of matrices having different exercises listed in the squares thereof and call-off pieces each corresponding to one of the exercises listed in the squares. A matrix is given to each game participant. As a call-off card is drawn, the exercise listed on the call-off card is called out, whereby the corresponding exercise is covered, if present, on the matrix of each participant and the exercise is subsequently performed by each participant having the exercise listed on their matrix. The game is won when one of the participants marks each space in a horizontal row, a vertical column, or a diagonal line on the game board.

Abstract: A dual-hook locking assembly mounted in a casing subassembly is actuated from outside of the latter by a handle which causes a locking subassembly to operate between an unlocked and a locked position. By rotating the driving handle, a gearing subassembly including a pair of meshed segmental gears drives the locking subassembly between the aforementioned positions. The gearing subassembly and the locking subassembly are directly interconnected. An adjusting subassembly is used for positioning the locking subassembly with respect to a strike plate of a door. The adjusting subassembly comprises several guiding plates. The latter and the gearing subassembly have a common center of rotation.

Abstract: A multi-cell battery in which a plurality of electrochemical cells are disposed in a battery case. The battery case includes one or more partitions which divide the interior of the case into a plurality of cell compartments that house the electrochemical cells. The battery case includes at least one gas channel have a tortuous pathway designed to trap electrolyte which may escape from the cell compartments. A unique battery terminal may be molded into the battery case.

Abstract: A method of manufacturing a semiconductor device includes forming transistors including gate electrodes and source/drain regions over a substrate. A protective layer is placed over the source/drain regions and the gate electrodes. A portion of the protective layer is removed to expose a portion of the gate electrodes. The exposed portions of the gate electrodes are amorphized, and remaining portions of the protective layer located over the source/drain regions are removed. A stress memorization layer is formed over the gate electrodes, and the substrate is annealed in the presence of the stress memorization layer to at least reduce an amorphous content of the gate electrodes. The stress memorization layer is removed subsequent to the annealing.

Abstract: A support rail for a vehicle has an A-pillar portion and a roof rail portion. The roof rail and A-pillar are formed with a tubular body portion and longitudinally extending support flanges. The support flanges are formed by pinching the blank during the hydroforming process to provide a double thickness flange. A windshield support flange, roof support flange and door opening flange are formed to extend outwardly from the tubular body portion. Front and rear tube connectors include blind openings or notches to facilitate welding.

Abstract: The buried oxide region has a layer added which etches selectively with respect to oxide, allowing the contacts to a gate or to a back gate to be created without overetching into the buried oxide region.

Abstract: The invention relates to a combination hygienic device for holding sanitary wipes or toiletries and for dispensing a roll of toilet tissue paper. The device consists of a sanitary tray having a void region for receiving a sleeve member so dimensioned and proportioned to permit insertion of the sleeve into the void region. A cover is pivotally mounted to the sanitary tray for permitting access to a cavity contained in the sleeve member where the sanitary wipes or toiletries may be stored. A holder member is removably mounted to the bottom-wall of the sanitary tray for holding a roll of toilet tissue paper in telescopic and rotational relationship with the holder member to permit the dispensing of the toilet tissue paper.

Abstract: In a JTAG test and debug environment, the signal groups for boundary scans can have several lengths including signal groups that are longer that the shift register out. A storage unit is provided with a plurality of storage location lengths. The boundary scan signal groups are stored in a location having a suitable storage capacity. The command that transfers the boundary scan signal group includes a parameter identifying the relevant location. The scan control unit, upon receiving the command, transfers the entire boundary scan signal group as a result this command even if several transfers through the shift register out are required.

Abstract: In order to overcome the limitation of the integrated circuit chip inter-connectability resulting from the physical dimensions of the leads, a radio frequency transmitter and/or a radio frequency receiver are included in the integrated circuit chip. Logic signal groups from one integrated circuit chip can be encoded by the modulation on the radio frequency signal and received and decoded by a second integrated circuit chip. The transmitted signal groups can be transmitted in a series format or in a parallel format. Either amplitude or frequency modulation can be used to impose information on the carrier frequency.

Abstract: In a configuration testing integrated circuits, the system clock signals are forced to the same frequency as the test clock signals. When the test clock signals and the system clock signals have the same frequency, both clock signals can applied to the integrated circuit through a single terminal, whereby providing a terminal for the exchange of other signals with the integrated circuit. Using the same signals for test and system clocks allows selected components to be eliminated.

Abstract: A MOSFET device (100) in a mono-crystalline semiconductor material (101) of a first conductivity type, which comprises a source and a drain of the opposite conductivity type, each having regions of polycrystalline semiconductor (110, 120) and respective junctions (112a, 122a) in monocrystalline semiconductor. Localized buried insulator regions (113, 123) are below the polycrystalline source and drain regions, and a gate (130) between the source and drain regions is located so that the gate channel (134) is formed in bulk mono-crystalline semiconductor material. As an example, the semiconductor is silicon, the first conductivity type is p-type, and the localized buried insulator is silicon dioxide. The semiconductor material may also include silicon germanium.

Abstract: An improved data signal electromagnetic emissions system is provided for sending data signals over one or more data pathways. An original data signal is encoded into a set of sideband frequencies that exhibit a lower amplitude than the original data signal; then transmitted over the data pathway and later decoded back into a signal having the original data content. The encoding scheme uses a number of modulation pattern sets that each produce a set of sidebands about the data signal's fundamental and certain harmonic frequencies, in a manner that attempts to make the maximum amplitudes for each set of sidebands substantially equal to one another, although this is also dependent upon the data signal's frequency content.

Abstract: A method of making a mask design having optical proximity correction features is provided. The method can include obtaining a target pattern comprising a plurality of target pattern features corresponding to a plurality of features to be imaged on a substrate. The method can also comprise generating a mask design comprising mask features corresponding to the plurality of features to be imaged on the substrate and controlling the aspect ratio of at least one of the features of the plurality of features to be imaged on the substrate by positioning a sub-resolution assist feature proximate to the corresponding mask feature.

Abstract: Slim spacers are implemented in transistor fabrication. More particularly, wide sidewall spacers are initially formed and used to guide dopants into source/drain regions in a semiconductor substrate. The wide sidewall spacers are then removed and slim sidewall spacers are formed alongside a gate stack of the transistor. The slim spacers facilitate transferring stress from an overlying pre metal dielectric (PMD) liner to a channel of the transistor, and also facilitate reducing a resistance in the transistor by allowing silicide regions to be formed closer to the channel. This mitigates yield loss by facilitating predictable or otherwise desirable behavior of the transistor.

Abstract: Methods and a circuit for writing to an SRAM memory cell of an array are discussed that provide improved static noise margin, and minimal risk of data upsets during write operations. The write method first rapidly raises the wordline to a lower read voltage level for access, then after a time delay that allows the cells in the selected row to establish a stabilizing differential voltage on the associated bitlines, raises the wordline voltage to a boosted or higher write voltage level. An SRAM bitline enhancement circuit may also be utilized in association with the SRAM memory array and writing method, for enhancing the differential voltage produced by an SRAM memory cell of the array on associated first and second bitlines of the array of conventional SRAM cells (e.g., a conventional 6T differential cell). In one implementation, the SRAM bitline enhancement circuit comprises a half-latch or a sense amplifier connected to associated bitline pairs of the array for amplifying the differential voltage.

Abstract: A multi-processor system 8 includes multiple processing devices, including DSPs (10), processor units (MPUs) (21), co-processors (30) and DMA channels (31). Some of the devices may include internal MMUs (19, 32) which allows the device (10, 21, 30, 31) to work with a large virtual address space mapped to an external shared memory (20). The MMUs (19, 32) may perform the translation between a virtual address and the physical address associated with the external shared memory (20). Access to the shared memory (20) is controlled using a unified memory management system.