Abstract: The semiconductor image sensor element comprises a transistor gate potential well 102, a virtual potential well 100 adjacent the transistor gate potential well 102, a clear gate barrier 104 adjacent the virtual potential well 100, a clear drain 30 adjacent the clear gate barrier 104, and a charge sensor 28 for sensing charge levels in the transistor gate potential well 102. The charge levels are responsive to light incident on the device. Charge is stored in the virtual potential well 100 during charge integration. After charge integration, the charge is transferred into the transistor gate potential well 102 from the virtual potential well 100 for charge detection by the charge sensor 28. After charge detection, the charge is transferred from the transistor potential well 102 to the clear drain 30.

Abstract: Generally, and in one form of the invention, a method for multiplying charge in a CCD cell is disclosed comprising the step of causing impact ionization of charge carriers in the CCD cell.Other devices, systems and methods are also disclosed.

Abstract: The dynamic range of an image array photosite is improved by, first, turning on a column clamp transistor having a source coupled to a photosite transistor source and a drain coupled to a photosite transistor drain, wherein the column clamp transistor is turned on by a column clamp transistor gate voltage; then decreasing a current supplied to a column sense line below a quiescent value, wherein the column sense line is coupled to the photosite transistor source; then turning on the photosite transistor by a photosite transistor gate voltage; then turning off the photosite transistor and the column clamp transistor at substantially the same time; then increasing the current above the quiescent value; and then returning the current to the quiescent value.

Abstract: A bulk charge modulated MOSFET for sensing light comprising a semiconductor substrate with a gate region of a first conductivity type formed in the substrate. The gate region forms a potential well for carriers of the first conductivity type. The well is formed at a substantial depth from the surface of the gate region. The carriers are formed responsive to incident light. The gate region collects the carriers generated at depths less than the well. A source region of a second conductivity type is formed in the semiconductor substrate laterally adjacent the gate region. The source region is operable to sense a change in threshold voltage of the MOSFET responsive to the collection of carriers by the gate region. A drain region of the second conductivity type is formed in the layer adjacent the gate region and spaced from the source. The drain region is connected to a voltage source.

Abstract: A floating gate junction field-effect transistor image sensor element (10) is formed in a semiconductor layer (14). A drain region (20) of a first conductivity type of the elements (14) is formed adjacent a gate region (26). A potential barrier (98) is formed in the gate region (26) for collecting carriers (102) of the second conductivity type, the barrier (98) also acting as a probing current well. A capacitor (28, 32, 48) is coupled to the gate region (26) and is operable to deliver a pulse to gate region (26) for sweeping out the carriers (102) to the substrate (12). The difference in gate bias voltage caused by the absence of the collected carriers (102) is sensed at a sense node (116) coupled to a source region (30).

Abstract: A virtual phase image sensor has majority carriers supplied to a virtual gate 24 by a conductor 32 overlying the image sensor, the virtual gate 24 and the conductor 32 each in contact with a conductive channel stop region 30.

Abstract: A method and circuitry are provided for current input analog to digital conversion. A current input (14) is conducted through an input path. The current input is directed through a plurality of current paths (30a-d). A current through each current path (30a-d) is compared against an associated reference current (36a-d), and a respective output signal (34a-d) indicative thereof is output, such that the respective output signals (34a-d) are indicative of a magnitude of the current input (14).

Abstract: An infrared or x-ray imaging CCD array, including deep trench isolation (56) for capturing electron carriers formed deep in the substrate (46) as a result of long wavelength radiation or high energy particles. In virtual phase CCD circuits, the trench has formed on the sidewalls thereof a diffusion (58, 60) defining a vertical conductor for allowing hole carrier conduction between the substrate (46) and the virtual phase electrode (38).

Abstract: A semiconductor device and package includes a tape mounted semiconductor chip using bumped contacts, the top side of the chip is covered with a thin layer of ultra violet transmissive material, and a plastic removable frame surrounds the device and is removed after testing the device and prior to mounting the device on a printed circuit board.