Patents Represented by Attorney, Agent or Law Firm Alvin J. Riddles
  • Patent number: 6774463
    Abstract: In a Field Effect Transistor (FET) with a semiconductor channel the use of a high Tc oxide superconductor material in the gate electrode provides both control of parasitic resistance and capacitance and a proper work function when operated at a temperature below the Tc. The 1-2-3 compound oxide superconductors with the general formula Y1Ba2Cu3O7-y where y is approximately 0.1 have the ability in use in FET's to provide convenient work functions, low resistance and capacitance, and to withstand temperatures encountered in processing as the FET is being manufactured.
    Type: Grant
    Filed: February 24, 1992
    Date of Patent: August 10, 2004
    Assignee: International Business Machines Corporation
    Inventors: Praveen Chaudhari, Richard Joseph Gambino, Eti Ganin, Roger Hilsen Koch, Lia Krusin-Elbaum, Robert Benjamin Laibowitz, George Anthony Sai-Halasz, Yuan-Chen Sun, Matthew Robert Wordeman
  • Patent number: 6734363
    Abstract: The invention provides a wiring conductor for densely packed electronic apparatus, on which there is a supporting body of a material with randomly intertwined and fused filaments with spacing for being permeated by a coolant. The filamentary body material in addition may have imparted thereto the physical properties of interdependent density and permeability, noncorrosiveness and electrical conductivity.
    Type: Grant
    Filed: December 4, 1998
    Date of Patent: May 11, 2004
    Assignee: International Business Machines Corporation
    Inventors: Raymond Robert Horton, Ismail Cevdet Noyan, Michael Jon Palmer, William Edward Pence, IV
  • Patent number: 6657305
    Abstract: A metal plus low dielectric constant (low-k) interconnect structure is provided for a semiconductor device wherein adjacent regions in a surface separated by a dielectric have dimensions in width and spacing in the sub 250 nanometer range, and in which reduced lateral leakage current between adjacent metal lines, and a lower effective dielectric constant than a conventional structure, is achieved by the positioning of a differentiating or mask member that is applied for the protection of the dielectric in subsequent processing operations, at a position about 2-5 nanometers below a, to be planarized, surface where there will be a lower electric field.
    Type: Grant
    Filed: November 1, 2000
    Date of Patent: December 2, 2003
    Assignee: International Business Machines Corporation
    Inventors: Stephen Alan Cohen, Timothy Joseph Dalton, John Anthony Fitzsimmons, Stephen McConnell Gates, Brian Wayne Herbst, Sampath Purushothaman, Stanley Joseph Whitehair
  • Patent number: 6593644
    Abstract: A semiconductor or dielectric wafer with conducting vias is used as a substrate in an integrated circuit packaging structure, where high density inter and intra chip contacts and wiring are positioned on the substrate face on which the integrated circuitry is mounted, and external signal and power circuitry is contacted through the opposite face. Use of a substrate such as silicon permits the use of conventional silicon processes available in the art for providing high wiring density together with matching of the thermal expansion coefficient of any silicon chips in the integrated circuits. The use of vias through the substrate allows a high density of connections leaving the silicon substrate and provides short paths for the connections of power and signals.
    Type: Grant
    Filed: April 19, 2001
    Date of Patent: July 15, 2003
    Assignee: International Business Machines Corporation
    Inventors: George Liang-Tai Chiu, John Harold Magerlein
  • Patent number: 6587151
    Abstract: On a portable computer, a video camera is integrated as a feature by mounting the camera as an assembly made up of a lens and associated pixel electronics in a camera base that is positioned on the perphery of the display in the cover of the portable computer when the cover is open, and the providing of a cavity in the base portion of the portable computer positioned so that the camera assembly enters the cavity when the cover of the portable computer is closed.
    Type: Grant
    Filed: August 26, 1998
    Date of Patent: July 1, 2003
    Assignee: International Business Machines Corporation
    Inventors: Thomas Mario Cipolla, Rama Nand Singh
  • Patent number: 6573606
    Abstract: In the invention an electrically isolated copper interconnect structural interface is provided involving a single, about 50-300 A thick, alloy capping layer, that controls diffusion and electromigration of the interconnection components and reduces the overall effective dielectric constant of the interconnect; the capping layer being surrounded by a material referred to in the art as hard mask material that can provide a resist for subsequent reactive ion etching operations, and there is also provided the interdependent process steps involving electroless deposition in the fabrication of the structural interface. The single layer alloy metal barrier in the invention is an alloy of the general type A—X—Y, where A is a metal taken from the group of cobalt (Co) and nickel (Ni), X is a member taken from the group of tungsten (W), tin (Sn), and silicon (Si), and Y is a member taken from the group of phosphorous (P) and boron (B); having a thickness in the range of 50 to 300 Angstroms.
    Type: Grant
    Filed: June 14, 2001
    Date of Patent: June 3, 2003
    Assignee: International Business Machines Corporation
    Inventors: Carlos Juan Sambucetti, Xiaomeng Chen, Soon-Cheon Seo, Birenda Nath Agarwala, Chao-Kun Hu, Naftali Eliahu Lustig, Stephen Edward Greco
  • Patent number: 6518794
    Abstract: The invention teaches a technique for A C equilibration of the signaling levels and time of 1—>h and h—>1 transitions of CMOS drivers as received at CMOS receivers, so as to improve the rate at which data can be communicated between two CMOS devices. It permits minimization of a switching delay in Double Data Rate Dram memories.
    Type: Grant
    Filed: March 27, 2001
    Date of Patent: February 11, 2003
    Assignee: International Business Machines Corporation
    Inventors: Paul William Coteus, Alan Gene Gara
  • Patent number: 6496360
    Abstract: A portable computer laptop desk is provided when attached to a structure that in turn is supported on web strapping that passes over the upper legs of the operator when in the seated position. The strapping is attached to foldable and telescopable side and center supports for the structure that slide into and fold over the structure forming a package comparable in size to the portable computer.
    Type: Grant
    Filed: June 16, 1997
    Date of Patent: December 17, 2002
    Assignee: International Business Machines Corporation
    Inventors: Michael James Cordes, Steven Allen Cordes
  • Patent number: 6332569
    Abstract: A precise volume, precisely registerable carrier is provided for use with injection molding for producing integrated circuit bump contacts in the “flip chip” technology. A hemispherical cavity is produced by etching through and undercutting a registered opening into a transparent carrier. The hemispherical cavity has related specific volume and visible peripheral shape that permits simple optical quality control when the injection molding operation has filled the cavity and simple optical registration for fusing to the pads on the integrated circuit.
    Type: Grant
    Filed: May 24, 2000
    Date of Patent: December 25, 2001
    Assignee: International Business Machines Corporation
    Inventors: Steven A. Cordes, Peter Alfred Gruber, Egon Max Kummer, Stephen Roux, Carlos Juan Sambucetti, James Louis Speidell
  • Patent number: 6295128
    Abstract: In alignment of superpositioned objects on opposing substrates accuracy and simplicity is achieved through relative movement of the substrates responsive to an image of one object reflected from the surface of the opposite substrate. Alignment of mating fine pitch conductors and pads for bonding is achieved by observation of the reflection of one conductor or pad in the surface of the opposite substrate and relatively moving the substrates to eliminate the reflection.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: September 25, 2001
    Assignee: International Business Machines Corporation
    Inventors: Raymond Robert Horton, Chandrasekhar Narayan, Michael Jon Palmer
  • Patent number: 6256619
    Abstract: A analog data neural network processing system is provided in which there is a self optimization capability that varies the signal processing factors in response to a detected contrast in the system output patterns. The system provides feedback type guidance in varying such processing factors as sampling rate, frame length, signal transformation, neural network vigilance and architecture, each in a direction that will maximize or minimize the contracts with patterns used to train the network. The processing system is useful in all signal classification tasks.
    Type: Grant
    Filed: December 23, 1997
    Date of Patent: July 3, 2001
    Assignee: Caterpillar Inc.
    Inventor: Anthony J. Grichnik
  • Patent number: 6217185
    Abstract: Efficiency in light transfer between a light source and a viewing screen is attained in the invention by positioning a small diameter source of light at a position of highest light transfer intensity within an essentially semicircular reflector interfacing at the wide portion of a wedge shaped light pipe light transfer member and minimizing reflection losses at every optical interface in the light path between the light source and the viewer.
    Type: Grant
    Filed: March 8, 1999
    Date of Patent: April 17, 2001
    Assignee: International Business Machines Corporation
    Inventors: Claudius Feger, Robert Lee Sandstrom
  • Patent number: 6207472
    Abstract: The invention broadens the range of materials and processes that are available for Thin Film Transistor (TFT) devices by providing in the device structure an organic semiconductor layer that is in contact with an inorganic mixed oxide gate insulator involving room temperature processing at up to 150 degrees C. A TFT of the invention has a pentacene semiconductor layer in contact with a barium zirconate titanate gate oxide layer formed on a polycarbonate transparent substrate employing at least one of the techniques of sputtering, evaporation and laser ablation.
    Type: Grant
    Filed: March 9, 1999
    Date of Patent: March 27, 2001
    Assignee: International Business Machines Corporation
    Inventors: Alessandro Cesare Callegari, Christos Dimitrios Dimitrakopoulos, Sampath Purushothaman
  • Patent number: 6192100
    Abstract: In the invention a pellicle mounting structural principle is provided whereby a membrane for protection of an X-ray mask is interchangeably positioned with proper spacing between the X-ray mask and the resist on the wafer in which the pattern produced by the X-ray exposure is to be formed. The mounting principle employs a combined assembly of, a membrane and spacer member subassembly together with a means for seectably separable retention to the supporting structural portion of the mask The principle accommodates membrane materials that may not be flexible and provides an ability to remove the membrane for cleaning or replacement and to removal and reassembly with ease in reestablishing the spacing with respect to the mask. The means for the selectably separable retention to the supporting structural portion of the mask involves the use of springs and elastomers, securing to the sides of the supporting structural mask ring and the bonding of the spacer member directly to the mask.
    Type: Grant
    Filed: June 18, 1999
    Date of Patent: February 20, 2001
    Assignee: International Business Machines Corporation
    Inventors: Raul Edmundo Acosta, Michael James Cordes, Steven Alan Cordes
  • Patent number: 6180296
    Abstract: A lithographically patterned three dimensional stencil type mask is formed on a substrate over a specific area that is to undergo processing. The three dimensional mask functionally provides an energy beam stencil at a precise height over the specific area. The stencil has surface properties that provide a resist function for any scattering of a focused particle beam that passes through an aperture or opening in the center of the stencil, and is formed using standard in the art additive and subtractive processes so that it can be removed after the particle beam processing. It has a particular advantage in an application where it is desired to have sub regions in a pixel area in a liquid crystal display that can provide different domains which operate to provide different pretilt states to the liquid crystal which in turn widens the viewing range of the display.
    Type: Grant
    Filed: October 29, 1999
    Date of Patent: January 30, 2001
    Assignee: International Business Machines Corporation
    Inventors: Michael James Cordes, James Louis Speidell
  • Patent number: 6180292
    Abstract: A precise thickness bulk etchable wafer material, that is responsive to protection with an oxide that inhibits insertion of an etch responsiveness altering material, is assembled with a membrane material that is susceptible to deposition processes. A bulk etch then removes most of the wafer. The arrangement permits the strength and rigidity of the bulk spacer to serve to permit the finely controllable deposition processes for ultra thin and wider ranges of membrane materials, the selective protection for spacer shaping and finally, the removal by the low stress process of etching, of the unused bulk spacer material. An oxide layer is patterned on a bulk spacer material wafer that has a thickness of the gap between an X-ray mask and the to be patterned oxide. The oxide on the bulk spacer material prevents conversion, through the exposed surface of the bulk spacer material wafer, of a portion of the wafer that is to serve as the spacer to a different etch responsiveness from that of the bulk spacer material.
    Type: Grant
    Filed: June 18, 1999
    Date of Patent: January 30, 2001
    Assignee: International Business Machines Corporation
    Inventors: Raul Edmundo Acosta, Marie Angelopoulos, Steven Allen Cordes
  • Patent number: 6181554
    Abstract: Passive cooling of a portable personal computer is enhanced by providing a capability for raising one side of a computer with respect to another thus exposing the bottom surface of the computer base to the ambient air with the heat being dissipated providing an air flow over the bottom surface of the base portion of the computer. A mechanism is provided that is actuated by opening the cover that positions the base in a tilted position. An improved keyboard angle also results.
    Type: Grant
    Filed: October 8, 1998
    Date of Patent: January 30, 2001
    Assignee: International Business Machines Corporation
    Inventors: Thomas Mario Cipolla, Claudius Feger
  • Patent number: 6147730
    Abstract: Three component color sub-pixel element areas of red,green and blue, are serially formed in an overall pixel area, on a transparent substrate, and after each individual color sub pixel element formation, a layer of protective transparent material is applied over the individual sub pixel element and the pixel area before formation of the next sub pixel element. The protective layers render the sub pixel elements unaffected by the processing of subsequent sub pixel members where such conditions as high temperature curing, hardening agents or hardening processes are involved, whereby advantages are achieved in manufacturability, reliability, yield, cost, and throughput.
    Type: Grant
    Filed: November 30, 1998
    Date of Patent: November 14, 2000
    Assignee: International Business Machines Corporation
    Inventors: Russell Alan Budd, George Liang-Tai Chiu, Michael James Cordes, Steven Allen Cordes, James Patrick Doyle
  • Patent number: 6138109
    Abstract: A malfunction diagnostic and repair guidance system and method wherein a matrix of numbers indicating the state of a complex binary system is used as an input vector for a neural network pattern processing capability that is focused to distinguish malfunction types of patterns. The neural network capability provides two complementary network types to classify and generalize the binary matrix. An interactive operator interface is updated with each repair after the root cause and is proposed repair of a malfunction is identified.
    Type: Grant
    Filed: December 23, 1997
    Date of Patent: October 24, 2000
    Assignee: Caterpillar Inc.
    Inventors: Anthony J. Grichnik, John M. Holm
  • Patent number: 6109039
    Abstract: An electronic apparatus heat extraction packaging feature wherein in the transfer of locally generated heat at a component of an electronic apparatus, the heat is stored in a buffering reservoir in the apparatus housing with a Peltier effect transfer control device being mounted external to the housing and interfaced with the thermal reservoir at the housing surface. The packaging interface permits the use of larger Peltier effect devices, greater freedom in precooling of the thermal reservoir and lighter weight portable computers where the Peltier effect devices are positioned in a docking station. In a portable computer with a battery power supply, the thermal reservoir can be independent or the battery can be employed in the thermal reservoir functions.
    Type: Grant
    Filed: March 24, 1999
    Date of Patent: August 29, 2000
    Assignee: International Business Machines Corporation
    Inventors: Gareth Geoffrey Hougham, Lawrence Shungwei Mok