Patents Represented by Attorney Amin & Turocy, LLP
  • Patent number: 7158959
    Abstract: The invention provides systems and methods that can be used for targeted advertising. The system determines where to present impressions, such as advertisements, to maximize an expected utility subject to one or more constraints, which can include quotas and minimum utilities for groups of one or more impression. The traditional measure of utility in web-based advertising is click-though rates, but the present invention provides a broader definition of utility, including measures of sales, profits, or brand awareness, for example. This broader definition permits advertisements to be allocated more in accordance with the actual interests of advertisers.
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: January 2, 2007
    Assignee: Microsoft Corporation
    Inventors: David Maxwell Chickering, David E. Heckerman
  • Patent number: 7155444
    Abstract: The present invention relates to a system and methodology to facilitate interoperability and compatibility between disparate data systems. In one aspect, a file transformation system is provided having at least one file associated with one or more unstructured properties. A file property handler manipulates the unstructured properties in accordance with one or more structured properties associated with a structured object store environment. If an unstructured file is to be operated in the context of a structured object store environment, a promotion operation is performed to update unstructured properties in the file with structured properties suitable for operation in the structured object store environment. If a promoted item were to be manipulated in the structured object store environment, a demotion operation or reverse transformation is performed to update properties in the file.
    Type: Grant
    Filed: October 23, 2003
    Date of Patent: December 26, 2006
    Assignee: Microsoft Corporation
    Inventors: Prasanna V. Krishnan, Sambavi Muthukrishnan, Sameet H. Agarwal, Balan Sethu Raman, Michael Eric Deem
  • Patent number: 7155055
    Abstract: A system and method facilitating progressively transforming and coding digital pictures is provided. The present invention via employment of a multi-resolution lapped transform provides for progressive rendering as well as mitigation of blocking artifacts and ringing artifacts as compared to many conventional compression systems. The invention includes a color space mapper, a multi-resolution lapped transform, a quantizer, a scanner and an entropy encoder. The multi-resolution lapped transform outputs transform coefficients, for example, first transform coefficients and second transform coefficients. A multi-resolution representation can be obtained utilizing second transform coefficients of the multi-resolution lapped transform. The color space mapper maps an input image to a color space representation of the input image. The color space representation of the input image is then provided to the multi-resolution lapped transform.
    Type: Grant
    Filed: August 18, 2005
    Date of Patent: December 26, 2006
    Assignee: Microsoft Corporation
    Inventor: Henrique S. Malvar
  • Patent number: 7153898
    Abstract: Disclosed are metal oxide sols made by mixing at least one metal alkoxide, wherein the metal is a transition metal, a post-transition metal, an alkali metal, or alkaline earth metal; at least one organosilane; at least one boron oxide compound selected from the group consisting of boric acid, alkoxy boron compounds, hydrocarbyl boric acids, hydrocarbyl hydroxy boron alkoxides, and hydroxy boron alkoxides; and a liquid. Also disclosed are composites containing a polymer and the metal oxide sols.
    Type: Grant
    Filed: July 7, 2004
    Date of Patent: December 26, 2006
    Assignee: APS Laboratory
    Inventor: Hong-Son Ryang
  • Patent number: 7151740
    Abstract: An open loop power control system for an orthogonal frequency division modulation (OFDM)-based fixed/mobile wireless system. A preferred system and method comprise measuring signal strength of received interference-free pilot tones transmitted by a base station; determining pathloss according to received power level of pilot tones; and controlling transmit power level of the remote unit by adjusting transmitting channel attenuation according to the pathloss determined in the preceding step. The method may further comprise monitoring at the base station the received signal level of uplink pilot tones; checking if received signal level of uplink pilot tones is outside pre-set limits around the target level at the start of each call; and sending a command to the mobile station over the broadcast channel to increase or decrease the transmitting power level.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: December 19, 2006
    Assignee: Cingular Wireless II, LLC
    Inventors: Hongliang Zhang, Louis Leung, Jari Heinonen, Mike Hirano
  • Patent number: 7151246
    Abstract: An imaging system, methodology, and various applications are provided to facilitate optical imaging performance. The system contains a sensor having one or more receptors and an image transfer medium to scale the sensor and receptors in accordance with resolvable characteristics of the medium, and as defined with certain ratios. A computer, memory, and/or display associated with the sensor provides storage and/or display of information relating to output from the receptors to produce and/or process an image, wherein a plurality of illumination sources can also be utilized in conjunction with the image transfer medium. The image transfer medium can be configured as a k-space filter that correlates projected receptor size to a diffraction-limited spot associated with the image transfer medium, wherein the projected receptor size can be unit-mapped within a certain ratio to the size of the diffraction-limited spot, both in the object plane.
    Type: Grant
    Filed: January 16, 2004
    Date of Patent: December 19, 2006
    Assignees: Palantyr Research, LLC, Angkor Technology, LLP
    Inventors: Howard Fein, Andrew G. Cartlidge
  • Patent number: 7148144
    Abstract: Methods of forming copper sulfide regions or layers over a substrate are disclosed. The copper sulfide regions or layers are formed by contacting a sulfide compound with a substrate containing at least copper and contacting a copper vapor precursor with the substrate to form the copper sulfide layer. Methods of making a memory devices/cells containing a copper sulfide layer, methods of using the memory devices/cells, and devices such as computers containing the memory devices/cells are also disclosed.
    Type: Grant
    Filed: September 13, 2004
    Date of Patent: December 12, 2006
    Assignee: Spansion LLC
    Inventor: Steven C. Avanzino
  • Patent number: 7148892
    Abstract: A system and method is provided for facilitating navigation techniques in a three-dimensional virtual environment. The present invention couples input driving techniques to the state of one or more workspace variables (e.g., object state, virtual body state, environment state) to change the user's viewing context within a single input control motion. Modification of the user's viewing context allows navigation to various positions and orientations with out the need to be provided with that viewing context prior to navigation. The modification of the user's viewing context also allows for single input motion employing the same input drive controls.
    Type: Grant
    Filed: June 3, 2005
    Date of Patent: December 12, 2006
    Assignee: Microsoft Corporation
    Inventors: George G. Robertson, Mary P. Czerwinski, Desney Tan
  • Patent number: 7149946
    Abstract: The present invention utilizes pageable pool memory to provide, via a data verifier component, data verification information for storage mediums. By allowing the utilization of pageable pool memory, overflow from the pageable pool memory is paged and stored in a virtual memory space on a storage medium. Recently accessed verification information is stored in non-pageable memory, permitting low latency access. One instance of the present invention synchronously verifies data when verification information is accessible in physical system memory while deferring processing of data verification when verification information is stored in paged memory. Another instance of the present invention allows access to paged verification information in order to permit synchronous verification of data.
    Type: Grant
    Filed: June 13, 2003
    Date of Patent: December 12, 2006
    Assignee: Microsoft Corporation
    Inventors: Ervin Peretz, Karan Mehra, Landy Wang
  • Patent number: 7150001
    Abstract: A system and method for discovering the design time attributes of a component are provided. The invention includes a type descriptor that can access metadata associated with a component and report the metadata to a development tool. The invention further includes a custom type descriptor interface that can be implemented on a component in order to dynamically provide information regarding the component to the type descriptor. The invention further includes a type descriptor filter service interface that can be implemented by the development tool to facilitate filtering of design time information regarding components in order to simulate a run time environment. The invention further comprises methodologies and tools for facilitating application development.
    Type: Grant
    Filed: March 19, 2001
    Date of Patent: December 12, 2006
    Assignee: Microsoft Corporation
    Inventors: Brian K. Pepin, Shawn P. Burke
  • Patent number: 7148142
    Abstract: A system and method are provided to facilitate dual damascene interconnect integration in a single imprint step. The method provides for creation of a translucent imprint mold with three-dimensional features comprising the dual damascene pattern to be imprinted. The imprint mold is brought into contact with a photopolymerizable organosilicon imaging layer deposited upon a transfer layer which is spin coated or otherwise deposited upon a dielectric layer of a substrate. When the photopolymerizable layer is exposed to a source of illumination, it cures with a structure matching the dual damascene pattern of the imprint mold. A halogen breakthrough etch followed by oxygen transfer etch transfer the vias from the imaging layer into the transfer layer. A second halogen breakthrough etch followed by a second oxygen transfer etch transfer the trenches from the imaging layer into the transfer layer. A dielectric etch transfers the pattern from the transfer layer into the dielectric layer.
    Type: Grant
    Filed: June 23, 2004
    Date of Patent: December 12, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Srikanteswara Dakshina-Murthy, Bhanwar Singh, Khoi A. Phan
  • Patent number: 7149977
    Abstract: A novel virtual calling card system and method aid in the formation of online relationships, serving as an introduction tool and as a contact mechanism. The calling card is an exchangeable entity that is automatically updated, ensuring that the recipient or viewer sees the most current version of the card. The card may display an aspect ratio that is the same as that of a traditional business card, and has a front side and a reverse side. Furthermore, the card provides a number of avenues for the card owner to express themselves, including an array of affiliation symbols, a most recent mood symbol, and a text field. The reverse side of the card can display a representation of the owner's social network, so that the recipients of the card may identify common friends and associates. Thus, the server-based card exchange appears to users as an exchange in the physical world.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: December 12, 2006
    Assignee: Microsoft Corporation
    Inventors: Melora Zaner, Cesare John Saretto, Eugene Zarakhovsky, Eugene Mesgar, Neel Ishwar Murarka, Eun-Kyung Chung, Kathleen Mulcahy, Rama Ranganath, Erica Sanders, Tammy Savage, Linda Stone, John Vert
  • Patent number: 7149832
    Abstract: A system, methodology and/or computer architecture that facilitates processing device interrupts (including level-triggered interrupts) in a user-mode process is provided. The kernel interrupt handler can cause a dedicated thread in the process to wake and invoke the driver interrupt service routine. This thread can then return control to the kernel interrupt handler. In addition to processing interrupts in an isolated mode, the context switching technique could be used in any isolated environment to process interrupts via dedicated execution context methods.
    Type: Grant
    Filed: November 10, 2004
    Date of Patent: December 12, 2006
    Assignee: Microsoft Corporation
    Inventors: Peter W. Wieland, Adrian J. Oney
  • Patent number: 7149983
    Abstract: A user interface, system, and method are disclosed to facilitate specification of queries and displaying corresponding results. The user interface presents the user with dimensions that contain one or more headings arranged according to an information taxonomy, which can vary based on the intended implementation for the system and user interface. A corresponding filter or query is constructed based on the user selecting of one or more headings. The filter is applied to one or more databases to return results that satisfy the filter. The results are presented in the user interface and can include interactive items based on a particular query as well as can correspond to a fully specified task.
    Type: Grant
    Filed: May 8, 2002
    Date of Patent: December 12, 2006
    Assignee: Microsoft Corporation
    Inventors: George G. Robertson, Steven Drucker, Daniel C. Robbins, Kim Cameron, Timothy K. Olson
  • Patent number: 7145793
    Abstract: A novel switching device is provided with an active region arranged between first and second electrodes and including a molecular system and ionic complexes distributed in the system. A control electrode is provided for controlling an electric field applied to the active region, which switches between a high-impedance state and a low-impedance state when the electrical field having a predetermined polarity and intensity is applied for a predetermined time.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: December 5, 2006
    Assignee: Spansion, Inc.
    Inventors: Vladimir Bulovic, Aaron Mandell, Andrew Perlman
  • Patent number: 7145824
    Abstract: Systems and methodologies are provided for temperature compensation of thin film diode voltage levels in memory sensing circuits. The subject invention includes a temperature sensitive bias circuit and an array core with a temperature variable select device. The array core can consist of a thin film diode in series with a nanoscale resistive memory cell. The temperature sensitive bias circuit can include a thin film diode in series with two resistors, and provides a temperature compensating bias voltage to the array core. The thin film diode of the temperature sensitive bias circuit tracks the diode of the array core, while the two resistors create a resistive ratio to mimic the effect of temperature and/or process variation(s) on the array core. The compensating bias reference voltage is generated by the temperature sensitive bias circuit, duplicated by a differential amplifier, and utilized to maintain a constant operation voltage level on the nanoscale resistive memory cell.
    Type: Grant
    Filed: March 22, 2005
    Date of Patent: December 5, 2006
    Assignee: Spansion LLC
    Inventors: Colin S. Bill, Wei Daisy Cai
  • Patent number: 7146588
    Abstract: Systems and methods are disclosed that facilitate predicting electromigration (EM) reliability in semiconductor wafers via decoupling intrinsic and extrinsic components of EM reliability. Electrical cross-sections of wafer test lines can be determined and individual currents can be forced through the test lines to force a constant current density across a test wafer. An EM reliability test can be performed to determine a purely intrinsic component of EM reliability. A single current can then be applied to all test lines and a second EM reliability test can be performed to determine total EM reliability. Standard deviations, or sigma, of failure distributions can be derived for each EM test. Intrinsic sigma can be subtracted from total sigma to yield an extrinsic sigma associated with process variation in wafer fabrication. Sigmas can then be utilized to predict EM reliability when process variations are adjusted, without application of a damaging package-level EM test.
    Type: Grant
    Filed: August 2, 2004
    Date of Patent: December 5, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Amit P. Marathe, Darrell Erb
  • Patent number: 7145653
    Abstract: A system and method is provided for monitoring and controlling the contaminant particle count contained in an aerosol during a photoresist coating and/or development process of a semiconductor. The monitoring system monitors the contaminate particle count present in the environment of the photoresist coating and/or development process, such as in a process chamber or a cup, enclosing the wafer during the process. The present invention employs in situ laser scattering or laser doppler anemometry techniques to detect the particle count level in the chamber or cup. A plurality of lasers and detectors can be positioned at different heights in or outside of a chamber or cup to facilitate detecting particles at different height levels. A laser could be used in conjunction with mirrors to provide a similar measurement. The particle count level can be used to compare with the defect level, so that it can be determined if a cleaner environment and/or process should be implemented.
    Type: Grant
    Filed: June 9, 2000
    Date of Patent: December 5, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Michael K. Templeton, Bharath Rangarajan
  • Patent number: 7143123
    Abstract: A well-known transactions feature in data replication that takes the “last seen” transaction watermark, stores the watermark for each source in a topology, and tags each transaction with information associated with its origin. The tagged data is called Originator Information, and contains, but is not limited to, information on the originating server, originating database, and the originating transaction. This technology provides users with a method to scale out (keep more than two nodes in synchronism with updates at all nodes), increase availability of data during limited network failures (multiple replication pathways), and improve recovery strategies (redeliver transactions upon restore).
    Type: Grant
    Filed: January 9, 2004
    Date of Patent: November 28, 2006
    Assignee: Microsoft Corporation
    Inventors: Richard W. Tom, Kaushik Choudhury, Qun Guo
  • Patent number: 7142216
    Abstract: A three-dimensional API for communicating with hardware implementations of vertex shaders and pixel shaders having local registers. With respect to vertex shaders, API communications are provided that may make use of an on-chip register index and API communications are also provided for a specialized function, implemented on-chip at a register level, that outputs the fractional portion(s) of input(s). With respect to pixel shaders, API communications are provided for a specialized function, implemented on-chip at a register level, that performs a linear interpolation function and API communications are provided for specialized modifiers, also implemented on-chip at a register level, that perform modification functions including negating, complementing, remapping, stick biasing, scaling and saturating.
    Type: Grant
    Filed: September 9, 2004
    Date of Patent: November 28, 2006
    Assignee: Microsoft Corporation
    Inventors: Charles N. Boyd, Michael A. Toelle