Abstract: A circuit terminating device for mechanically retaining and electrically connecting a planar substrate such as a thick/thin film circuit to a printed wiring card. The terminating device is characterized by a terminating body having planar sidewalls defining a hollow interconnection post receiving area therebetween. A pair of substrate spring members extend from a sidewall of the terminating body arranged to compressively accept an edge of the substrate retaining and connecting the substrate to the terminating body. Post spring members extending inwardly into the post receiving area engage an interconnection post which extends from the printed wiring card thereby retaining the terminating body to the printed wiring card.

Abstract: An improved adaptive echo cancelling system and method is disclosed. The system and method utilizes linear code spacing and is particularly well suited for echo cancellation of full scale signals. Echo cancellation is effected by use of digital-to-analog converters functioning as a multiplier receiving first digital signals representative of a received speech waveform signal and second digital signals representative of the termination network on the line, which termination network causes and defines an echo reflection of the received signal. The output of the multiplier is summed and the sum is then subtracted from the echo components of the received signal to thus achieve echo cancellation and to produce an error signal that is utilized to continuously reduce error between the actual and estimated echo waveforms. Provision is made to inhibit error indications due to circuit generated coding noise and/or predetermined small detected errors to thereby enhance system operation.

Abstract: An arrangement for constructing multi-layered printed circuits characterized by a first layer having top and bottom surfaces with the top surface including a plurality of parallel conductors divided into at least two conductor groups by a transversely oriented break across each conductor. The bottom surface further includes a plurality of parallel conductors arranged perpendicular to the conductors on the top surface and is also divided into at least two conductor groups by a transversely oriented break across each conductor. A plurality of holes extend through the first layer with, each hole adjacent to an intersecting conductor pair. A second layer including top and bottom surfaces and a plurality of plated-through holes has conductor pennants extending from selected holes in a first direction on the top surface and a second opposite direction on the bottom surface.

Abstract: A formatted data message for conveying control information from the peripheral processor of one telecommunications switching system to the peripheral processor of at least one other telecommunications switching system is provided. The data message format comprises a first control work including a plurality of control bits, a data bit and a parity bit for the first control word and a plurality of data words, each data word including a parity bit. The data words contain control information to be conveyed to the receiving peripheral processor. A parity word is included which provides parity for an associated plurality of the preceding data and control words.

Abstract: A receive data reformatter for a telecommunications switching system is shown for disassembling a data message to a plurality of 8-bit data bytes. The receive data reformatter is comprised of a parallel to serial converter which receives the data message one byte at a time which it subsequently outputs serially. A horizontal parity check circuit receives the serial data and is arranged to output an error signal when an error in parity is detected. A serial to parallel converter, connected to the serial output of the parallel to serial converter, receives the serial data and assembles the serial data into parallel form. A write buffer connected to the serial to parallel converter receives the assembled parallel data when eight data bits have been accumulated in the serial to parallel converter. The thus formed data byte is output to a peripheral processor of the telecommunications switching system.

Abstract: An information panel assembly comprised of liquid crystal display devices, positioned on a mounting member and sandwiched between a cover member and a circuit member. Elastomeric connectors connect the liquid crystal display devices to drive circuitry on the circuit member. The cover member includes rear projecting members which are accepted by apertures on the circuit member and are disposed to engage threaded fasteners, locking the assembly together. A switch member including a matrix of membrane switches is mounted over the cover member connecting each switch to the circuit member thereby, selectively controlling the information displayed.

Abstract: A circuit terminating clip for mechanically retaining and electrically connecting a planer substrate such as a thick/thin film circuit to a printed wiring card. The terminating clip is characterized by a terminating body having planer sidewalls defining a hollow interconnecting post receiving area therebetween. A substrate spring member extends from a bottom edge of a front wall of the terminating body arranged to accept the edge of the substrate, connecting the substrate to the terminating body. A terminating pad member extending from the top edge of the front wall of the terminating body is soldered to the substrate retaining the terminating body to the substrate. Post spring members extending inwardly into the post receiving area engage an interconnection post which extends from the printed wiring card thereby retaining the terminating body to the printed wiring card.

Abstract: A circuit interconnection device for mechanically retaining and electrically connecting a planer substrate such as a thick/thin film circuit to a printed wiring card. The circuit interconnection device is characterized by a generally rectangular device body having planer sidewalls defining a hollow interconnection post receiving area therebetween. A pair of ears extend from a bottom edge of a front wall arranged to have an edge of the substrate rest thereon. A pair of substrate spring members extend outward from a top edge of the front wall to engage the substrate retaining and connecting the substrate to the terminating body. A rear wall includes a pair of post spring members extending inwardly into the post receiving area engaging an interconnection post extending from the printed wiring card thereby retaining and connecting the terminating body to the printed wiring card.

Abstract: An arrangement for interfacing the originating time stage (OTS) and terminating time stage (TTS) of a time and control unit (TCU) to the space stage of T-S-T digital switching system. The space stage includes an intra-path through the space stage as well as an interpath. The interface transmits PCM samples simultaneously from the OTS to both the intra and interpaths of the space stage. PCM samples from the space stage are received by an intra buffer and an inter buffer from the intra path and inter path respectively. A TCU control memory gates and connects either the intra buffer or inter buffer to the TTS.

Abstract: An address sequencer and memory arrangement is shown for transferring data in the form of message bytes to and from a plurality of digital data links. The address sequencer and memory arrangement includes a memory circuit having a plurality of memory location areas associated with each of the plurality of digital data links. A counter circuit connected to the memory circuit is loaded with a preset count by a link processor complex. The counter increments and outputs to the memory circuit addresses which sequentially access each of the memory location areas, transferring each message byte to a data link output buffer for transmission over a respective one of the plurality of digital data links. Alternatively, the counter addresses sequentially each memory location area transferring a message byte to each memory location area from each of the plurality of digital data links via a data link input buffer.

Abstract: A device arranged to electrically connect and physically attach a hybrid circuit module to a printed wiring card. The device is characterized by a male terminal section arranged to be mounted on a printed wiring card, a compliant section for buffering any flexure or displacement imparted to the hybrid circuit module and a hybrid circuit module accepting section. Additionally, a terminal accepting section is provided disposed to accept the male terminal section of another similar device, allowing the stacking of a plurality of hybrid circuit modules to the printed wiring card.

Abstract: A cross-copy arrangement is shown for synchronizing parity clock signals in a duplex digital system. Each copy of the duplex system generates a local timing signal and a remote timing signal. The remote signal of each copy is crossed over and logically combined with the local timing signal generating a parity clock signal.

Abstract: An improved screen printing apparatus for printing conductive, resistive and insulative films to the surfaces of ceramic or glass substrates. The screen printing apparatus is characterized by a carriage having a substrate to be printed resting thereon and a frame member extending about the periphery of the carriage. A mesh screen having an emulsion layer is affixed to the screen and suspended over the substrate. The improvement comprising a pair of force absorbing members attached to the carriage in a space relationship to and on opposite sides of the substrate. A pair of rolling means are attached to opposite sides of a squeegee holder with each rolling means in registration with a respective force absorbing surface. A squeegee extends from a bottom surface of the squeegee holder intermediate the rolling means. As the squeegee holder is drawn across the screen each rolling means travels along a respective force absorbing member.

Abstract: An interface arrangement is shown compensating for timing delays during transmission of communication information between a transmitting and receiving stage of a T-S-T digital switching system. The arrangement includes a buffer at the receiving stage having first and second storage files. During a first time slot communication information is written in the first file using control signals transmitted along with the communication information while simultaneously the second file is read using a local control signal. In the subsequent time slot the second file is written to and the first file is read, providing a one time slot slip between the transmitting and receiving stages.

Abstract: A space stage for a T-S-T digital switching system is shown arranged into four identical space stage units (SSU). Each SSU is arranged into modular functional elements. The elements are combined in each SSU to allow the space stage to grow modularly, interconnecting from thirty-two to sixty-four originating time and terminating time stages.

Abstract: A space stage for a T-S-T digital switching system is shown arranged into modular functional elements. The elements are combined allowing the space stage to grow modularly to interconnect from one to thirty-two originating time stages and terminating time stages.

Abstract: A space stage for a T-S-T digital switching system is shown arranged to interconnect the originating time stages (OTS) and terminating time stages (TTS) of a first time group and the OTS's and TTS's of a second time group. The space stage includes four identical space stage units (SSU). The first SSU interconnects the OTS's and TTS's of the first time group and the second SSU the OTS's and TTS's of the second time group. The third SSU interconnects the OTS's of the first time group to the TTS's of the second time group and the fourth SSU interconnects the OTS's of the second time group to the TTS's of the first time group.