Abstract: The present invention provides a polymer electrolyte fuel cell, which is inexpensive and has an excellent efficiency of generating electric power, by using a material alternative to a perfluoroalkylene sulfonic acid polymer. The polymer electrolyte fuel cell comprises a pair of electrodes (2, 3) consisting of an oxygen electrode (2) and a fuel electrode (3) both having a catalyst layer (5) containing a catalyst and an ion conducting material; and a polymer electrolyte membrane (1) sandwiched between the two catalyst layers (5) of the both electrodes (2, 3). The above ion conducting material contained in the above polymer electrolyte membrane (1) or in the catalyst (5) layer of at least one of the above electrodes (2, 3) comprises a sulfonated polyarylene having sulfonic acid side-chain groups.

Abstract: A data additional circuit adds plural types of expectation data to be read from a refresh block to data read from other blocks, respectively, to generate plural read data strings. An error correction circuit detects errors for each read data string, and sets the most reliable result of the error detection results to be true. The error correction circuit decodes data to be read from the refresh block based on a true error detection result. Moreover, the error correction circuit corrects the error of the read data string corresponding to the true error detection result. Consequently, without extending the read cycle time, a refresh operation can be hid, and errors can be corrected simultaneously. By correcting a data error read from a bad memory cell of data retention characteristics, a refresh request interval can be extended, and power consumption during a standby period can be reduced.

Abstract: Flags are formed to respectively correspond to memory cell groups each including volatile memory cells. Each flag indicates as a set state that the memory cells store data in a second memory mode. In a changing operation of changing from a first memory mode in which data is independently retained by each memory cell to a second memory mode in which same data are retained in the memory cells of each memory cell group, each flag is reset in response to the first access to the corresponding memory cell group. Therefore, only the first access is made in the second memory mode in each memory cell group. The memory cells are accessed in a mode according to the flag in the changing operation, thereby allowing a system managing the semiconductor memory to freely access the memory cells even during the changing operation. Consequently, a practical changing time can be eliminated.

Abstract: In a hybrid vehicle 1 in which a transmission 14 is connected via a first clutch 13 to an internal combustion engine 11 and a first motor 12 that are coupled in series to front wheels Wf, a second motor 16 which is a three-phase brushless DC motor is connected to the transmission 14 via a second clutch 15. When the vehicle in an idling stop state of the internal combustion engine 11 is to be started, a motor output control portion 18 calculates a torque which is required of the second motor 16 in accordance with the inclination angle of the road surface on which the vehicle is traveling, and also a continuous energization time period T1 of a stator winding of one phase in the second motor 16.

Abstract: The present invention provides a power transmitting apparatus that uses a small configuration to efficiently carry out various forms of propulsions such as a speed change propulsion and even an EV propulsion (electric propulsion) including a series type EV propulsion. The power transmitting apparatus includes a clutch 8 that connects and disconnects rotation transmissions between an output shaft 1a of an engine 1 and an input shaft 4r of one 4 of two power distributors 4 and 5 to which a rotational drive force is transmitted by the engine 1, a clutch 9 that connects and disconnects rotation transmissions between one of two output shafts 5c, 5c of the power distributor 5 and a power output shaft 12, and rotation regulating means 10 and 11 that properly inhibit rotation of the input shaft 4r of the power distributor 4 and rotation of the output shaft 5c of the power distributor 5.

Abstract: A memory capable of suppressing disturbance is provided. This memory activates each of a selected word line and a bit line corresponding to unrewritten storage means while keeping potential difference therebetween at a level not more than a prescribed value and differentiates the length of a period for applying a voltage for rewriting to each of the selected word line and a bit line corresponding to rewritten storage means from the length of a transition period of the potential of at least either the word line or the bit line corresponding to the unrewritten storage means when performing a rewrite operation on partial selected storage means or performing no rewrite operation on all selected storage means.

Abstract: An image processing method by which image information of a variety of artifacts can be easily searched through in accordance with attributes of the artifacts and the image information combined to easily produce a realistic image close to reality, comprising the steps of generating an artifact information object of clothing or another artifact by using element information object data indicating attributes of an element forming a component of the artifact and artifact generating processing object data indicating a processing procedure for generating the artifact by using the same, then combining the artifact and base artifact information object data of a base artifact such as a doll to generate image data of a scene of for example a doll with clothes on.

Abstract: A delay time adjusting method adjusts a delay time of an input signal so that a phase of the input signal and a phase of an output signal match each other. The delay time adjusting method comprises the step of delaying the phase of the output signal until a phase difference between the phase of the input signal and the phase of the output signal becomes N periods, where N is an integer other than zero.

Abstract: The valve train V of an internal combustion engine E includes; a rocker arm 50, 60 for opening and closing the suction valve 13; a holding body 70 for holding the spring 77 to generate the bias force F3 for biasing the rocker arm 50 to the suction cam 21; and a drive shaft 81 for moving the supporting shaft 32, 33 of the rocker arm 50, 60 via the holder 30. The rocker arm 50 includes: an acting section 54 on which the bias force F3 of the spring 77 directly acts; a cam contact section 52 coming into contact with the suction cam 21. The holding body 70 provided integrally with the holder 30 moves following a position of the supporting shaft 32 which moves together with the holder 30. The spring 77 is arranged between the holding body 70 and the acting section 54, which are opposed to each other in the direction of the line of action of the bias force F3 and along the plane perpendicular to the rotary centerline L2 of the cam shaft 20.

Abstract: A control system for an internal combustion engine is disclosed. The engine has an exhaust gas recirculation device which includes an exhaust gas recirculation passage for recirculating exhaust gases from the engine to an intake system of the engine, and an exhaust gas recirculation control valve provided in the exhaust gas recirculation passage, for controlling a flow rate of the exhaust gases. An air-fuel ratio control amount is calculated based on an output of the air-fuel ratio sensor provided in the exhaust system of the engine. The air-fuel ratio of the air-fuel mixture supplied to the engine is controlled with the air-fuel ratio control amount. A failure of the exhaust gas recirculation device is determined based on a changing component of the air-fuel ratio control amount when changing an opening of the exhaust gas recirculation control valve in a predetermined cycle.

Abstract: A constant velocity universal joint has an outer joint member having eight curved track grooves axially extending along an inner circumferential surface, an inner joint member having eight curved track grooves axially extending along an outer circumferential surface, eight balls respectively arranged in eight ball tracks provided as pairs of the track grooves of the outer and inner joint members. The center of each track groove of the outer joint member is axially displaced a predetermined distance from the spherical center of the inner circumferential surface. The center of each track groove of the inner joint member is axially displaced the same distance from the spherical center of the outer circumferential surface in the direction opposite to that of the outer joint member. A PCD gap in the ball track is in the range of 5 ?m to 50 ?m.

Abstract: A polymer electrolyte fuel cell has a catalytic layer comprising a material and a polymer electrolyte, and the catalytic layer contains a fibrous material such as carbon whiskers or hydrophilic fibers. The polymer electrolyte fuel cell in the present invention having a catalytic layer comprising a catalytic material, an ion conducting material, an electron conducting material, and a void forming agent, and voids having diameters of from 60 to 1000 nm in the catalytic layer has a void volume of from 0.15 to 0.25 cm3/g.

Abstract: A membrane electrode assembly having excellent electric power generating capability is produced from a base coated with first polymer electrolytic solution to form an undried first polymer electrolytic membrane. Undried first polymer electrolytic membrane is coated with first electrode dispersion of second polymer electrolytic solution and catalyst carried on a catalyst carrier and dissolved therein. First electrode dispersion is dried to form a first electrode positive-electrode membrane electrode assembly. Another base, coated with third polymer electrolytic solution, forms undried second polymer electrolytic membrane. Undried second polymer electrolytic membrane is coated with a second electrode dispersion of fourth polymer electrolytic solution and a catalyst carried on a catalyst carrier and dissolved therein. Second electrode dispersion is dried forming a second electrode negative-electrode membrane electrode assembly.

Abstract: The present invention provides a non-volatile memory cell structure suitable for the flash memory cell and EEPROM cell (electrically erasable programmable read only memory cell) to perform the byte programming and byte erasing operations. In the programming operation, a higher negative voltage applied to the drain region, such that the hot holes is generated to induce the hot electrons into the floating gate through the tunneling oxide layer in the lateral electrical field. In addition, the gate voltage is around the threshold voltage, which dependent on the integration circuit device design. Furthermore, the non-volatile memory cell utilized the channel Fowler-Nordheim tunneling for erasing operation. In order to perform the byte erasing operation, the drain junction used as an inhibition switch. Thus, the unselected cell in the same word line is inhibited by biasing the drain to ground. Therefore, the word lines of unselected cells are grounded.

Abstract: A clock control apparatus for a memory controller comprises an interface unit which processes a block access to a plurality of banks of an SDRAM as a single continuous macro access in order to perform arbitration of the macro access, the block access externally supplied to the memory controller. A power-saving control unit controls both a clock signal of an internal circuit of the memory controller and a clock enable signal of the SDRAM in response to a control signal supplied from the interface unit.

Abstract: A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.

Abstract: A first delay circuit receives a sampling clock obtained by multiplying detected frequency of reference clock patterns and outputs delay clocks from first delay stages, respectively. Recording frequency of the sampling clock is not obtained using the reference clock patterns but obtained using received addresses. A disk driving apparatus obtains the number of the first delay stages to be used which correspond to one cycle of the obtained recording frequency and necessary for phase adjustment of the sampling clock, and disables not-used first delay stages. Any of the delay clocks is selected and at least one of regenerating operation to read data from a disk media and recording operation to write data thereto is executed in synchronization with the selected delay clock. Consequently, the number of delay stages to be disabled can be obtained with simple control, reducing power consumption of circuits for adjusting phases of the sampling clocks.

Abstract: A variable frequency synthesizer comprising a sigma-delta modulator is provided. Such synthesizers provide an exact average frequency whereas the instantaneous frequencies varies. The sigma-delta modulator comprises a plurality of accumulator stages being connected in cascade. At least one input value of an accumulator (51, 52, 53, 54) being part of the sigma-delta modulator has a second component which is equal to an overflow signal (of1, of2, of3, of4) multiplied by a factor. This feedback reduces the-maximum fluctuation of the instantaneous frequencies. Phase jitter generated by non-linearities of the phase detector, the charge pump and the VCO is therefore reduced.

Abstract: The present invention relates to a semiconductor electret condenser microphone capable of being reduced in size and including an acoustic sensor 100 and a case 200 for accommodating the acoustic sensor 100, the acoustic sensor 100 has a semiconductor chip 110 forming necessary electronic circuits 111A to 111C, and opening a through hole 112 away from the electronic circuits 111A to 111C, an electrode layer 120 formed on the surface of the semiconductor chip 110 away from the through hole 112, an electret member 130 laminated away from part of the electrode layer 120 and through hole 112, and a diaphragm 140 provided with a spacing 160 to the electret member 130, in which the electrode layer 120 exposed from the electret member 130 is connected to the electrode 111a of the electronic circuit 111A through the case 200 (FIG. 6).