Abstract: An apparatus for biasing a body voltage of a silicon-on-insulator transistor includes an operational amplifier that generates an output voltage that is proportional to the voltage difference between a desired gate-source threshold voltage and a reference voltage. A reference biasing transistor has a gate that is electrically coupled to the output. A reference mirror transistor has both a gate and a drain that are electrically coupled to the current source node, and also has a body that is electrically coupled to the drain of the reference biasing transistor. A device biasing transistor has a gate that is electrically coupled to the output voltage and has a drain that is electrically coupled to the body of the silicon-on-insulator transistor. The device biasing transistor maintains a voltage at the body of the silicon-on-insulator transistor so that it has a gate-source threshold voltage within a predetermined range of the desired gate-source threshold voltage.

Abstract: A method, computer program product, and graphics processor for stereoscopically displaying a primitive on a display device adds a row of pixels to the primitive to improve its appearance on the display device. To that end, it first is determined if the primitive is to be stereoscopically displayed on the display device. After it is determined that the primitive is to be stereoscopically displayed, then a row of pixels is added to the primitive. The primitive preferably is a point primitive or a line primitive.

Abstract: A device for storing pixel information for displaying a graphics image on a display includes a frame buffer and a processor. The information includes an intensity value and a value associated with each of a plurality of additional planes for each pixel. The frame buffer memory has a series of consecutive addresses for storing information to be output to the display. The frame buffer may be subdivided into a plurality of blocks, where each block corresponds to a region of the display having a plurality of contiguous pixels. The processor places the pixel information within the frame buffer memory so that in a given block there are placed at a first collection of consecutive addresses the intensity values for each of the pixels in the block.

Abstract: An enhanced checkerboard pattern for optimizing performance when accessing a four-bank SDRAM. The screen is mapped using the enhanced checkerboard pattern, and each enhanced checkerboard pattern is composed of 16 squares. The enhanced checkerboard is made from two basic blocks, each block having 4 squares, and each square representing a distinct memory bank. The two basic blocks are mirror image of each other.

Abstract: A method and apparatus for remediation of non-aqueous phase liquids (NAPL), including the use of a prior art hydrophobic adsorption system including a continuous loop of adsorptive material, with a weighted pulley on the free end of the loop to allow for the loop to be placed within a well being deeper than it is wide.

Abstract: An apparatus for displaying a polygon on a horizontal scan display device having a plurality of pixels includes first and second rasterizers that each process respective first and second sets of pixels. Each set of pixels includes vertical stripes that are transverse to the horizontal scan of the display. To that end, the first rasterizer has an input for receiving polygon data relating to the polygon. The first rasterizer determines a first set of pixels that are to be lit for display of the polygon, and also determines display characteristics of the first set of pixels. Similar manner, the second rasterizer also includes an input for receiving polygon data relating to the polygon. The second rasterizer similarly determines a second set of pixels that are to be lit for display of the polygon, and also determines display characteristics of the second set of pixels.

Abstract: A back end unit for use with a graphics processor includes an input for receiving graphics data streams from the graphics processor, an output for transmitting graphics data streams, and a plurality of paths, coupled with the input and output, that direct graphics data streams between the input and the output. The plurality of paths direct data between the various modules that are a part of the back end unit. To that end, among other things, the back end unit also includes a gamma correction module that applies gamma correction operations to graphics data streams, a cursor module that adds cursor data to graphics data streams, and a digital to analog converter that converts the graphics data streams from a digital format to an analog format. The plurality of paths thus permit graphics data streams to pass through no more than two of the gamma correction module, the cursor module, and the digital to analog converter.

Abstract: A policy engine for handling incoming data packets. The policy engine includes a stream classification module, a data packet input/output module, and a policy enforcement module. The policy enforcement module further includes a packet scheduler, an on-chip packet buffer circuitry, and a plurality of action processors. The stream classification module creates a packet service header for each data packet, wherein the packet service header indicates policies to be enforced for that data packet. The action processors enforce the policies.

Abstract: An integrated circuit controller for power conversion systems that provides for the control of parallel phased semiconductor switches without the need for separate filter inductors for each switch. The controller derivates two phased clock signals from a source clock, generates ramp signals, modulates ramp signals, and outputs phased gate drive signals to control parallel phased switches.

Abstract: A system for ensuring that erroneous data is not improperly latched in a gate when reading data from a DDR-SDRAM. The system is preferably a circuit that employs the last falling edge of a receive strobe to stop further variation of the receive strobe from affecting a new receive strobe signal.

Abstract: A graphics accelerator includes a vertex input for receiving vertex data, an output for forwarding processed data, and a processor coupled with the vertex input and output. The graphics accelerator also includes an instruction input that receives instructions for processing the vertex data received from the vertex input. The processor is responsive to wide word instructions.

Abstract: A method of scheduling packet output according to a quality of service action specification, the method maintains a calendar queue of bandwidth timeslots, organizes the timeslots into groups, invokes a look-up logic circuitry to inspect a group of timeslots substantially simultaneously, determines a first unoccupied timeslot to schedule a current packet, and also determines a first occupied timeslot that contains a next packet to transmit.

Abstract: Apparatus (1) for generating a control signal for a tunable circuit (3) sensitive to temperature receives an input control signal and predistorts it in a distortion circuit (4), so that the output (5) of the tunable circuit (3) will be substantially corrected for non-linearities in the tunable circuit (3). The distortion circuit (4) includes a linear non-distortion circuit element (9), which may be a linear temperature compensation element, and one or more non-linear distortion circuit elements (12, 13, 14), each of which distort the input control signal according to a different function. The outputs of the distortion circuit elements are passed to variable gain elements (17, 18, 19, 20) to produce weighted components. The weighted linear and non-linear components are then combined in a combination circuit element (8) to provide a predistorted control signal to the tunable circuit (3).

Abstract: A hardware-based policy engine that employs a policy cache to process packets of network traffic. The policy engine includes a stream classifier that associates each packet with at least one action processor based on data in the packet, and the action processor further acts on the packets based on the association determined by the stream classifier.

Abstract: An apparatus for displaying a polygon on a horizontal scan display device having a plurality of pixels includes first and second rasterizers that each process respective first and second sets of pixels. Each set of pixels includes vertical stripes that are transverse to the horizontal scan of the display. To that end, the first rasterizer has an input for receiving polygon data relating to the polygon. The first rasterizer determines a first set of pixels that are to be lit for display of the polygon, and also determines display characteristics of the first set of pixels. In a similar manner, the second rasterizer also includes an input for receiving polygon data relating to the polygon. The second rasterizer similarly determines a second set of pixels that are to be lit for display of the polygon, and also determines display characteristics of the second set of pixels.

Abstract: Two distinct scavenger receptor type proteins having high affinity for modified lipoproteins and other ligands have been isolated, characterized and cloned. HaSR-BI, an AcLDL and LDL binding scavenger receptor, which is distinct from the type I and type II macrophage scavenger receptors, has been isolated and characterized and DNA encoding the receptor cloned from a variant of Chinese Hamster Ovary Cells, designated Var-261. dSR-CI, a non-mammalian AcLDL binding scavenger receptor having high ligand affinity and broad specificity, was isolated from Drosophila melanogaster. The isolated receptors are useful in screening for drugs that inhibit uptake of cholesterol in endothelial or adipose cells or macrophages, respectively. They are also useful as probes for the isolation of other lipoprotein receptors and in research the roles of these receptors.

Abstract: A method for providing a synthetic barrier made of biocompatible polymeric materials in vivo which involves application of a material to a tissue or cellular surface such as the interior surface of a blood vessel, tissue lumen or other hollow space, is disclosed herein. The material may also be applied to tissue contacting surfaces of implantable medical devices. The polymeric materials are characterized by a fluent state which allows application to and, preferably adhesion to, tissue lumen surfaces, which can be increased or altered to a second less fluent state in situ; controlled permeability and degradability; and, in the preferred embodiments, incorporation of bioactive materials for release in vivo, either to the tissue lumen surface or to the interior of the lumen, which alter cell to cell interactions.

Abstract: Assays that are prognostic for patients that will develop nephritis have been developed where patient serum is screened for the presence of anti-dsDNA antibodies that are cross reactive with A and D SnRNP proteins. The assays are based on the use of either peptides containing epitopes bound by the anti-dsDNA antibodies, or the antigens for the antibodies, A and D SnRNP proteins. Therapeutic compositions have also been developed using either antibodies that block the pathogenicity of the anti-dsDNA antibodies, such as the naturally occurring anti-La/SSB, anti-Ro/SSA and anti-U1RNP antibodies that are cross reactive with the anti-dsDNA or using the peptides or A and D proteins to induce tolerance.

Abstract: A method for alleviating the symptoms of a cosmetic or dermatologic skin condition is described. An effective amount of a poly(hydroxy acid)/polymer conjugate in a pharmaceutically or cosmetically acceptable vehicle is provided. Topical compositions of the conjugates with another cosmetic or dermatological agent, and compounds of the conjugates having attached physiologically active functional groups, are also provided.

Abstract: Two methodologies are provided: the first provides a means for rapidly and efficiently identifying essential and functional genes; and the second provides a means for obtaining biologically active nucleic molecules (ribozymes, EGSs, and antisense,) which can be used to inactivate functional genes. In the first method, a library of EGSs is prepared based on all possible known compositions. In a preferred embodiment, the EGSs are twelve or thirteen-mers for targeting bacterial RNAse to cleave a substrate. This library is added to the cells containing the genes to be screened, for example, E. coli. Those cells in which the EGS causes a loss of viability, or other phenotype, are identified. The EGS(s) responsible for the loss of viability are analyzed, and the resulting sequence information used to identify the gene within the known genomic sequences.