Abstract: A method of calibrating signal processing circuitry in a magnetic data storage device. The method ensures that an adequate signal-to-noise ratio is achieved when reading a head-position calibration signal. First, discrimination thresholds are set to an initial low value. Then, with wide bandwidth and stationary media, amplifier gain is calibrated by adjusting gain to make the amplitude of amplified background noise equal to the initial threshold value. Finally, bandwidth is reduced and the discrimination thresholds are raised to a final value. The final threshold value ensures that a signal must exceed a predetermined signal-to-noise ratio before the signal is accepted as being valid.

Abstract: A parity generation circuit for an internal cache memory of a computer processor. The parity generation circuit generates parity for both reading and writing during execution of a single processor instruction. The parity generation circuit saves processor circuitry by sharing one parity logic tree for both reading and writing. During one clock phase, a multiplexer routes data to the memory through the parity logic tree and a demultiplexer routes parity from the parity logic tree to the memory. During a second clock phase, the multiplexer routes data from the memory through the parity logic tree and the demultiplexer routes parity from the parity logic tree to the processor.

Abstract: A guidance channel for a tape cartridge and a matching guide for a tape drive chassis to prevent a new design cartridge from being inserted into an old design drive but permitting new design drives to accept new design cartridges or old design cartridges. The cartridge guidance channel is wide at the front of the tape cartridge and narrow at the back of the tape cartridge. Tape cartridges having a narrow channel at the back end cannot be inserted into a drive chassis having a guide with a uniform wide width. The drive chassis guide is narrow at the front and wide at the back. The drive chassis guide can mate with tape cartridge channels having a uniform wide width or with tape cartridge channels having a narrow channel at the back end.

Abstract: A method and apparatus for determining whether semiconductor components are electrically connected to a printed circuit board. A voltage (or current) is connected to two traces leading to connections to a semiconductor component to be tested. The initial current (or voltage) is measured at an initial temperature. Then, the temperature of the semiconductor is changed. Current (or voltage) is measured again after the temperature change. A change in current (or voltage) indicates that the semiconductor component is electrically connected to the trace.

Abstract: A probe fixture for making multiple high frequency connections to an electronic device under test. An application for the apparatus is in integrated circuit wafer testing fixtures requiring high frequency signals. Low frequency signals are attached by ribbon cables to a printed circuit board. High frequency signals use coaxial cables. A probe carrying ceramic substrate has microstrips for the high frequency signals. Low frequency signals are connected from the printed circuit board to the ceramic substrate by a conductive elastomer interconnect strip clamped between the printed circuit board and the substrate. Coaxial adapters passing through the printed circuit board have spring loaded center conductors to provide pressure contact between the coaxial cables and microstrip signal strips. In one embodiment, contact between coaxial cable shields and microstrip ground is through a conductive clamp to a substrate backplane.

Abstract: A mixed analog and digital integrated circuit with features which are especially useful for application as a front end for physiological signal instrumentation such as electrocardiographs, electromyographs, and electroencephalographs. The integrated circuit has 5 signal channels, each with analog amplification and analog to digital conversion. The channels can be configured for various combinations of input signal amplification, input signal summation, analog output driving, and AC impedance measurement. The integrated circuit has 2 digital serial input lines and 2 digital serial output lines, all designed for direct connection to optical couplers. Channel configuration, gain, and other parameters are externally controllable by a serial digital input signal. Up to 6 compatible devices can be serially connected in a chain.

Abstract: A modified pseudo-nMOS logic gate for use in systems in which quiescent current testing is desired. The load transistor of each pseudo-nMOS gate is controlled by a two-input load control gate. One input of the load control gate is connected to a global test signal and the second input of the load control gate is connected to the output of the pseudo-nMOS gate. In normal operation, the global test signal is logically true, and the load control gate has no effect on the pseudo-nMOS gate. During quiescent current testing, the global test signal is logically false and the output of the load control gate is determined by the logical output of the pseudo-nMOS gate. If the output of the pseudo-nMOS gate is logically true, the load control gate has no effect on the pseudo-nMOS gate. If the output of the pseudo-nMOS gate is logically false, the load control gate turns off the load transistor so that no static current flows through the load transistor.

Abstract: A method and apparatus for using a varying amplitude data signal from a data storage medium such as a magnetic disk or magnetic tape to calibrate the gain of the data signal amplifier to an optimal fixed gain. At initialization, amplified data signal peaks are detected over a data region of the data storage medium. The amplified signal peaks are compared to a predetermined reference. The signal amplifier gain is adjusted until only a few amplified signal peaks exceed the reference. The amplifier gain is then fixed at the final adjusted value.

Abstract: A completely passive adapter for scanning transparent images in a reflective scanner. Mirrors are used to capture light from a lamp that is internal to the scanner and to reflect that light thought a transparent image along the light path required by internal scanner optics. For larger images, a lens is added to capture additional light. Different embodiments of the adapter accommodate variation in angles of optical paths and offset between the light source path and the light detection path. Embodiments are provided having two tilted mirrors, two mirrors plus an optical wedge, four mirrors, and seven mirrors. An optional graduated density optical filter may be added to compensate for nonuniform illumination.

Abstract: A digital line driver circuit with active pull-down, high transient pull-up current, and limited steady-state pull-up current. Steady-state pull-up current is provided through a pull-up resistor. Transient pull-up current is provided by a capacitively coupled active pull-up circuit.

Abstract: A method for reducing motor start-up current in an electric motor control system. The method first prevents flow of current through the motor while slowly charging a parallel capacitor. Then, the motor control voltage is reduced and current is switched through the motor. The motor control voltage remains reduced until the motor starts turning. After the motor starts turning, the control voltage is slowly increased as the motor accelerates, limiting the current from the power supply.

Abstract: A data storage system such as a tape drive or flexible disk drive having a dual-gap head being controlled by a dual-mode flexible disk controller. The flexible disk controller has a first mode designed to use a head having one section for perpendicular reading and writing and a second section for erasing. The flexible disk controller has a second mode designed to use a conventional flexible disk head having a single gap for reading, writing and erasing. The data storage system has a head which has one relatively long gap optimized for overwrite/erase capability and a separate shorter read-only gap optimized for reading high bit densities. The data storage system uses the flexible disk controller in its first mode for formatting and writing and in its second mode for reading. When the controller is being used in a perpendicular recording mode, the head design with the write section offset from the erase section requires extended formatted sector fields.

Abstract: An electronic connector for connecting a coaxial cable to a microstrip transmission line or to a coplanar transmission line. The connector has a transition length which is long enough to be treated as a transmission line rather than as a lumped element. In one embodiment, the transition is linear. In a optimal embodiment for minimal distortion, the transition follows a cosine shape.

Abstract: A mixed analog and digital integrated circuit with features which are especially useful for application as a front end for physiological signal instrumentation such as electrocardiographs, electromyographs, and electroencephalographs. The integrated circuit has 5 signal channels, each with analog amplification and analog to digital conversion. The channels can be configured for various combinations of input signal amplification, input signal summation, analog output driving, and AC impedance measurement. The integrated circuit has 2 digital serial input lines and 2 digital serial output lines, all designed for direct connection to optical couplers. Channel configuration, gain, and other parameters are externally controllable by a serial digital input signal. Up to 6 compatible devices can be serially connected in a chain.

Abstract: A computer network management software agent which includes the ability for users to add new user defined management objects. A user editable text file defines object identifications, object types, and the path and name of associated executable software. A user can then invoke user defined executable software at a managed node by sending a network command and a user defined associated object identifier to the agent in the managed node. Data can be sent between a user and user defined executable software. A timeout feature generates an error if commands are not completed within a user defined time.

Abstract: A tape drive control system with improved overall dam transfer rate. A streaming tape drive system for a multi-track serpentine data tape is controlled by a host computer. The data tape has a fixed number of data sectors per track. The host computer monitors tape position by observing data sector identification. The drive sends a ready/not-ready status signal to the host. The drive has a default mode. In the default mode, the drive generates an error signal if the host sends motor speed commands or head movement commands when the drive is sending a not-ready status. The host computer software can command the drive to enter a special mode. In the special mode, the drive does not generate an error if the host sends motor speed commands or head movement commands when the drive is sending a not-ready status.

Abstract: A configurable driver/termination circuit for use in a peripheral device connected to a computer input/output controller bus. The driver/termination circuit has the pull-up current source characteristics of a three-state driver and the pull-down current sink characteristics of a open collector driver. Logic circuit defines the operating mode. In a default mode, the driver/termination circuit can function in either open collector or three-state bus designs. The circuit mode is changed by command from a host computer to explicitly operate as an open collector driver/terminator, as a three-state driver, or as an inactive high impedance. Alternatively, peripheral devices automatically select the mode which minimizes data transmission errors.

Abstract: An apparatus and method for generating an index pulse by a data storage tape drive. The tape drive is controlled by a flexible disk controller. A multi-track tape is formatted into multiple data segments per track with erased areas between segments. A digital data signal from the tape signal processor is sampled to detect a lapse in data. Then, the analog data signal is continuously monitored to detect the reappearance of data. When filtered analog signal peaks exceed a fixed threshold, a pulse is generated from the tape drive to the flexible disk controller. In an alternative embodiment, to further protect against false triggering, index pulse generation is suppressed during most of each erased area between segments. In another embodiment, index pulse generation is suppressed if an erased area exceeds a length threshold, such as at the end of the tape. In still another embodiment, index pulse generation is suppressed if digital data reappears without triggering the analog monitoring circuit.