Patents Represented by Law Firm Banner, Birch, McKie & Beckett
  • Patent number: 5423294
    Abstract: A protective wall structure for protecting boiler tubing in facilities using refuse as a fuel source to produce steam for electrical power generation. The protective wall structure includes an array of shielding tiles, heat transfer bonding material, and elongated compressible material. The shielding tiles include a front surface facing the interior combustion zone of the facility, a rear surface facing the boiler tubes, and a plurality of sidewall surfaces. The heat transfer bonding material is positioned between the boiler tubes and the rear surfaces of the shielding tiles to permit heat transfer and create a bond between the boiler tubes and the shielding tiles. The elongated compressible material is positioned between the sidewall perimeter surfaces of adjacent shielding tiles to provide an expansion joint. This permits relative expansion between adjacent shielding tiles without cracking upon an increase in temperature in the interior combustion zone.
    Type: Grant
    Filed: December 3, 1993
    Date of Patent: June 13, 1995
    Assignee: Wheelabrator Environmental Systems, Inc.
    Inventors: Arthur W. Cole, Franklin A. Hamlyn, James D. Dougherty, John M. O'Sullivan
  • Patent number: 5424984
    Abstract: A read-write semiconductor memory comprises a first data input buffer which takes in external data and which has a pair of signal output nodes for outputting a pair of signals corresponding to the taken-in data, a pair of signal lines connected to a pair of signal output nodes of the first data input buffer, and second data input buffers which are connected to the pair of signal lines and which have internal data set according to the signals on the pair of signal lines.
    Type: Grant
    Filed: March 4, 1994
    Date of Patent: June 13, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yousei Nagahama, Kimimasa Imai
  • Patent number: 5423804
    Abstract: This invention relates to a process for incising the transverse carpal ligament in the hand for relief of the symptoms of carpal tunnel syndrome. More specifically, a process is disclosed in which incising energy, preferably laser energy, is introduced from under the ligament for transecting the transverse carpal ligament while permitting the surgeon to view the interface of transection. A probe, preferably attached to a pistol-type grip, includes at least one tube containing an optic viewing device (preferably fiber-optic), and a conduit for directing incising radiation for the ligament transection. The fiber-optic viewing device, energy conduit, and an optional suction tube commence at the pistol grip where they are connected to the requisite viewing device, energy source, and suction pump. The fiber-optic viewing device terminates at a sufficient distance from the pistol grip to permit extension from the insertion at the wrist to pass under the entire length of the transverse carpal ligament.
    Type: Grant
    Filed: February 16, 1994
    Date of Patent: June 13, 1995
    Assignee: Laserscope
    Inventor: Michael I. Kulick
  • Patent number: 5424990
    Abstract: There is provided a semiconductor memory with which the duty ratio of column selection lines can be raised as well as that of word lines so that the word lines and the column selection lines of the semiconductor memory may be subjected to a screening test along with the peripheral circuits under a same condition for all these components (in terms of electric field and time) while operating the peripheral circuits.
    Type: Grant
    Filed: December 30, 1993
    Date of Patent: June 13, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takashi Ohsawa
  • Patent number: 5424915
    Abstract: A power supply device includes power semiconductor devices generating Joule's heat by themselves and circuit components generating no considerable heat by themselves but, as a group, generate a slight rise in temperature, which are included in a power supply circuit of the device. A structure is arranged to forcibly cool these semiconductor devices and circuit components by partitioning the interior of a housing of the Dower supply device to form a passage for an air flow, providing the housing with inlet and outlet openings for the air flow and providing the passage with a ventilating fan.
    Type: Grant
    Filed: June 10, 1994
    Date of Patent: June 13, 1995
    Assignee: Sansha Electric Manufacturing Company, Ltd.
    Inventors: Masao Katooka, Yoshimasa Kawashima, Makoto Sakurada, Atsushi Makitani
  • Patent number: 5421556
    Abstract: A plastic fence post and cap are secured to each other by a spring tab arrangement which is completely concealed after assembly. In one embodiment, a bottom section of the cap fits over the end of the post and tabs projecting inwardly from opposed panels of the bottom section extend into holes extending through opposed sides of the post. In a second embodiment, a bottom part of the cap is received within the tubular post and has outwardly extending tabs that spring into recesses provided along inner sidewall surfaces of the post.
    Type: Grant
    Filed: March 2, 1993
    Date of Patent: June 6, 1995
    Assignee: Associated Materials Inc.
    Inventors: Mark E. Dodge, Michael A. Fiume, Brian K. McGarry
  • Patent number: 5422133
    Abstract: An edible material comprising partially gelled mannan paste prepared by adding an alkali to a mass of mannan paste to cause gelation thereof to proceed, and adding an acid to said mannan paste thereby to suppress the gelation of said mannan paste. The material has a high degree of affinity for fish meat protein paste or gel.
    Type: Grant
    Filed: June 22, 1993
    Date of Patent: June 6, 1995
    Assignee: Sugiyo Co., Ltd.
    Inventors: Iwao Yamamoto, Yamamoto Norihiko, Yoshito Sugino
  • Patent number: 5422843
    Abstract: A method of this invention is applied to a nonvolatile memory device composed of first memory cells connected to one of a first word-line pair and second memory cells connected to the other of the first word-line pair, and a single source shared by the first memory cells and the second memory cells. First, a positive potential of, for example, 5 V is applied to the source, a negative potential of, for example, -10 V is applied to the one of the word-line pair, and the ground potential to the other of the word-line pair. This permits electrons to move from the floating gate of the first memory cells into the source, with the result that the erasing of information is achieved. Next, the positive potential is applied to the source, the negative potential is applied to the other of the word-line pair, and the ground potential to the one of the word-line pair.
    Type: Grant
    Filed: September 20, 1993
    Date of Patent: June 6, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Seiji Yamada
  • Patent number: 5422951
    Abstract: A low profile telephone set which may be used as a table type model or as a wall mount-type model. The telephone set includes a casing and a holder. The casing is formed with a front bottom surface and a back bottom surface forming a predetermined angle there between. The holder is secured to the front bottom surface or back bottom surface in a designated direction depending on the manner of usage.
    Type: Grant
    Filed: October 6, 1993
    Date of Patent: June 6, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiya Takahashi, Katsumi Itoyama, Kouichiro Suda, Yoshio Fujinami
  • Patent number: 5420528
    Abstract: An IC is divided into four circuit blocks. These four circuit blocks have the same function. While one of the circuit blocks is not functioning, a mode setting circuit generates mode control signals for selecting a mode in which the operation frequency of the circuit block is set lower than in a normal operation mode. A main control circuit controls the entire operation of the IC, and generates clock signals for defining the operations of the circuit blocks. Sub-control circuits are arranged so as to correspond to the circuit blocks and receive their respective mode control signals and clock signals. Upon receiving the mode control signals, the sub-control circuits controls their corresponding circuit blocks as to whether the circuit blocks are operated in the normal operation mode or at a frequency lower than that in the normal operation mode.
    Type: Grant
    Filed: May 4, 1994
    Date of Patent: May 30, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hiroshi Shigehara
  • Patent number: 5420462
    Abstract: An element separating oxide film is formed on a P-type semiconductor substrate by means of a selective oxidation method, and then a gate oxide film is formed on the element separating oxide film by a thermal oxidation method. A gate electrode film made of an N-type polysilicon material is formed so as to extend along a step portion of the element separating oxide film on the semiconductor substrate. The upper surface of the gate electrode film is flattened by means of a surface polishing method. Then, isotropic etching is performed by using a resist pattern as a mask, thereby forming a gate electrode. Since in the method the upper surface of the gate electrode film in the flattened, the semiconductor substrate is prevented from being subject to over-etching when a gage electrode is formed, so that the changes of characteristics of MOS transistors are prevented whose gate insulative films have been becoming thinner as their elements have been finer.
    Type: Grant
    Filed: April 12, 1994
    Date of Patent: May 30, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Akira Sudo
  • Patent number: 5420177
    Abstract: A method for producing colored and exactly spherical fine-grains of polymer by carrying out the suspension and polymerization of ethylenic unsaturated monomers containing a pigment in water under the presence of a suspension stabilizer, wherein an inorganic pigment treated with silane-coupling agent is used as said pigment. According to the present invention, the pigments are homogeneously dispersed in said exactly spherical fine-grains of polymer and a loss of color is prevented.
    Type: Grant
    Filed: July 19, 1993
    Date of Patent: May 30, 1995
    Assignee: Dainichi Seika Color & Chemicals Mfg. Co., Ltd.
    Inventors: Ken Ohkura, Yukio Shinagawa, Tamiaki Shibata
  • Patent number: 5420074
    Abstract: In a method for burying a contact hole according to the present invention, first, a polycrystalline silicon film is formed on a region including a contact hole. Impurities are introduced into the polycrystalline silicon film. Next, a metal film is formed on the polycrystalline silicon film. Next, a polycrystalline silicon film is formed on the metal film. Impurities are introduced into the polycrystalline silicon film. Next, a metal film is formed on the polycrystalline silicon film. A polycrystalline silicon film is formed on the metal film, and the contact hole is completely buried. Thereafter, a heat treatment is performed, thereby the impurities are diffused to the above two polycrystalline silicon films and all or a part of the metal film is changed to a metal silicide film. Next, an etchback is performed, thereby the polycrystalline silicon film and the metal silicide film are kept in only the contact hole.
    Type: Grant
    Filed: September 8, 1994
    Date of Patent: May 30, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoich Ohshima
  • Patent number: 5420263
    Abstract: A human gene has been discovered which is genetically altered in human tumor cells. The genetic alteration is gene amplification and leads to a corresponding increase in gene products. Detecting that the gene, designated hMDM2, has become amplified or detecting increased expression of gene products is diagnostic of tumorigenesis. Human MDM2 protein binds to human p53 and allows the cell to escape from p53-regulated growth.
    Type: Grant
    Filed: April 7, 1993
    Date of Patent: May 30, 1995
    Assignee: The Johns Hopkins University
    Inventors: Marilee Burrell, David E. Hill, Kenneth W. Kinzler, Bert Vogelstein
  • Patent number: 5420816
    Abstract: According to this invention, a semiconductor apparatus includes a word line group consisting of four word lines, a bit line pair group, word line drive circuits, arrangement patterns of which are alternately inverted, for outputting boosted word line signals to the word line group, and memory contact portions provided to the bit line pair group in a 1/4-pitch system, wherein output terminals of the word line drive circuit having an inverted arrangement pattern are connected to memory cells so as to be aligned in the same order as in output terminals of the word line drive circuit having a non-inverted arrangement pattern.
    Type: Grant
    Filed: August 31, 1994
    Date of Patent: May 30, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaki Ogihara, Syuso Fujii
  • Patent number: 5419482
    Abstract: The invention relates to a soldering apparatus comprising: a vessel for liquid solder; at least one soldering tower placed in the vessel for causing liquid solder to leave the soldering tower on the upper side, wherein the soldering tower is adapted to cause the liquid solder to run off on all sides; a conveyor for carrying objects for soldering along the top side of the soldering tower such that the objects for soldering come into contact with the liquid solder; and a cover for maintaining an atmosphere with a reduced oxygen content at least in the surrounding area of the liquid solder.
    Type: Grant
    Filed: December 30, 1993
    Date of Patent: May 30, 1995
    Assignee: Soltec B.V.
    Inventor: Adrianus J. M. Hendrikx
  • Patent number: 5420640
    Abstract: A receiver is provided for receiving a digital data stream over a communication path. The digital data is arranged as a sequence of frames, each frame including a plurality of lines of data. The beginning of each frame is indicated by a frame synchronization word; the beginning of each line is indicated by a horizontal synchronization byte. The data is interleaved by an encoder prior to transmission. The decoder contains circuitry for locating the horizontal and frame synchronization data and contains circuitry for deinterleaving the digital data. Both the synchronization locating circuitry and the deinterleaving circuitry require access to a memory, but not at the same time. Therefore, a single memory is used with the synchronization recovery circuitry and deinterleaving circuitry alternately addressing the memory.
    Type: Grant
    Filed: December 3, 1993
    Date of Patent: May 30, 1995
    Assignee: Scientific-Atlanta, Inc.
    Inventors: Randy K. Munich, Tsai Lo, Paul D. Nicholas
  • Patent number: D359034
    Type: Grant
    Filed: January 12, 1994
    Date of Patent: June 6, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Osamu Kondo
  • Patent number: D359113
    Type: Grant
    Filed: April 6, 1994
    Date of Patent: June 6, 1995
    Assignee: Jason International, Inc.
    Inventor: Remo Jacuzzi
  • Patent number: D359286
    Type: Grant
    Filed: January 26, 1994
    Date of Patent: June 13, 1995
    Assignee: DX Antenna Company, Limited
    Inventor: Yoshio Fujino