Patents Represented by Law Firm Banner, Birch, McKie & Beckett
  • Patent number: 5393849
    Abstract: A thermosetting composition comprising the combination of an unsaturated polyester resin and a polyamino compound having a plurality of secondary or primary amino moieties.
    Type: Grant
    Filed: October 19, 1993
    Date of Patent: February 28, 1995
    Assignee: Georgia-Pacific Resins, Inc.
    Inventors: Ramji Srinivasan, Ted M. McVay, David A. Hutchings
  • Patent number: 5392915
    Abstract: A stackable and nestable crate apparatus particularly adapted for the transport and storage of easily breakable products, such as potato chips, or the like, includes an open topped container body of unitary molded plastic construction. A lid extends across the open top of the container body and is mountable thereon at various selected elevations to vertically support an overlying, stacked crate apparatus at a level suitable for the size of the product housed within the supporting crate apparatus. The front and rear walls of the container body are appropriately recessed to permit relative sliding movement between adjacent, stacked crates. The peripheral dimensions of the lid are correlated with respect to those of the interior of the container body to enable ready access to the product within a crate apparatus when slidably extended from the stack and to permit the lid, when rotated, to be readily received within the container body in order to accommodate nesting of empty crates.
    Type: Grant
    Filed: September 3, 1993
    Date of Patent: February 28, 1995
    Assignee: Rehrig-Pacific Company, Inc.
    Inventor: Jonathan Kalin
  • Patent number: 5393910
    Abstract: A method is described for the preparation of an isocyanatoorganosilane by an elevated temperature thermally induced decomposition of a carbamatoorganosilane in the gas phase preferably under ambient or reduced pressure.
    Type: Grant
    Filed: October 20, 1993
    Date of Patent: February 28, 1995
    Assignee: OSi Specialties, Inc.
    Inventors: Jeffrey Y. P. Mui, Mark P. Bowman
  • Patent number: 5394077
    Abstract: A boosting circuit generates an internal high voltage of a level higher than that of an internal voltage which is used in a semiconductor memory device. The boosting circuit has an output end connected to a capacitor having a large capacitance, and this capacitor is charged to an internal high voltage. The output end of the boosting circuit is connected to a drain of an N-channel transistor. This transistor has a gate which is supplied with a voltage V.sub.G higher than the internal voltage by a difference equivalent to a threshold voltage of the transistor. The internal voltage is outputted from a source of the transistor. When a skew occurs and the internal voltage is lowered while an address signal is changed, the internal high voltage charged in the capacitor is discharged through the transistor and the internal voltage is thus stabilized.
    Type: Grant
    Filed: March 17, 1994
    Date of Patent: February 28, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shigeru Atsumi
  • Patent number: 5394001
    Abstract: Field oxide films are formed on a semiconductor substrate of first conductivity type to be spaced from each other in the stripe shape. Gate insulating films are formed on the semiconductor substrate between the field oxide films. Word lines or control gate electrodes are formed on the field oxide films and the gate insulating films to be spaced from each other in the stripe shape along a direction perpendicular to the field oxide films. Grooves are formed in the gate insulating films and the field oxide films in regions sandwiched by the word lines. Source regions of second conductivity type are formed in the semiconductor substrate in the grooves formed in the gate insulating films. A common source wiring region of second conductivity type for electrically connecting the respective source regions is formed in the semiconductor substrate in the grooves formed in the field oxide films.
    Type: Grant
    Filed: May 25, 1993
    Date of Patent: February 28, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiko Yamaguchi, Yoichi Ohshima
  • Patent number: 5394111
    Abstract: In an operational amplifier circuit, noise is lowered by using junction FETs as an input transistor pair, and an input operating point and an output operating point can be set at different potentials by connecting a capacitor between an output terminal and an inverting input terminal. For this reason, the operational amplifier circuit can be properly biased and can be operated at a low power supply voltage. In addition, since transistors other than transistors used as constant current sources are constituted by bipolar transistors, the operational amplifier circuit can have wideband frequency characteristics.
    Type: Grant
    Filed: December 23, 1992
    Date of Patent: February 28, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro Tsuji, Masayuki Sahoda
  • Patent number: 5392535
    Abstract: A closed loop fastening system for running and other shoes. The fastening system includes a harness, a strap, guides and a tension lock buckle. The harness includes strap portions which can tightly retain a user's foot inside the shoe. The guides are attached to the harness for guiding the strap. One end of the strap is attached to the harness and the other end of the strap is attached to the buckle. An effective length of the strap can be defined such that a shorter effective length yields a tighter harness and a fighter fit, and a longer effective length yields a looser harness and a looser fit. The tension lock buckle used in the closed loop fastening system is adaptable for use with numerous other products having a strap. The tension lock buckle includes a body, a pivotal locking member and a sliding bar. The sliding bar is mounted within the body for longitudinal movement therein. The pivotal locking member is pivotally attached to the body for relative pivotal motion.
    Type: Grant
    Filed: April 20, 1993
    Date of Patent: February 28, 1995
    Assignee: Nike, Inc.
    Inventors: Allen W. Van Noy, Perry W. Auger
  • Patent number: 5392253
    Abstract: A nonvolatile semiconductor memory device is provided in which a negative voltage is applied to a gate electrode of a memory cell transistor during an erase mode. The memory device includes a row decoder circuit having an N-channel transistor connected to a word line. The N-channel transistor is provided on a P-type well region of a semiconductor substrate. A negative voltage is applied to the P-type well region during the erase mode, while ground potential is applied thereto during another modes.
    Type: Grant
    Filed: July 24, 1992
    Date of Patent: February 21, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeru Atsumi, Sumio Tanaka
  • Patent number: 5391340
    Abstract: A coated panel formed from a self-supporting cellulosic substrate and a top coating containing a thermoset resin having about 0.1-1.5 wt % free formaldehyde admixed with said resin; and (b) a thermoplastic polymer thoroughly admixed with said resin, wherein said thermoplastic polymer exhibits amine groups capable of reacting with at least some of the free formaldehyde under resin curing conditions. The coated panel can be embossed with decorative patterns such as wood grain without fracture of the coated surface or significant buildup on the press or embossing die surfaces.
    Type: Grant
    Filed: June 25, 1993
    Date of Patent: February 21, 1995
    Assignee: Georgia-Pacific Resins, Inc.
    Inventors: George E. Mirous, Bernard E. Sullivan
  • Patent number: 5391939
    Abstract: A output circuit of a semiconductor integrated circuit comprises a prebuffer circuit, an output buffer circuit comprising first and second output buffer circuits for receiving the output of said prebuffer circuit, said first output buffer circuit comprising a CMOS inverter having its input terminal connected to the output terminal of said output buffer circuit and its output terminal connected to an output terminal, said second output buffer circuit comprising MOS transistors for electrically charging or discharging said output terminal and capacitances, the output of said prebuffer circuit being supplied to the gates of the MOS transistors through the respective capacitances. Such an output circuit can effectively reduce simultaneous switching noise without deteriorating its load driving capability.
    Type: Grant
    Filed: August 28, 1992
    Date of Patent: February 21, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Satoshi Nonaka
  • Patent number: 5392463
    Abstract: A power amplifier used in a mobile radio apparatus operated selectively in an analog mode and a digital mode comprises an amplifying circuit for saturation-amplifying and linear-amplifying a speech signal and a switch for selectively switching the amplifying circuit to a saturation amplification and a linear amplification in accordance with the analog mode and the digital mode.
    Type: Grant
    Filed: October 16, 1991
    Date of Patent: February 21, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tatsuya Yamada
  • Patent number: 5390453
    Abstract: This invention is concerned with roofing structures utilizing a structural member formed from sheet metal to hollow triangular cross-section with a longitudinally extending outwardly opening narrow mouthed channel forming a peak along the member. The opposite end of the member will have outwardly projecting flanges around which may be engaged bent edges to a base plate. The channel is adapted to enable cladding sheets to have their edges engaged therein and thus provide a drip free roof.
    Type: Grant
    Filed: December 28, 1992
    Date of Patent: February 21, 1995
    Inventor: Dalmain Untiedt
  • Patent number: 5388570
    Abstract: A cabinet housing CPR masks and non-sterile hypoallergenic latex gloves is mounted on a wall in a visible location. A plastic tie seal maintains the cabinet door closed. In the event of a CPR emergency, the seal is pulled, twisted and thereby broken, the door opened and the mask and gloves removed. When the door is opened, a lever switch on the cabinet automatically activates a loud piezo buzzer mounted on top of the cabinet, thereby alerting others to the emergency. The buzzer can be deenergized with a key-activated switch.
    Type: Grant
    Filed: December 3, 1993
    Date of Patent: February 14, 1995
    Inventor: Joseph D. Wassil
  • Patent number: 5389716
    Abstract: A binder composition for fibrous mats, preferably inorganic fibrous mats, which is fire resistant when cured is provided. The binder composition comprises a stable mixture of an aqueous aldehyde condensation polymer-based resin, a fire retardant latex and, optionally, an effective amount of an aqueous silica colloid, wherein the weight ratio of the latex to the resin is at least 1:1 on a non-volatile weight basis. The effective amount of the silica colloid is an amount sufficient to enhance the flame resistant property of the binder composition after curing and yet remain compatible with the components of the binder composition prior to curing.
    Type: Grant
    Filed: June 26, 1992
    Date of Patent: February 14, 1995
    Assignee: Georgia-Pacific Resins, Inc.
    Inventor: Larry R. Graves
  • Patent number: D355755
    Type: Grant
    Filed: January 19, 1994
    Date of Patent: February 28, 1995
    Assignee: Nike, Inc.
    Inventor: Bruce J. Kilgore
  • Patent number: D355764
    Type: Grant
    Filed: March 18, 1993
    Date of Patent: February 28, 1995
    Assignee: Rehrig Pacific Company, Inc.
    Inventor: William P. Apps
  • Patent number: D355902
    Type: Grant
    Filed: June 29, 1993
    Date of Patent: February 28, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masaaki Iino
  • Patent number: RE34867
    Abstract: CLAIMThe ornamental design for an air conditioner, as shown and described.DESCRIPTIONFIG. 1 is a front, top and right side perspective view of an air conditioner showing our new design, with the louver in opened position and the control panel cover in opened position.[...]. .Iadd.; .Iaddend.FIG. 2 is a front elevational view thereof with the louvre and control panel cover in closed position;FIG. 3 is a rear elevational view of FIG. 2;FIG. 4 is a top plan view of FIG. 2;FIG. 5 is a left side elevational view of FIG. 2, the right side being a mirror image of that shown; .Iadd.and, .Iaddend.FIG. 6 is a bottom plan view of FIG. 2.
    Type: Grant
    Filed: October 14, 1993
    Date of Patent: February 28, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shusuke Yamazaki, Yoshinori Katagami, Tomoyasu Shinozaki
  • Patent number: D355977
    Type: Grant
    Filed: May 31, 1994
    Date of Patent: March 7, 1995
    Assignee: Nike, Inc.
    Inventor: Tracy L. Teague
  • Patent number: D356070
    Type: Grant
    Filed: April 27, 1993
    Date of Patent: March 7, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masaaki Iino