Abstract: Switch contacts are monitored by a computer for change of status (open or closed) without polling them. The apparatus comprises an input port module and up to eight switch reader modules, with 128 switch contacts to each. The input port module has four Z80 PIOs providing a total of eight ports for the switch reader modules, and a S-100 bus to the computer. In each switch reader module, in a RUN mode, the operation is to address the switch contacts sequentially and via a latch to load the status as data into a 128-bit shift register, and then to compare the current and previous states represented by the inputs and outputs of the shift register. If the switch contact being addressed has changed state, the comparator generates an interrupt to the processor. At the same time that an interrupt is generated, a scan inhibit command is supplied from a comparator to stop a clock. Data from an address counter and the latch are supplied via the input port module to the processor.

Abstract: An engineer, who is monitoring signals on oscilloscopes, can use one of a set of pushbuttons to select a specific channel for further monitoring on one or more other instruments. The switching network is controlled by a microprocessor and is designed to route any one of N (36) incoming analog signals to one of M (3) instrumentation inputs. The switching network is essentially M independent N-to-1 analog multiplexers comprising relays designed to function as a single system. The microprocessor insures that only one analog signal at a time can be selected for a single instrumentation channel, while permitting a signal to be simultaneously used on any or all of the remaining instrumentation channels. A second contact on each relay provides a signal to tell if the selected relay is energized.

Abstract: The processor is optimized for high-speed processing of large vectors, to fully utilize VHSIC technology, and to implement a signal processor having the highest possible throughput per volume while maintaining flexibility. It includes a 25 MHz embedded 1750A computer for performing control function scalar operations and set-up of vector signal processing instructions to be performed by a vector processing unit. The 40 MHz vector processing unit (VPU) performs high speed processing of real and complex vectors. The VPU's control portion provides an interface and status to the embedded 1750A computer. It also provides the control necessary for vector processing to occur concurrently with 1750A execution and concurrent with I/O of vector data.

Abstract: This invention is directed to a three-terminal semiconductor device which acts as a differential light detector. It is based on the operation of two reverse biased PIN photodetectors where one receives light through its P-doped surface and the other through its N-doped surface. The device is configured to be compatible with applications in integrated optics and with fiber optics. In principle of operation the invention relies on the production and collection of electrons from the detection of a first light intensity and the production and collection of holes from the detection of the intensity of a second light. This is done in a connected or integrated semiconductor which allows the recombination of electrons and holes. The excess number of electrons or holes, depending upon which light is received with the greatest intensity, is extracted from the recombination region and is the basis for the output signal.

Abstract: The standard interface unit (SIU) is used with the AF-EWES Threat Radar Simulator which selects the best ECM (electronic countermeasure) techniques to counter threats such as surface-to-air missiles (SAM's) and anti-aircraft artillery (AAA). The SIU comprises three modules: (1) Serial Bidirectional Party Line (SBPL) Monitor (2) Acquisition Subsystem Interface Unit (ASSIU) and (3) Multiplex Terminal Unit (MTU). The SBPL Monitor accepts data in serial format and converts it to a parallel format for storage in one of two buffers. The data in storage is next sent to the ASSIU which also has a double buffer set-up for storage of data on a FIFO basis. The data is then transferred to the MTU for reformatting into MIL-STD-1553B, and shipped out serially.

Abstract: Liquid hydrogen is used to completely cool all elements of the generator including bearings, stator conductor, rotor conductor, magnetic flux shield, and excitation mechanisms. By essentially immersing the generator in liquid hydrogen, cryogenic interface problems are minimized. The conductor windings will utilize pure metals such as aluminum to minimize the weight and the ohmic heat loss in the machine. Complications of liquid helium cooling for superconducting windings and quench phenomena due to thermal instabilities in the superconductors are eliminated. The use of extremely low resistance of liquid hydrogen cooled aluminum permits heat removal in the confined space of the rotor field winding at magnetic field and current density that can exceed that of superconductors. Because iron is not required in the generator, very high voltages can be generated.

Abstract: A film is disclosed which will accommodate high shear strain in a rigidly supported epoxy impregnated Nb.sub.3 Sn superconducting coil (SCC). In a generator application the SCC is subjected to a combined load due to differential thermal contraction, magnetic, and centrifugal forces. These strains could lead to coil fracture and resulting degradation of the field and current-carrying properties. A low modulus material at the interface between the SCC and support structure will reduce or distribute the shear strain to an acceptable level, i.e., no degradation in current carrying properties. Two film materials, polyethylene terephthalate Mylar (DuPont Chemical) and polycarbonate Makrofol KG (Mobay chemical) are disclosed as suitable damping or interface films. An adhesive such as the polyurethane Bostik 7070 is used for affixing the film to the winding surface.

Abstract: The conductor contains high-purity aluminum embedded in an aluminum-iron-cerium alloy matrix. It is not superconducting but still has extremely low electrical resistance at service temperatures. Selection of the aluminum-base alloy matrix with diffusionless alloying elements (iron and cerium) allows production of a multifilamentary conductor with the aluminum filaments maintaining their original high purity and consequently their very low electrical resistivity, even after a high temperature annealing cycle is applied. The composite conductor has good properties for both electromagnetic and thermal diffusion, which are critical to high-power, fast-pulse operation.

Abstract: The maintenance port system includes a maintenance unit, user prom, an available CRT terminal, and a prom software development package. This system accepts parametric definitions for an automatic panel as defined by the designer, and formats the panel data for display and modification on a CRT (cathode ray tube) terminal. Because the system controls the formats, standard display and modification procedures are then used for transmitting and receiving parameters and are the same from panel to panel.

Abstract: The arithmetic pipeline processor (which is used for computer graphics such as a flight simulator) is a group of boards capable of solving an equation of the formA.sup.m B.sup.n +C.sup.o D.sup.P +E.sup.q F.sup.r +G.sup.s H.sup.twhere A, B, C, D, E, F, G, H are 32-bit implied one floating point numbers, and m, n, o, p, q, r, s, t can take on the values 1/4, 1/2, 1, 2 and 0. It includes a digital logarithmic calculator using shifters and stored tables to perform arithmetic functions such as multiplication, division, squares, square roots, and fourth roots. It comprises two input ports each capable of receiving digital data N bits wide. Included are a log transform unit, a log sum or difference unit and an antilog unit. Following these is an M-bit Aritmetic Logic Unit (ALU) and circuitry for converting between fixed point and floating point numbers. It uses piece wise linear approximation in conjunction with stored slope information in tables to do the transform calculation of logarithms and antilogarithms.

Abstract: A "Spacercore" design is used to provide the cores of the electromagnets which are used to bias ferrite slabs in phase shifters of a high power RF attenuator. The phase shifters require a given flux to provide a phase shift from zero to 90.degree.. With laminations of high permeability silicon steel, the core weight may be substantially reduced by including a filler comprising spacers of non-magnetic material (such as lightweight transformer pressboard. With 14-mil silicon steel laminations and 64-mil spacers, this construction provides a core which weighs 25 percent of a full ferrite core for the same flux density.

Abstract: The structure is material such as a ceramic in the form of a bundle of open cells, a "honeycomb", with the shape of the cells corresponding to the shape of the openings desired in the grid. The cathode is formed in the cells, rather than adding the grid to a ready-made cathode. The grid is formed by coating the end of the cell walls with a conducting material (metal and/or carbon). The surface of the cathode is suitably recessed from the grid.

Abstract: A novel form of waveform coding is used, designated a "Critical Point Coder" (CPC). It operates by transmitting only those points in a waveform which are significant for defining its overall structure. The receiver reconstructs the missing points in the waveform using some sort of approximating interpolation. The Critical Point Coder uses a new approach to waveform coding. Rather than transmitting information about each sample as other waveform coders, the Critical Point Coder transmits information for only samples deemed critical to high quality reconstruction. The four major functions performed by the Critical Point Coder are (1) detecting which samples are critical, called critical points e.g.

Abstract: An interface module and associated software connect a broad range of computer systems to a real time local area network. It connects to a host computer system that needs only to use parallel data input/output ports in order to communicate with the module. Hardware on the interface module accomplishes transmitting data to and receiving data from the local area network, all of these transfers of data being via a buffer memory. The interface module is capable of transmitting and receiving serial data at a rate of ten megabits per second, can store approximately 14 kilobytes of this data internally in the buffer memory, and can then transfer the data to or from a host computer system at a rate of 16 bits every 719 nanoseconds. A graphics processor is used to drive real-time graphics displays in the cockpit of a simulator and the module of this invention interfaces the graphics processor to a minicomputer.

Abstract: The low pressure gas-filled thyratron is scalable in the long dimension. Internally the tube is formed as a tetrode, with an auxiliary grid placed between the cathode and the control grid. A DC or pulsed power source drives the auxiliary grid both to insure uniform cathode emission and to provide a grid-cathode plasma prior to commutation. The high voltage holdoff structure consists of the anode, the control grid and its electrostatic shielding baffles, and a main quartz insulator. A small gas flow supply and exhaust system is used that eliminates the need for a hydrogen reservoir and permits other gases, such as helium, to be used. The thyratron provides a low inductance, high current, long lifetime switch configuration; useful for switch-on applications involving large scale lasers and other similar loads that are distributed in a linear geometry.

Abstract: An up-down counter is fed pulses generated manually and/or automatically from either or any of two or more command sources. Gating circuitry ahead of the up-down counter may be used to enable counts from only one source at a time. The output of the counter represents the magnitude of the parameter to be controlled. The purpose is to transfer control of a parameter to any of several command sources without changing the value of the parameter, thereby achieving "stepless" switching. Only one counter is needed regardless of the number of command sources, no synchronizing circuitry is required, and switching is provided with no steps or delays. Multiple command sources may be active simultaneously when command source input gating is not used ahead of the up-down parameter magnitude counter.

Abstract: The rotor suspension electronics of an electrostatic gyro suspension system is required to perform flawlessly to sustain the life of the gyro. Transient abnormalities as short as one millisecond duration will cause the spinning rotor to come in contact with the surrounding electrodes and result in destruction of the gyro. Thus, not infrequently after a catastrophic dropped rotor incident no trace of the fault is evident upon ensuing check of the system. To remedy this problem a built in test (BIT) system is used to provide fault isolation. The test circuitry is built into the navigation system electronics and integrated with the system program. The fault isolation electronics comprise sensor circuits to monitor functional subdivisions of the electronic suspension system for signal abnormality and a processing circuit which receives the sensor circuit outputs and identifies the primary source of the fault. The faults are detected and the source is flagged at the time of occurance.

Abstract: To realize a depletion-mode modulation-doped field-effect transistor with high gate-length to depletion-depth ratio that is capable of providing high power gain at millimeter-wave frequencies, an ohmic gate or a heterojunction gate is used on the n-AlGaAs/GaAs layered structure, replacing the prior art Shottky-barrier metal gate. The depletion-mode operation is desirable for analog signal amplifying circuits as opposed to the enhancement-mode device commonly used for switching or digital circuits. In the case of Schottky-barrier gate, high aspect ratio structures naturally operate in the enhancement mode, hence the need for the change in the gate electrode structure.

Abstract: An improved performance MESFET device incorporating a structure fabricated utilized self-aligned gate process technology. The edges of the gate electrode formed are separated from the edges of the dopant regions implanted in the device substrate by a distance which optimizes device performance. In order to increase process yield, a layer of dielectric material is deposited on the substrate surface and then annealed to protect the gate electrode and both stabilize and planarize the substrate surface.

Abstract: The headset system utilizes the theory that unique sound waves can be added or subtracted without loss of information to attenuate the noise at the ear and mouthpiece, without lowering the noise level of the environment. This allows for clearer reception and transmission of communication. The system includes a directional microphone mounted on a headset/helmet, isolated from both voice and earphone output, level-setting and frequency tailoring circuits, and voltage summers and amplifiers. The microphone picks up the ambient noise, and the level-setting and frequency tailoring circuits produce a close approximation of the noise at the ear and mouthpiece (i.e., two separate matching circuits). This signal is then inverted (using an inverting buffer) to provide destructive interference.