Abstract: A characterized cell library for EDA tools includes one or more mathematical models for each cell, and one or more preconditioning functions (and/or inverse preconditioning functions) for each mathematical model. Each mathematical model represents a performance parameter (e.g., delay, power consumption, noise) or a preconditioned performance parameter of the cell. The preconditioning functions convert an operating parameter (e.g., input slew, output capacitance) associated with the performance parameter into a preconditioned input variable for the mathematical models. In doing so, the preconditioning functions allow for more accurate modeling of complex data relationships without increasing the complexity (e.g., order and number of coefficients) of the mathematical models.

Abstract: A method for decoding an LDPC (low-density parity check) code word. The method includes receiving a plurality of LLR (log likelihood ratio) terms from a demodulation unit of a receiver and generating a scaling factor in accordance with at least one parameter descriptive of communication channel conditions for the receiver. The scaling factor is applied to each of the plurality of LLR terms to compute a corresponding plurality of scaled LLR terms. An iterative layered belief propagation algorithm is then executed by using the plurality of scaled LLR terms to generate decoded information.

Abstract: A configurable transmitter for a wireless communication system may include a flexible block coder, an IFFT block, an analog and RF block, and an antenna coupled in series. The flexible block coder may advantageously perform forward error correction and mapping of a data stream to generate a processed data vector. To perform these functions, the flexible block coder may include a data formatter and a multiplier. The data formatter may format the data stream into an output vector, whereas the multiplier may multiply the output vector by a configurable channel coding matrix to generate the processed data vector. The size of the output vector may be a reflection legacy compatibility and data rate. The size of the processed data vector is equal to a product of the output vector and an inverse of a coding rate. The channel coding matrix may be compressed.

Abstract: A CMOS image sensor uses a special exposure control circuit to independently adjust the photodiode exposure (integration) time for each pixel in a pixel array to obtain non-saturated photodiode charges for each pixel. Exposure time adjustment involves extrapolating a pixel's final photodiode charge using an intermediate photodiode charge measured after a predetermined portion of an exposure frame period. If the intermediate photodiode charge is, e.g., over 50% of the photodiode's full-well capacity after half of the exposure frame period, then saturation is likely and the photodiode is reset to integrate only during the remaining time. If not, then the photodiode integrates over the allotted exposure frame period. Data indicating the length of the exposure portion is stored as analog data on the memory node of each pixel, and readout of the final photodiode charge is performed using Correlated Double Sampling (CDS) techniques.

Abstract: A method of controlling a main fluid in a conduit using a microvalve is described. The microvalve includes a corresponding actuation aperture in an actuation aperture layer. A control fluid flows through the actuation aperture in response to an electric field applied via a charge distribution near an actuation aperture layer. In one embodiment, the electric field may adjust the opening and closing of the actuation aperture thereby controlling the flow of the control fluid. In a second embodiment, the control fluid is an electrorheological fluid where the electric field controls the viscosity of the ER fluid, thereby controlling fluid flow through the actuation aperture. In both embodiments the flow of the control fluid controls stretching of a flexible membrane into and out of the conduit, thereby controlling the flow of the main fluid by opening or closing the conduit.

Abstract: A high sensitivity GPS receiver includes an acquisition engine and a tracking engine. The acquisition engine processes GPS satellite data at data rate that is substantially equal to twice the coarse acquisition (CA) code chip rate. This data rate advantageously enables the acquisition engine to process GPS satellite data with relatively less hardware area than traditional GPS acquisition approaches. In one embodiment, the high efficiency acquisition engine may be over-clocked, thereby allowing different phases of a CA code to be correlated quickly. The tracking engine can advantageously processes GPS satellite data at a data rate that does not have an integer relationship to the CA code chip rate.

Abstract: Through the use of a multi-step sweep, the present invention is capable of increasing the speed and improving the error resistance of a signal alignment. In a specific embodiment of the invention, a method for the signal alignment of a target signal and an adjustable signal is disclosed. The target signal is sampled using three or more phase shifted versions of the adjustable signal to obtain a group of target signal state values. Next, through reference to the group of target signal state values it is determined that an edge of the target signal lies between a first phase shifted version and a second consecutive phase shifted version. In response, the first phase shifted version is selected as the starting point for a second sweep. During the second sweep, the phase of the first phase shifted version is sequentially adjusted in relatively small incremental steps to minimize the phase difference relative to the target signal.

Abstract: Techniques are disclosed for detecting a packet. One technique includes sampling a received signal to produce a sequence of samples wherein the sequence of samples includes a plurality of subsequences of samples; cross correlating the subsequences of samples with a known form of the subsequence to produce cross correlations; self correlating the cross correlations to produce a plurality of self correlations; summing the self correlations; and processing the sum of the self correlations.

Abstract: A modified coffee-stain method for producing self-organized line structures and other very fine features that involves disposing a solution puddle on a target substrate, and then controlling the peripheral boundary shape of the puddle using a control structure that contacts the puddle's upper surface. The solution is made up of a fine particle solute dispersed in a liquid solvent wets and becomes pinned to both the target substrate and the control structure. The solvent is then caused to evaporate at a predetermined rate such that a portion of the solute forms a self-organized “coffee-stain” line structure on the target substrate surface that is contacted by the peripheral puddle boundary. The target structure is optionally periodically raised to generate parallel lines that are subsequently processed to form, e.g., TFTs for large-area electronic devices.

Abstract: A multi-mode redundancy removal method is provided. In this method, after accessing the design, a full-scale redundancy removal using fault simulation can be started. When a predetermined period for performing the full-scale redundancy removal has reached a first cut-off, then the method can determine a location for temporary outputs of the design, create the temporary outputs, and perform a localized redundancy removal up to the temporary outputs. An optimized design based on the full-scale redundancy removal and the localized redundancy removal can be output.

Abstract: A precharacterized cell library for EDA tools includes driver model data includes output current signals indexed by output voltages. The driver model can then generate a model output by interpolating the output current signals using the output voltage to generate an output current. The output current can then be used to generate an updated output voltage across a predetermined time increment. The output current signals can then be interpolated using the updated output voltage to generate a new output current, when can be used to update the output voltage once again across the next time increment. By repeating this process across a time frame for the model output signal, a model output current and output voltage signals can be generated that match the actual output current and voltage signals from a driver in a multi-driver system.

Abstract: Partitioning of a design allows static timing analysis (STA), signal integrity, and noise analysis to be performed in parallel on multiple, less demanding, and more available hardware resources. Therefore, runtime and throughput of the analysis can be significantly shortened. Notably, the partitioning can include redundancy. That is, partitions are allowed to share objects in order to preserve the timing path completeness and design structural integrity. Due to this redundancy, these partitions can account for many constraints specifically imposed by STA and ensure minimal inter-partition data dependency during the analysis. Once these partitions are populated, analysis can be performed on those partitions in parallel to generate the same timing results as if the design had been analyzed flat as a single unit. Therefore, the performance of the analysis can be optimized without compromising the accuracy and quality of results.

Abstract: A polar transmitter includes a phase monitoring unit for monitoring input modulating data. When a phase transition exceeds a phase transition threshold, the phase monitor unit can signal an amplitude negation unit to invert the amplitude data coupled to the polar amplifier. The phase monitoring unit can also add an offset to the phase data that is provided to a frequency synthesizer. In another embodiment, when the phase transition threshold is exceeded, the phase monitoring unit can trigger inverting differential frequency data coupled to the polar amplifier. In one embodiment, the phase offset and the amplitude negation are applied until a second phase transition value exceeding the phase transition threshold is detected. If such an event is detected, then the input amplitude data is no longer inverted and the phase offset value is no longer added to the modulating data.

Abstract: A Secure Digital device including a PCBA having passive components mounted on a PCB using surface mount technology (SMT) techniques, and active components (e.g., controller and flash memory) mounted using chip-on-board (COB) techniques. The components are mounted only on one side of the PCB, and then a molded plastic casing is formed over both sides of the PCB such that the components are encased in the plastic, and a thin plastic layer is formed over the PCB surface opposite to the components. The molded plastic casing is formed to include openings that expose metal contacts provided on the PCB, and ribs that separate the openings. The molded plastic casing defines a pre-molded switch slot that facilitates an insert-in switch assembly process for mounting a write protect switch. The write protect switch includes a movable switch button engaged in the switch slot, and a switch cap secured over the switch slot.

Abstract: A method of allocating power to ports in an Ethernet switch, including: (1) assigning a configuration power to a selected port, wherein the assigned configuration power is less than a power supplied by the selected port to a powered, (2) enabling and powering the selected port in a single indivisible step, (3) determining the power limit of a device coupled to the selected port, (4) comparing the power supplied by the selected port to the device with the configuration power assigned to the selected port, and (5) if the power supplied by the selected port to the device is greater than the configuration power assigned to the selected port, then increasing the configuration power of the selected port to correspond with the power limit of the device.

Abstract: A shape-based layout beautification operation can be performed on an IC layout to correct layout imperfections. A shape is described by edges (and vertices) related according to specified properties. Each shape can be configured to match specific layout imperfection types. Corrective actions can then be associated with the shapes, advantageously enabling efficient formulation and precise application of those corrective actions. Corrective actions can include absolute, adaptive, or replacement-type modifications to the detected layout imperfections. A concurrent processing methodology can be used to minimize processing overhead during layout beautification, and the actions can also be incorporated into a lookup table to further reduce runtime. A layout beautification system can also be connected to a network across which shapes, actions, and IC layout data files can be accessed and retrieved.

Abstract: A swivel-type computer peripheral device includes a housing and a swivel rack assembly that swivels relative to the housing between a retracted position, in which a PCBA having a plug connector mounted on the swivel rack assembly is disposed inside the housing, and a deployed position, in which the swivel rack assembly is rotated outside of the housing such that the plug connector is positioned for insertion into a host computer socket. A torsion spring is connected between the housing and the swivel rack assembly and arranged to bias the swivel rack assembly either into the deployed position or into the retracted position. A locking mechanism controlled by a push button or another actuating mechanism is used to selectively lock the swinging rack in a retracted position and a deployed position.

Abstract: Fluidic conduits, which can be used in microarraying systems, dip pen nanolithography systems, fluidic circuits, and microfluidic systems, are disclosed that use channel spring probes that include at least one capillary channel. Formed from spring beams (e.g., stressy metal beams) that curve away from the substrate when released, channels can either be integrated into the spring beams or formed on the spring beams. Capillary forces produced by the narrow channels allow liquid to be gathered, held, and dispensed by the channel spring probes. Because the channel spring beams can be produced using conventional semiconductor processes, significant design flexibility and cost efficiencies can be achieved.

Abstract: A foot pain relief device can advantageously provide multiple angles of inclination, directed pressure against the plantar fascia, as well as ease of manufacturing and assembly. A toe strap, which is fastened around the ankle and the toe(s), ensures that the toes are flexed up. This toe flexing tenses the plantar fascia of the foot. A ball strap can be threaded through a hole in a ball and then operatively coupled with the toe strap. When operatively coupled to the toe strap, the ball strap keeps the ball positioned on the bottom of the foot while allowing ball mobility. The mobility of the ball can provide directed pressure on at least one component of the plantar fascia. Notably, the simultaneous combination of tension to the plantar fascia and directed pressure to the component(s) of the plantar fascia can be particularly effective at relieving foot pain.

Abstract: A method of providing synchronization-free station locating in a wireless network is provided. In this method, an AP having a known location sends a unicast packet to the station and notes its time of departure TOD(D). The station receives the unicast packet, notes its time of arrival TOA(D), sends an acknowledgement packet to the AP, and notes its time of departure TOD(D_ACK). The AP receives the acknowledgment packet and notes its time of arrival TOA(D_ACK). Notably, a distance between the AP and the station can be accurately determined using a first difference between the TOA(D_ACK) and the TOD(D) and a second difference between the TOD(D_ACK) and the TOA(D). A plurality of such computed distances between a plurality of APs and the station can be used to determine an accurate location of the station.