Abstract: A method of texturing a surface within or immediately adjacent to a template layer of a LED is described. The method uses a texturing laser directed through a substrate to decompose and pit a semiconductor material at the surface to be textured. By texturing the surface, light trapping within the template layer is reduced. Furthermore, by patterning the arrangement of pits, metal coating each pit can be arranged to spread current through the template layer and thus through the n-doped region of a LED.

Abstract: In a multiple-input multiple-output communication system, a transmit symbol vector and a set of soft decision metrics may be estimated using a reduced complexity maximum likelihood (ML) detection method based on a receive symbol vector and a QR decomposition of a set of permuted channel matrices. The reduced complexity ML detection method may use a different permuted channel matrix to estimate each transmit symbol in a transmit symbol vector. A set of error distances may be calculated for the estimated transmit symbol vector, each error distance calculated choosing a different value from a signal constellation subset for a transmit symbol in the estimated transmit symbol vector. A soft decision metric may be calculated using the elements from the set of error distances. In some embodiments the transmit symbols of a transmit symbol vector and the soft decision metrics for each transmit symbol may be determined in parallel.

Abstract: A low drop out voltage regulator (LDO) is capable of operating in one of two different modes based on externally connected components. In one mode, the LDO directly generates a regulated output voltage. In a second mode, the LDO drives an external PNP transistor to generate a regulated output voltage. In both modes, a relatively large bypass capacitor may be connected to the output voltage node to bypass high-frequency loading on the output voltage node. However, the bypass capacitor creates a low frequency pole in the frequency response of the LDO, which can diminish phase margin and reduce overall stability. An on chip compensation network beneficially counteracts the low frequency pole with an appropriately placed zero, thereby resulting in improved phase margin and greater stability.

Abstract: A USB device including a tubular housing and a rear cap assembly including a handle structure that is rotatably connected to the tubular housing to facilitate deploying and retracting a plug connector through a front opening of the housing. The plug connector is fixedly connected onto the front end of a sliding rack assembly that is disposed in housing such that the sliding rack assembly is slidable along a longitudinal axis. The sliding rack assembly includes a carrier including a carrier tray for supporting electronic devices and an elongated positioning rod extending from a rear portion of the carrier tray. The positioning rod is operably engaged with an actuator portion such that manual rotation of the rear cap handle structure relative to the housing around the longitudinal axis causes the sliding rack assembly to slide inside the housing between retracted and deployed positions.

Abstract: Defect printability analysis in a mask or wafer requires the accurate identification of defect images and reference (i.e. defect-free) images, in particular for a die-to-die inspection mode. A method of automatically distinguishing a reference image from a defect image is provided. In this method, multiple images can be accessed and aligned. Then, a common area of the multiple images can be defined. At this point, a complexity of each of the images, as defined by the common area, can be computed. Advantageously, by comparing the complexity of the multiple images, the reference and defect images can be quickly and accurately designated. Specifically, the most complex image is designated the defect image because the defect image must describe the defect. Complexity can be computed using various techniques.

Abstract: Integrated circuits are disclosed including at least one inductor-capacitor component, where each of the inductor-capacitor components includes an inductor and a capacitor constructed between the inductor and a substrate. The inductor includes at least one metal loop over a shield pattern forming a first capacitor terminal over patterned oxide layer with a second capacitor layer between the patterned oxide layer and the substrate.

Abstract: Printing systems are disclosed that produce homogenous, smooth edged printed patterns (such as integrated circuit (IC) patterns) by separating pattern layouts into discrete design layers having only parallel layout features, and by printing each design layer using individual print solution droplets deposited onto the substrate. A first alignment operation is performed to achieve a specified orientation between the printhead and a first set of alignment marks on the substrate using first image data generated by the imaging sensor of the camera before performing a first print operation, and a second alignment operation to orient the printhead relative to a second set of alignment marks is performed before a second print operation. A first pattern layout portion includes first layout elements aligned parallel to a first reference axis, and the first print operation is performed by making multiple printing passes in a print direction aligned with the first reference axis.

Abstract: A dual-personality extended USB (EUSB) system supports both USB and EUSB memory cards using an extended 9-pin EUSB socket. Each EUSB device 101 includes a PCBA having four standard USB metal contact pads disposed on an upper side of a PCB, and several extended purpose contact springs that extend through openings defined in the PCB. A single-shot molding process is used to form both an upper housing portion on the upper PCB surface that includes ribs extending between adjacent contact pads, and a lower molded housing portion that is formed over passive components and IC dies disposed on the lower PCB surface. The passive components are mounted using SMT methods, and the IC dies are mounted using COB methods. The extended 9-pin EUSB socket includes standard USB contacts and extended use contacts that communicate with the PCBA through the standard USB metal contacts and the contact springs.

Abstract: A microSD-to-SD adaptor card includes a base substrate having a lead frame structure, a protective cap forming a chamber that encloses eight microSD contact pins of the lead frame structure, and a thermoset plastic casing formed over the protective cap and exposed portions of the base substrate to provide the adaptor card with standard SD card dimensions. A rear opening facilitates insertion of a standard microSD card, whereby the eight contact pads on the microSD card are contacted by the eight microSD contact pins inside the chamber to allow electrical signals generated by the microSD card to be transmitted to a host system by way of a standard SD socket. A grip anchor pin is disposed inside the chamber to engage a grip notch disposed on the microSD card. A pre-molded switch slot is provided on the molded plastic casing, and an insert-in write protect switch is mounted after molding.

Abstract: A USB device including a bistable mechanism that serves to bias a plug connector into one of two stable states, where the first stable state is associated with a retracted position in which the plug connector is fully retracted inside a housing, and the second stable state is associated with a deployed position in which the plug connector extends through the front opening for coupling to a host system. Movement of the plug connector form the retracted to the deployed position is performed by manually applying a force to a handle portion that protrudes through a slot defined in the housing. The bistable mechanism resists the deploying force until an equilibrium point is reach, after which the bistable mechanism releases stored potential energy to complete the deploying process and to maintain the plug connector is the deployed position.

Abstract: An apparatus and method are provided for efficiently sharing a single wireless channel and for providing improved power saving. Automatic beacon “sliding” establishes a round-robin contention-free channel schedule among multiple IBSSs. Entering an idle state immediately following communication after a beacon saves power. Further power savings occur when presumptions of pending traffic may be made.

Abstract: A complementary metal oxide semiconductor transceiver analog front end circuit includes a combined transmit and receive amplifier block that produces an amplified transmit differential signal and receives a receive differential signal through the same pair of input/output nodes coupled to an external network through an RF choke block. In one embodiment the combined transmit and receive amplifier block includes separate power amplifier and low noise amplifier circuits, while a second embodiment includes a power amplification stage and a combined power amplification/low noise amplification stage. The amplifier circuits may be constructed using a combination of thin oxide core transistors and thick oxide input/output transistors. DC feeds may be selected to power the circuits in response to a transmit/receive control signal. Bias voltages to the amplifier circuits' transistors may also be set in response to the transmit/receive control signal.

Abstract: Accurate position capability can be quickly provided using a Wireless Local Area Network (WLAN). When associated with a WLAN, a wireless device can quickly determine its relative and/or coordinate position based on information provided by an access point in the WLAN. Before a wireless device disassociates with the access point, the WLAN can periodically provide time, location, and decoded GPS data to the wireless device. In this manner, the wireless device can significantly reduce the time to acquire the necessary GPS satellite data (i.e. on the order of seconds instead of minutes) to determine its coordinate position.

Abstract: A serial buffer having a parser and multiple parallel processing paths is provided. The parser receives incoming packets, determines the type of each packet, and then routes each packet to a processing path that corresponds with the determined packet type. Packet types may include blocking priority packets (which implement bus slave operations), non-blocking priority packets (which access on-chip resources of the serial buffer) and data packets (which implement bus master operations). Because the different packet types are processed on parallel processing paths, the processing of one packet type does not interfere with the processing of other packet types. As a result, blocking conditions within the serial buffer are minimized.

Abstract: A single chip superhetrodyne AM receiver is disclosed herein. To compensate for process variations in the implementation of the IC, bias currents setting the operating conditions for various amplifiers and other components in the system are adjusted based on frequency control signals in a PLL circuit in the local oscillator. Since the magnitude of the control signal reflects the process variations, the bias currents are adjusted based on the control signal to offset these variations in other portions of the receiver. To further improve the signal to noise ratio of the receiver, the IF filter is tuned within a range so as not to include any integer multiple or integer divisor of the timing reference frequency. Various techniques are described for enabling a complete superhetrodyne AM receiver to be implemented on a single chip which receives an antenna input signal and outputs a digital data signal.

Abstract: A CMOS image sensor in which each pixel includes a conventional pinned diode (photodiode), a Wide Dynamic Range (WDR) detection (e.g., a simplified time-to-saturation (TTS)) circuit, a correlated double sampling (CDS) circuit, and a single output chain that is shared by both the CDS and WDR circuits. The pinned diode is used in the conversion of photons into charge in each pixel. In one embodiment, light received by the photodiode is processed using a TTS operation during the CDS integration phase, and the resulting TTS output signal is used to determine whether the photodiode is saturated. When the photodiode is saturated, the TTS output signal is processed to determine the amount of light received by the photodiode. When the photodiode is not saturated, the amount of light received by the photodiode is determined using signals generated by the readout phase of the CDS operation.

Abstract: The present invention discloses data recovery architecture (CDR) to improve a multi-link system's tolerance to delay mismatches (or skewing effect) in its different links. The architecture is entirely digital and usable in any multi-link transceiver implementation that makes use of a separate clock link and requires timing synchronization between the different data links.

Abstract: An AGC control unit coordinates AGC gain changes between individual receive chains included within a MIMO receiver block. Coordinated AGC gain changes reduce time periods of unaligned MIMO data produced by the receive chains. Reducing the unaligned data periods advantageously increases the time that the output data may be combined to improve overall performance of the receiver block. Coordinated AGC control also enables a faster response to saturated signals since the gain of multiple receive chains may be changed contemporaneously.

Abstract: Micro-machined (e.g., stress-engineered spring) structures are produced by forming a release layer, forming a partially or fully encapsulated beam/spring structure, and then releasing the beam/spring structure by etching the release layer. The encapsulation structure protects the beam/spring during release, so both the release layer and the beam/spring can be formed using plating and/or using the same material. The encapsulation structure can be metal, resist, polymer, oxide, or nitride, and may be removed after the release process, or retained as part of the completed micro-machined structure.

Abstract: Fluidic conduits, which can be used in microarraying systems, dip pen nanolithography systems, fluidic circuits, and microfluidic systems, are disclosed that use channel spring probes that include at least one capillary channel. Formed from spring beams (e.g., stressy metal beams) that curve away from the substrate when released, channels can either be integrated into the spring beams or formed on the spring beams. Capillary forces produced by the narrow channels allow liquid to be gathered, held, and dispensed by the channel spring probes. Because the channel spring beams can be produced using conventional semiconductor processes, significant design flexibility and cost efficiencies can be achieved.