Patents Represented by Attorney Beyer Weaver and Thomas LLP
  • Patent number: 7144800
    Abstract: Multichip packages and methods for making same. The present invention generally allows for either the back of a flipchip, the back of a mother die, or both to be exposed in a multichip package. When the mother die is connected to the package contacts, the back of the flip chip is higher than the electrical connections. Accordingly, the back of the flip chip can be exposed. Furthermore, if a temporary tape substrate is used with a leadframe panel that does not have a die attach pad, the package can be even thinner. Once the temporary tape substrate is removed, both the back of the flipchip and the back of the mother die will be exposed from the encapsulant.
    Type: Grant
    Filed: July 13, 2004
    Date of Patent: December 5, 2006
    Assignee: National Semiconductor Corporation
    Inventors: Shahram Mostafazadeh, Joseph O. Smith
  • Patent number: 7144806
    Abstract: An ALD method deposits conformal tantalum-containing material layers on small features of a substrate surface. The method includes the following principal operations: depositing a thin conformal and saturated layer of tantalum-containing precursor over some or all of the substrate surface; using an inert gas or hydrogen plasma to purge the halogen byproducts and unused reactants; reducing the precursor to convert it to a conformal layer of tantalum or tantalum-containing material; using another purge of inert gas or hydrogen plasma to remove the halogen byproducts and unused reactants; and repeating the deposition/reduction cycles until a desired tantalum-containing material layer is achieved. An optional step of treating each newly formed surface of tantalum containing material with a nitrogen-containing agent can be added to create varying amounts of tantalum nitride.
    Type: Grant
    Filed: October 23, 2002
    Date of Patent: December 5, 2006
    Assignee: Novellus Systems, Inc.
    Inventors: James A. Fair, Jungwan Sung, Nerissa Taylor
  • Patent number: 7145801
    Abstract: By providing registers for each block constituting the flash memory, based on the use state and the erase count information stored in the registers, the plurality of blocks are classified into n groups according to the erase count by the control circuit, and of the blocks that can be used for writing of one classified group, writing of data is performed in the block constitution sequence. When all the blocks of one group are used, data is written to blocks that can be used for writing of another group selected in a specified sequence. Sequentially between n groups, the item in charge for selecting the blocks used for data writing are alternated, and data is written to the selected block. As a result, considering leveling of the flash memory block erase count, it is possible to perform the write capability block selection process using hardware.
    Type: Grant
    Filed: January 7, 2005
    Date of Patent: December 5, 2006
    Assignee: Buffalo Inc.
    Inventors: Takashi Ishidoshiro, Yoshiiku Sonobe
  • Patent number: 7142744
    Abstract: A method for equalizing optical signal power in a group of optical signals transmitted through an optical switch in an optical transmission system. In one embodiment a group of optical signals is input into an optical switch having at least one movable mirror array with a plurality of reflectors formed thereon, the optical beam being directed onto a selected at least one reflector and wherein attenuating the optical beam is accomplished by controllably detuning at least one of the selected at least one reflector to attenuate the optical beam.
    Type: Grant
    Filed: February 24, 2005
    Date of Patent: November 28, 2006
    Assignee: Calient Networks
    Inventors: Tony Walter, Dan Blumenthal, John E. Bowers, Peter Hunt, Roger J. Helkey, Xuezhe Zheng
  • Patent number: 7140603
    Abstract: A vibration damping device having a stopper structure includes: a rubber elastic body of generally frustoconical configuration overall; a first mounting member formed independently of the rubber elastic body, and directly or indirectly superimposed on the rubber elastic body in an external load input direction; and a second mounting member including a cylindrical portion that is bonded to a large diameter side outer circumferential surface of the rubber elastic body. A first and second abutting portions of the first and second mounting members are situated to be opposed to each other in a rebound direction with a given distance interposed therebetween, and a stop rubber is disposed between the first and second abutting portions so that the first and second abutting portions come into abutting contact with each other in a cushion-wise fashion, via the stop rubber to thereby provide a stopper structure.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: November 28, 2006
    Assignees: Tokai Rubber Industries, Ltd., Nissan Motor Co., Ltd.
    Inventors: Hajime Maeno, Atsushi Muramatsu, Nobuhiro Yasumuro, Naoki Kaneda, Shigeki Okai
  • Patent number: 7142315
    Abstract: A technique for focusing and maintaining the focus of an inspection or review system upon a specific layer of a multi-layered specimen is described. In one embodiment, a confocal autofocus system can be used to focus an optical inspection or review system upon the top layer of a semiconductor wafer thin-film stack. The confocal autofocus system utilizes a tilted mask having a linear array of apertures or a continuous slit that is aligned so that a respective linear array of focal points or a focal slit is parallel with a scanning axis of the inspection system. Appropriate processing of the profile depth information yields knowledge of the depth of various layers in the specimen and allows for selection of the layer or location of interest upon which to focus the inspection or review system.
    Type: Grant
    Filed: March 3, 2004
    Date of Patent: November 28, 2006
    Assignee: KLA-Tencor Technologies Corporation
    Inventors: Steve R. Lange, Charles E. Wayman
  • Patent number: 7143368
    Abstract: Power consumption estimation is performed at the system level in a design process, thus allowing early evaluation of feasibility and other considerations relating to logic/DSP design and hardware implementation of a proposed electronic design. Evaluation of the system level power consumption estimate(s) permits adjustment of a system level representation of the proposed electronic design, prior to investment of substantial resources in the electronic design. Other estimates, including other power consumption estimates, may be performed to adjust the proposed electronic design as well. Such estimates may be made in response to gate level power consumption estimates and/or hardware level power consumption estimates.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: November 28, 2006
    Assignee: Altera Corporation
    Inventors: Jordan Plofsky, Philippe Molson, Francois Pequillat
  • Patent number: 7142047
    Abstract: A switching circuit is described having an input stage having an input referred offset voltage associated therewith. An output stage has an output offset voltage associated therewith which is due at least in part to the input referred offset associated with the input stage. Offset cancellation circuitry is operable to cancel a portion of the input referred offset voltage before switching of the output stage is enabled thereby resulting in cancellation of the portion of the output offset voltage after switching of the output stage begins. The offset cancellation circuitry is further operable to release the input referred offset voltage after switching of the output stage begins thereby allowing the output offset voltage to drift.
    Type: Grant
    Filed: November 29, 2004
    Date of Patent: November 28, 2006
    Assignee: Tripath Technology, Inc.
    Inventors: Farzad Sahandiesfanjani, Babak Mazda
  • Patent number: 7140602
    Abstract: A fluid filled vibration damping device including: an elastic body elastically connecting a first and a second mounting member and partially defining a pressure receiving chamber filled with a non-compressible fluid; a flexible diaphragm partially defining an equilibrium chamber filled with the non-compressible fluid and connected to the pressure-receiving chamber via an orifice passage. The first mounting member includes an elastic-body-side central member bonded to the elastic body central portion, and a rubber-layer-side central member bonded to the flexible rubber layer central portion, both mutually superposed on and fastened together by a connecting bolt. A fitting recess and projection are formed at an interface between two members, and a mounting projection projecting outward on an opposite side from the interface. The connecting bolt is off-centered from a center of the two members by a give distance.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: November 28, 2006
    Assignee: Tokai Rubber Industries, Ltd.
    Inventors: Katsuhiro Goto, Hajime Maeno, Koichi Maeda
  • Patent number: 7143029
    Abstract: An apparatus for changing the playback rate of recorded speech includes memory storing a plurality of recorded speech messages and a plurality of feature tables. Each feature table is associated with an individual one of the speech messages and includes speech frame parameters based on the jitter states of speech frames of the associated recorded speech message. A playback module receives input specifying a recorded speech message in the memory to be played and the rate at which the recorded speech message is to be played back. In response to the input, the playback module uses a set of decision rules to modify the specified speech message based on the speech frame parameters in the feature table associated with the specified speech message and the specified playback rate, prior to playing back the specified speech message.
    Type: Grant
    Filed: September 9, 2004
    Date of Patent: November 28, 2006
    Assignee: Mitel Networks Corporation
    Inventor: Moustafa Elshafei
  • Patent number: 7141378
    Abstract: Methods, apparatus, and system, implementing and using techniques for detecting a presence of one or more target analytes in particular regions of interest of one or more samples. One or more samples including objects and one or more target analytes are provided. Some of the target analytes are labeled with a fluorophore and are bound to some of the objects in the samples. The samples are illuminated with fluorescence inducing light and fluorescent light is collected from one or more regions of the one or more samples. At least one anisotropy measurement of the samples is performed to identify regions of interest where one or more target analytes are bound to the objects. The collected fluorescent light from the regions of interest is analyzed to determine a presence of target analytes that are bound to the objects in the one or more samples.
    Type: Grant
    Filed: July 1, 2005
    Date of Patent: November 28, 2006
    Assignee: Blueshift Biotechnologies, Inc.
    Inventors: Steven C. Miller, Paul B. Comita, Evan F. Cromwell, Christopher B. Shumate
  • Patent number: 7141858
    Abstract: A gate structure for a MOSFET device comprises a gate insulation layer, a first layer of a first metal abutting the gate insulation layer, and a second layer overlying the first layer and comprising a mixture of the metal of the first layer and a second metal, the metal layers formed by the diffusion of the first metal into and through the second metal. The second metal can be used as the gate for a n-MOS transistor, and the mixture of first metal and second metal overlying a layer of the first metal can be used as a gate for a p-MOS transistor where the first metal has a work function of about 5.2 eV and the second metal has a work function of about 4.1 eV.
    Type: Grant
    Filed: June 18, 2004
    Date of Patent: November 28, 2006
    Assignee: The Regents of the University of California
    Inventors: Igor Polishchuk, Pushkar Ranade, Tsu-Jae King, Chenming Hu
  • Patent number: 7142566
    Abstract: The present invention relates to systems and methods for processing and transmitting data that preserves the timing relationship of the data being transmitted and/or processed. In one embodiment, the present invention uses a timestamp. The timestamp stores the timing relationship of data in the bitstream as it appeared before any processing that may alter the timing relationship of the data. The data may then be processed. By storing the original timing relationship of data, before any processing that alters the timing relationship of data, the present invention allows for the recreation of the original timing relationship between data. Thus, any jitter introduced by processing the data may be removed or substantially reduced.
    Type: Grant
    Filed: February 15, 2001
    Date of Patent: November 28, 2006
    Assignee: Cisco Systems Canada Co.
    Inventors: Alexander I. Leyn, Marc Morin
  • Patent number: 7141494
    Abstract: A tungsten nucleation film is formed on a surface of a semiconductor substrate by alternatively providing to that surface, reducing gases and tungsten-containing gases. Each cycle of the method provides for one or more monolayers of the tungsten film. The film is conformal and has improved step coverage, even for a high aspect ratio contact hole.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: November 28, 2006
    Assignee: Novellus Systems, Inc.
    Inventors: Sang-Hyeob Lee, Karl B. Levy, Aaron R. Fellis, Panya Wongsenakhum, Juwen Gao, Joshua Collins, Kaihan A. Ashtiani, Junghwan Sung, Lana Hiului Chan
  • Patent number: 7140071
    Abstract: In an electric motorized hinge apparatus, a biasing means maintains a concavo-convex engagement state between a third rotating member and a second engagement portion in a second rotating member, and thus the second rotating member rotates to follow the third rotating member. Furthermore, the biasing means maintains a concavo-convex holding state between a first engagement portion in the second rotating member and a first rotating member, and thus the first rotating member rotates to follow the second rotating member. Furthermore, as the first rotating member rotates, a lid portion rotates to follow it. During manual rotation of the lid portion, a motor is maintained in an off state and the second rotating member is kept at a stop by a lock means. Therefore, the engagement state at the first concavo-convex engagement part is released by the manual rotation of the lid portion, so that the lid portion can be freely rotated by hand.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: November 28, 2006
    Assignee: Nidec Copal Corporation
    Inventor: Yoshihide Tonogai
  • Patent number: 7138640
    Abstract: The invention pertains to mechanisms for protecting surfaces of optical components of an optical inspection system. One aspect of the invention relates to a gas purge system that produces a gas stream that blocks contaminants from reaching the optical surfaces of the optical components and that transports contaminants away from the optical surfaces of the optical components. Another aspect of the invention relates to a transparent cover that physically blocks contaminants from reaching the optical surfaces of the optical components. Yet another aspect of the invention relates to a combination of the gas purge system and the transparent cover.
    Type: Grant
    Filed: October 16, 2003
    Date of Patent: November 21, 2006
    Assignee: KLA-Tencor Technologies, Corporation
    Inventors: Gil Delgado, John McMurtry, James Wiley
  • Patent number: 7139841
    Abstract: Disclosed are methods and apparatus for handling data containing embedded addresses. In general terms, prior to transmission of data having an embedded address or port, an initiating host sends a NAT Probe to an end-host with which the initiating host wishes to communicate. The NAT Probe includes the embedded address or port and a type indicating that translation of the address and/or port is requested if needed. As the NAT Probe traverses through one or more NAT devices as it is transmitted to the end-host, each NAT device is enabled to recognize the NAT Probe type and translate the embedded address and/or port, depending upon the individual NAT device's configuration. When the NAT Probe reaches the final hop NAT device or end-host, a NAT Probe Reply is sent back to the initiating host. The NAT Probe Reply contains a translated embedded address and/or port which is compatible with the end-host's network. The NAT Probe Reply also contains a type which differs from the type of the NAT Probe.
    Type: Grant
    Filed: July 24, 2002
    Date of Patent: November 21, 2006
    Assignee: Cisco Technology, Inc.
    Inventors: Mahadev Somasundaram, Siva S. Jayasenan, Senthil Sivakumar
  • Patent number: 7138864
    Abstract: An amplifier having output switch circuitry is described. A sense resistor is operable to transmit an output current associated with the output switch circuitry. Low-voltage circuitry is operable to provide a drive signal to the output switch circuitry. Isolation circuitry is operable to provide DC isolation between the low-voltage circuitry and the output switch circuitry. Current sensing circuitry is directly connected to the sense resistor and is operable to sense the output current in the sense resistor and generate a fault signal in response to an overcurrent condition. The fault signal is characterized by a signal level which is compatible with the low-voltage circuitry without additional DC isolation.
    Type: Grant
    Filed: November 15, 2004
    Date of Patent: November 21, 2006
    Assignee: Tripath Technology, Inc.
    Inventor: Babak Mazda
  • Patent number: 7137831
    Abstract: A substrate is formed with a plurality of spiral contactors on an upper surface serving as a first surface and a plurality of connecting terminals on a lower surface serving as a second surface. Since the spiral contactors are arranged in a matrix on the upper surface serving as the first surface, a lot of spiral contactors can be provided on the substrate of the present invention, and a mount area can be enlarged, and the size of the connector can be decreased.
    Type: Grant
    Filed: March 9, 2005
    Date of Patent: November 21, 2006
    Assignee: Alps Electric Co., Ltd.
    Inventors: Taiji Okamoto, Kaoru Soeta
  • Patent number: D533177
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: December 5, 2006
    Assignee: Apple Computer, Inc.
    Inventors: Bartley K. Andre, Daniel J. Coster, Daniele De Iuliis, Richard P. Howarth, Steve Jobs, Jonathan P. Ive, Duncan Robert Kerr, Shin Nishibori, Matthew Dean Rohrbach, Douglas B. Satzger, Calvin Q. Seid, Christopher J. Stringer, Eugene Antony Whang, Rico Zörkendörfer