Abstract: A proxy server in a cloud-based proxy service receives a secure session request from a client device as a result of a Domain Name System (DNS) request for a domain resolving to the proxy server. The proxy server participates in a secure session negotiation with the client device including transmitting a digital certificate to the client device that is bound to domain and multiple other domains. The proxy server receives an encrypted request from the client device for an action to be performed on a resource that is hosted at an origin server corresponding to the domain. The proxy server decrypts the request and participates in a secure session negotiation with the origin server including receiving a digital certificate from the origin server. The proxy server encrypts the decrypted request using the digital certificate from the origin server and transmits the encrypted request to the origin server.
Type:
Grant
Filed:
September 30, 2011
Date of Patent:
December 4, 2012
Assignee:
Cloudflare, Inc.
Inventors:
Matthew Browning Prince, Lee Hahn Holloway, Srikanth N. Rao, Ian Gerald Pye
Abstract: A system and a method for self-aligned dual patterning are described. The system includes a platform for supporting a plurality of process chambers. An etch process chamber coupled to the platform. An ultra-violet radiation photo-resist curing process chamber is also coupled to the platform.
Abstract: A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware.
Type:
Grant
Filed:
September 23, 2008
Date of Patent:
December 4, 2012
Assignee:
Intel Corporation
Inventors:
Mani Ayyar, Eric Delano, Ioannis T. Schoinas, Akhilesh Kumar, Jay Jayasimha, Jose A. Vargas
Abstract: A method and system for detecting radio link (RL) failures between a wireless transmit/receive unit (WTRU) and a Node-B are disclosed. When signaling radio bearers (SRBs) are supported by high speed uplink packet access (HSUPA), an RL failure is recognized based on detection of improper operation of at least one of an absolute grant channel (AGCH), a relative grant channel (RGCH), a hybrid-automatic repeat request (H-ARQ) information channel (HICH), an enhanced uplink dedicated physical control channel (E-DPCCH) and an enhanced uplink dedicated physical data channel (E-DPDCH). When SRBs are supported by high speed downlink packet access (HSDPA), an RL failure is recognized based on detection of improper operation of at least one of a high speed shared control channel (HS-SCCH), a high speed physical downlink shared channel (HS-PDSCH) and a high speed dedicated physical control channel (HS-DPCCH).
Abstract: A method and apparatus for tree position adaptive SOMA receiver structures are disclosed herein. In one embodiment, a device for use in a wireless communication system comprises a receiver to receive information-bearing signals from the transmitter wirelessly transmitted using OFDM and bit interleaved coded modulation, where the receiver includes an inner decoder structure having a soft output M-algorithm (SOMA) based multiple-in multiple-out (MIMO) joint demapper that uses a SOMA-based MIMO detection process to perform joint inner demapping over each tone, and wherein the SOMA-based MIMO joint demapper is operable to search a detection tree for each tone using a tree-search symbol order that is adapted for each tone based on channel state information and extrinsic information from the outer decoder, where only a number of best alternatives from every level of the tree are expanded.
Type:
Grant
Filed:
December 15, 2008
Date of Patent:
December 4, 2012
Assignee:
NTT DoCoMo, Inc.
Inventors:
Ozgun Bursalioglu, Haralabos Papadopoulos, Carl-Erik W. Sundberg
Abstract: A method and apparatus for finite impulse response (FIR) filter bank architecture and method that involve low-complexity computation resources are described. In one embodiment, a digital image processing system includes an index mapping module to determine a rotation angle index to control rotation of an input patch of an image based on the (x,y) pixel coordinates of the image patch. The digital image processing system may also include a rotation module to rotate the input patch of the image based on the rotation angle index. In one embodiment, the digital image processing system may further include a filter engine module applied to a rotated version of the input patch of the image.
Type:
Grant
Filed:
June 19, 2009
Date of Patent:
December 4, 2012
Assignee:
Ricoh Co., Ltd.
Inventors:
Guotong Feng, Mohammed Shoaib, Edward L. Schwartz, M. Dirk Robinson
Abstract: Improved paging for wireless networks is disclosed. A wireless terminal clock is synchronized to a server clock. A paging window and a dormant window are set for communicating between the server and the wireless terminal using the synchronized time. The paging window and the dormant window are set using a set of instructions. During the paging window, a control channel for a cellular network is found by the wireless terminal, and a page is received from the server at the wireless terminal.
Type:
Grant
Filed:
December 2, 2011
Date of Patent:
December 4, 2012
Assignee:
Jasper Wireless, Inc.
Inventors:
Daniel G. Collins, Amit Gupta, Jahangir Mohammed
Abstract: An example power supply includes an energy transfer element, a switch and a controller. The controller includes a logic circuit and a constant current control circuit. The logic circuit generates a drive signal to control the switch in response to a control signal. The constant current control circuit generates the control signal in response to a received input current sense signal, input voltage sense signal, and output voltage sense signal. An integrator included in the constant current control circuit integrates the input current sense signal to generate an integrated signal representative of a charge taken from the input voltage source. The constant current control circuit is adapted to generate the control signal to provide a constant current at the output of the power supply such that the integrated signal is proportional to a ratio of the output voltage sense signal to the input voltage sense signal.
Abstract: Verifying data integrity and parity consistency of data blocks in an array of mass storage devices includes retrieving a row parity algebraic signature and a diagonal parity algebraic signature for one or more data blocks, a row parity block and a diagonal parity block. The row parity algebraic signatures of the one or more data blocks are logically combined to generate a first result and the first result is compared to the retrieved row parity algebraic signature for the row parity block. The diagonal parity algebraic signatures of the one or more data blocks and the row parity block are logically combined to generate a second result and the second result is compared to the retrieved diagonal parity algebraic signature for the diagonal parity block.
Abstract: A method of paging to increase standby time of Wireless Terminals used for non-real-time communications via cellular network is disclosed. The method comprises synchronizing a wireless terminal clock to a server internal clock and deriving a paging window and a dormant window for communicating between the server and the wireless terminal using the synchronized time. The method further comprises during the paging window: finding a control channel for a cellular network by the wireless terminal; sending the page from the server to the wireless terminal; and receiving the page from the server at the wireless terminal.
Abstract: Systems, methods, and apparatus for a scalable processor architecture for variety of string processing application are described. In one such apparatus, n input first in, first out (FIFO) buffer stores an input stream. A plurality of memory banks store data from the input stream. A re-configurable controller processes the input stream. And an output FIFO buffer stores the processed input stream.
Type:
Grant
Filed:
December 22, 2009
Date of Patent:
December 4, 2012
Assignee:
Intel Corporation
Inventors:
Vinodh Gopal, Gilbert M. Wolrich, Christopher F. Clark, Wadji K. Feghali
Abstract: A system is disclosed in which a data processing device is completely synchronized with a messaging service. One embodiment of the system comprises a wireless data processing device; a messaging service to maintain messages and other information on behalf of a user; and synchronization logic for maintaining synchronization of the messages and other information between the wireless device and the messaging service.
Type:
Grant
Filed:
January 21, 2003
Date of Patent:
November 27, 2012
Assignee:
Motorola Mobility LLC
Inventors:
John Friend, Michael Belshe, Roger Collins, Mike Bennett
Abstract: When a communications system initiates a connection, adaptive information can be presented to a user while waiting for that connection to be finalized. The adaptive information that is presented can be selected based on predetermined criteria which can be configured by a user. Moreover, the adaptive information that is presented can be selected based on a characteristic of the connection. For example, adaptive information can be selected which corresponds to the connection endpoint (e.g., the person or place a user is attempting to contact). A system can also delay finalizing a connection in order to present more adaptive information to a user. The delay can last until after all of the adaptive information has been presented or until a unit of adaptive information has been presented.
Abstract: An image sensor includes at least one photosensitive element disposed in a semiconductor substrate. Metal conductors may be disposed on the semiconductor substrate. A filter may be disposed between at least two individual metal conductors and a micro-lens may be disposed on the filter. There may be insulator material disposed between the metal conductors and the semiconductor substrate and/or between individual metal conductors. The insulator material may be removed so that the filter may be disposed on the semiconductor substrate.
Type:
Grant
Filed:
February 11, 2008
Date of Patent:
November 27, 2012
Assignee:
OmniVision Technologies, Inc.
Inventors:
Hsin-Chih Tai, Duli Mao, Vincent Venezia, WeiDong Qian, Ashish Shah, Howard E. Rhodes
Abstract: A method or apparatus to provide an improved headset. The headset includes at least one sensor. The headset further includes a configuration logic to configure the headset based on the position of the headset on the user's head.
Type:
Grant
Filed:
April 30, 2008
Date of Patent:
November 27, 2012
Assignee:
DP Technologies, Inc.
Inventors:
Philippe Kahn, Arthur Kinsolving, Michael Cory Fairman, Mark Andrew Christensen, Peter William Spaulding
Abstract: According to one embodiment, a movement detection apparatus includes an arithmetic module, an edge-storing filter, a determination module, and a control module. The arithmetic module calculates a difference signal between an input image signal and an image signal of the previous frame. The filter performs smoothing processing for a signal falling within a level range provided as threshold value, among difference signals calculated by the arithmetic module. The determination module determines levels of a movement component and a noise component of the signal output from the filter. The control module controls a level range supplied as threshold value to the filter in accordance with an amplitude level of the noise component overlying the input image signal.
Abstract: Surface passivation techniques for chamber-split processing are described. A method includes forming a first Group III-V material layer above a substrate, the first Group III-V material layer having a top surface. A passivation layer is deposited on the top surface of the Group III-V material layer. The passivation layer is removed. Subsequently, a second Group III-V material layer is formed above the first Group III-V material layer.
Abstract: An image processing apparatus and method execute instructions contained in multiple threads in parallel. The image processing apparatus decodes code data that is obtained by dividing image data into areas and carrying out a compression process such that the individual areas can be independently decoded. The image processing apparatus includes a first thread generating unit that allocates one execution thread to each independently compressed code, a second thread generating unit that allocates plural execution threads to each independently compressed code, and a control unit that controls the operation of the first thread generating unit and the second thread generating unit. At least part of an execution instruction for decoding the code data into image data is generated by the first thread generating unit or the second thread generating unit.