Abstract: A text processing system has display of text as a page of characters. The user interface comprises a set of editing actions that are activatable by mouse and/or keyboard actuations. Furthermore, secondary display modes are provided for audio or fax, which can be edited by at least a subset of the text editing actions. Representation of audio is as pseudo characters.

Abstract: An approach for providing image rejection during signal down conversion involves phase shifting quadrature signals at a frequency other than the down converted center frequency. One or more phase shifters coupled to a summer/subtractor provide forty five (45) degrees and one hundred thirty five (135) degrees of phase shift with respect to two quadrature input signals. The one or more phase shifters perform the phase shifts of the quadrature input signals at a frequency other than the center frequency of the down-converted signal.

Abstract: A lock condition detector for determining whether two signals are within a specified lock condition includes a phase detector which determines whether the first and second signals are within a prescribed phase condition and a frequency detector which determines whether the two signals are within a prescribed frequency relationship. An analyzer outputs a lock condition signal indicative of the first and second signals being out of lock whenever the phase condition signal indicates that the two signals are outside of the phase condition and whenever the frequency condition signal indicates that the two signals are outside of the prescribed frequency condition. The combination of the phase detector and the frequency detector prevents an erroneous in-lock condition signal when the two signals are in phase but at multiple frequencies of each other, as well as eliminates a high frequency data stream when there is a large frequency error between the two signals which would occur if only a phase detector were used.

Abstract: A reference circuit contains a PTAT (Proportional To Absolute Temperature) core. In the PTAT core there is a difference between the currents densities flowing through a first and second transistor. This difference results in a difference in junction voltage in the first and second transistor. The currents are adjusted by a local feedback loop in proportion to one another until the difference in junction voltage equals a voltage drop across a resistor. According to the invention the currents to both transistors are supplied by current sources, and the currents are adjusted by deviating a fraction of the supplied current from the transistors. This makes it possible to reference all control voltages for the transistors and the local feedback loop to the same supply connection, which increases the stability and power supply rejection of the circuit.

Abstract: A delay locked loop comprising a chain (CHN) of at least two delay elements (DL1-DLN), of which a first delay element (DL1) has an input for receiving a reference signal (phi0), and of which a last delay element (DLN) has an output for delivering an output signal (phiN); a phase comparator (PHCMP) having a first input (PH1) for receiving the reference signal (phi0), a second input (PH2) for receiving the output signal (phiN), and an output for delivering a binary control signal (Bcntrl); and a converter (CNV) for converting the binary control signal (Bcntrl) into an analog control signal (Acntrl) for controlling a delay time of at least one (DL1-DLN) of said delay elements (DL1-DLN). The phase comparator (PHCMP) comprises at least one additional input (Aip) for receiving an output signal (phi1-phiN−1) of at least one of the delay elements (DL1-DLN−1) preceding the last delay element (DLN).

Abstract: A circuit includes a transconductance stage which converts an input signal power into a signal current and supplies it to an output of the circuit. A current diverting circuit branch is coupled to selectively divert the current from the transconductance stage away from the output. A feedback network feeds back a portion of the current diverted away from the output to the input of the transconductance stage. When implemented as a variable gain amplifier, the current diverting branch functions to change a gain of the circuit from a high level to one or more lower levels. The feeding back of a portion of the diverted current to the input improves the linearity of the circuit in the lower gain mode(s).

Abstract: A 3D graphics accelerator is modified to support MPEG-2 video decoding in a computer system configured to playback a DVD data stream. The methods and apparatus modify the 3D graphics accelerator to conduct motion compensation and/or YUV 4:2:0 to YUV 4:2:2 conversion. Sub-code blending can also be further supported by the 3D graphics accelerator.

Abstract: A pseudo-noise generator (516) generates an on-time component, an early component and a late component of a pseudo-noise code signal in response to an error signal. The on-time component is routed to a deinterleave and demodulate device (210) which demodulates and decodes baseband signals from received spread spectrum signals. An adder (518) subtracts the early component from the late component to form a summation signal. A multiplier (520) multiplies the summation with the received signal to form a product signal. An integrator (522) integrates the product signal to form the error signal. The error signal is fed back into the pseudo-noise generator (516) to fine tune the on-time component, the early component and the late component of the pseudo-noise code signal. As a result, a spread spectrum signal is demodulated and decoded using only one correlator (504) instead of two.

Abstract: A memory in an integrated circuit contains a current sense amplifier. The current sense amplifier contains a first and second input transistor with cross-coupled gates and drains, each transistor having a source coupled to a respective memory bit line. The current from the drains of the first and second input transistor is guided to source-drain channels of the first and second load transistor respectively. The drains of the first and second input transistor are coupled to a common node via source-gate links of the first and second load transistor respectively. The gate/source voltage drops of the first and second load transistor are arranged in a direction opposite to a direction of gate/source voltage drops of the first and second input transistor between the complementary bit lines and the common node.

Abstract: An oscillator arrangement is described including a resonant circuit having two poles from which an oscillation generated in the oscillator arrangement can be taken and including a differential amplifier of two emitter-coupled transistors having two collector electrodes of which each one is connected to one of the poles of the resonant circuit, and having two base electrodes cross-coupled to the poles of the resonant circuit. Such an oscillator arrangement can be constructed so as to generate a low-noise oscillation by means of a minimal number of circuit elements in that the base electrodes are each coupled to the poles of the resonant circuit via a diode configuration.

Abstract: A current generator for delivering a reference current of which the value is proportional to the absolute temperature comprises first and second bipolar transistors (Q1, Q2) which are biased respectively by first and second current sources (I1, I2). The voltage difference between the emitters of the first and second bipolar transistors (Q1, Q2) is regulated to virtually zero volt by means of regulation means (RGMNS). Because of the presence of resistors (R1-R3) in series with the bases of the first and second bipolar transistors (Q1, Q2) instead of the presence of resistors in series with the emitters, the first and second bipolar transistors (Q1, Q2) can be chopped by switches without suffering from the disadvantageous effect of the undesired series resistances of the switches. For this reason by the chopping of the first and second bipolar transistors (Q1, Q2) the accuracy of the reference current is improved significantly.

Abstract: A hand-held control unit is used to control a display screen-oriented computer game. The unit comprises a housing with a front side, a set of control members lying generally flush with the front side for through actuating thereof controlling actions of in-game display items, and an output for communicating representative signals of the actuating to the computer for controlling game actions displayed on the display screen. The control unit has at the front side a representation of an associated game item which generally coincides with one or more of the control members that are thereby functionally integrated with the representation.

Abstract: An oscillator in an integrated circuit in which the oscillator signal is taken from the output of a comparator, and the decision level of the comparator is determined by the voltage difference between the input of the comparator and the substrate of the integrated circuit. Interference voltages on the substrate, caused by other circuitry on the integrated circuit, are compensated with equal interference voltages at the input of the comparator. To effect this compensation, a capacitor is connected between the input of the comparator and the substrate, in lieu of the conventional capacitor that is connected between the input of the comparator and a ground potential.

Abstract: A method for emulating a non-bond-out version of a microcontroller that has a standard port, a microcontroller allowing such emulating, and a system for executing the emulation. For emulating a non-bond-out version of a microcontroller, a standard port is used to multiplex among user data and program store addresses. An external register is connected to the port for latching therein program store addresses. The microcontroller is synchronized according to a machine cycle that has a plurality of states, each of which comprises at least two clock pulses. The standard port is used for outputting mutually exclusive parts of a program store address in contiguous sections of a machine state of external parallel evaluation.

Abstract: Concurrent sequential processes synchronize by intra-process amend operations and inter-process operations. To each interactive subset of processes a part of an associated I/O channel is assigned. Each inter-process operation includes one or more update operations for exchanging information between an associated process of the pair and its in-channel part, and also one or more adapt operations for in-channel moving of information between the respective parts assigned to the processes of the pair.

Abstract: A current comparator comprises first (1) and second (2) inputs for receiving input currents to be compared. During a first phase (1a) of a clock period the input currents are sensed and stored on first (N1,S7) and second (N2,S8) current memory circuits. On a second phase (1b) of the clock period a switching arrangement (S1 to S4) inverts the input currents and applies them together with the currents stored in the first (N1,S7) and second (N2,S8) current memory circuits to a regenerative latch circuit (P1,P2,S9,S10). During a third phase (2a) of the clock period the comparator produces the comparison result at an output (3). During a fourth phase switches (S5,S6,S9,S10,S11) are operated to reset the comparator to its initial state.

Abstract: A shunt-feedback technique is provided for improving noise figure and linearity of electronic circuits, such as amplifiers and mixers. An input common-emitter transconductance stage of an electronic circuit has a transistor, and a degeneration impedance provided between the emitter of the transistor and a ground terminal. A feedback capacitor is connected between the collector and the base of the transistor. A feedback resistor is coupled between the collector of the transconductance stage transistor and the emitter of a transistor in the next stage of the electronic circuit. The feedback capacitor and the feedback resistor form a shunt-feedback network.

Abstract: The present invention provides dc offset compensation circuit (800) for a zero IF FM quadrature demodulator in an AMPS cellular mobile telephone system. A frequency offset is introduced to remove modulation inherent dc components from supervisory audio tones and Manchester codes from a modulated signal. The local oscillator (608) is operated at a frequency that is slightly different, e.g. 5 kHz from a frequency which would mix down the intermediate frequency signal to zero. A dc offset is produced with a control loop to eliminate fixed dc components caused by leakage from a local oscillator (608). After a given time, the control loop may be frozen and the frequency offset of the local oscillator (608) can be removed.

Abstract: A method of manufacturing a semiconductor device with a multilayer wiring (6, 11, 14) with aluminum conductor tracks (7, 12, 15) which are insulated from one another by insulating layers (9, 13). According to the method, an aluminum conductor track (20) provided on a surface (1) of a semiconductor body (2) is covered with a layer of insulating material (21), whereupon a contact window (22) with a wall (23) reaching down to the conductor track is formed in this insulating layer. A conductive intermediate layer (24, 28) and an aluminum layer (25, 29) are provided on this wall, whereupon a heat treatment is carried out such that aluminum (26) grows from the conductor track into the contact window. A conductive intermediate layer of titanium is provided on the wall of the contact window. A very thin, closed aluminum layer, which remains closed also during the heat treatment, can be formed on this titanium layer, which can be provided on the wall with a small thickness.

Abstract: The invention relates to a semiconductor device comprising a semiconductor body (3) with a semiconductor element (1) with an electrically conducting region (5) on which a capacitor (2) forming a memory element is present with a lower electrode (11), an oxidic ferroelectric dielectric (12), and an upper electrode (13), which lower electrode (11) makes electrical contact with the conducting region (5) and comprises a layer with a conductive metal oxide (112) and a layer (111) comprising platinum. The layer with the conductive metal oxide (112) acts as an oxygen barrier during manufacture. The invention also relates to a method of manufacturing such a semiconductor device.According to the invention, the device is characterized in that the layer comprising platinum (111) contains more than 15 atom % of a metal capable of forming a conductive metal oxide, and in that the layer (112) with the conductive metal oxide is present between the layer (111) comprising platinum and the ferroelectric dielectric (12).