Abstract: A testable circuit comprises a signal path having a time-dependent response behavior (for example, a high-pass filter behavior). The signal path is tested for faults. To this end, the circuit is switched to a test mode in which the signal path is isolated from other signal paths. Subsequently, a test signal containing a signal transition is applied to the input of the signal path and it is tested whether the signal on the output of the signal path at any instant exceeds a threshold level during a predetermined time interval after the transition. The result is loaded into a register and read from the circuit.

Abstract: A method of manufacturing a semiconductor device which starts with a semiconductor wafer which is provided with a layer of semiconductor material lying on an insulating layer at a first side. Semiconductor elements and conductor tracks are formed on this first side of the semiconductor wafer. Then the semiconductor wafer is fastened with this first side to a support wafer, and material is removed from the semiconductor wafer from its other, second side until the insulating layer has been exposed. The method starts with a semiconductor wafer whose insulating layer is an insulating as well as a passivating layer. The semiconductor device must be provided with a usual passivating layer after its manufacture in order to protect it against moisture and other influences. In the method described here, such a passivating layer is present already before the manufacture of the semiconductor device starts.

Abstract: An electronic circuit has a plurality of nodes at which a plurality of clock signals are present in operational use. The clock signals should have a pre-determined timing relationship amongst themselves. The circuit includes logic circuitry having inputs connected to the nodes and having an output to provide a pulse train. Any discrepancy between the actual and ideal pulse trains indicates a fault.

Abstract: The invention relates to a semiconductor device of the type sealed in glass, comprising a semiconductor body having a pn-junction between opposing faces which are connected to slugs of a transition metal, said slugs being connected to copper-containing connection conductors by a bonding layer, the bonding layer comprising, in addition to copper and silver, more than 1 wt. % germanium.

Abstract: Various circuit components can communicate via a bus conductor. One circuit component comprises an interface stage with a transistor coupled between the bus conductor and a power supply terminal. When a further circuit component pulls the potential on the bus conductor beyond the potential of the power supply, the potential on the control electrode of the transistor is pulled along. The connection between the control electrode and the remainder of the circuit component is then turned off, irrespective of the state of the remainder of the circuit component. This remainder includes, for example, an inverter in antiparallel connection with an inverter formed in conjunction with the transistor, so that these inverters together constitute a bus-hold circuit.

Abstract: The invention relates to a semiconductor device of the type sealed in glass, comprising a silicon semiconductor body having a pn-junction between opposing faces which are connected to slugs of a transition metal by means of a bonding layer, the bonding layer comprising a quantity of aluminum in the range between 7 and 15 wt. % and a quantity of silver in the range between 85 and 93 wt. %.

Abstract: An etching composition and method for its use in etching a semiconductor structure, the semiconductor structure comprising a substrate and one or more epitaxial layers. The etching composition comprises a solvent, an etchant, and first and second complexing agents, the etchant and complexing agents being soluble in the solvent. The etchant preferentially etches the substrate with respect to at least one epitaxial layer. The first complexing agent is reactive with the substrate so as to accelerate the rate at which the etchant etches the substrate. The second completing agent is reactive with a component of the at least one epitaxial layer so as to form a resulting compound with the component. This reaction establishes an equilibrium between the resulting compound, the second complexing agent and the component, the equilibrium precluding significant etching of the at least one epitaxial layer.

Abstract: An electronic device comprises a circuit that is provided with incrementally modifiable power consumption control means. By applying a program signal to this control means the balance between speed and power consumption is optimized. A PLA circuit considerably benefits from this architecture.

Abstract: The invention relates to a method of manufacturing a semiconductor device (1) for surface mounting. Such a method is known, whereby such a semiconductor device is manufactured in that a semiconductor body with a semiconductor element is mounted on a metal lead frame with metal package leads, after which contact surfaces of the semiconductor element are connected to the package leads by means of bonding wires. It is found that semiconductor devices of small dimensions are difficult to realize by this known method, while in addition the manufacture of integrated circuits with very many package leads is comparatively expensive owing to the many connections which are to be made between the integrated circuits and the package leads. According to the invention, the semiconductor devices are packaged while they are still on a slice of semiconductor material, while the package leads are formed from the semiconductor material.

Abstract: In a data processing system including a graphic tablet and a wireless stylus cooperating with the tablet, the stylus transmits an electromagnetic field to be received by the tablet. The stylus has a detector whereby a disturbance of the field, caused by a means external of the stylus, can be detected. The stylus also includes a switch whereby the stylus can be switched to a power-saying standby mode in response to the disturbance. A contactless on/off switch is thus realized for the stylus.

Abstract: A circuit arrangement for comparatively high powers, for example, for gas discharge lamps is protected against high currents, which may be caused inter alia by inrush effects or transients, by a semiconductor current limiter element V. The current limiter element comprises a semiconductor body of substantially a given conductivity type, for example the n-type. The main electrodes are provided at the upper and the lower surface of the semiconductor body and comprise two metal electrodes which are connected to the semiconductor body via highly doped contact zones. The doping of the interposed region is such that current saturation occurs from a certain voltage upon a rise in voltage between the main electrodes. In a first embodiment, buried floating p-type zones are formed in the interposed region, so that the element is a junction field effect transistor with floating gate.

Abstract: An electric lamp includes a hybrid skirted lamp base including a plastic skirt portion and a metallic skirt portion having one end portion molded in said plastic skirt portion and a second end portion secured to the lamp envelope. The metallic skirt portion improves structural integrity and provides some thermal isolation from the lamp envelope allowing the use of a lower temperature plastic for the plastic skirt portion. The plastic skirt portion includes a weldless and solderless lamp base. A lamp cap contact includes a rigid shank received in a clamping bore of the plastic skirt portion. The diameters of the bore and shank and the elasticity of the bore wall are selected so that a conductive lead of the lamp is securely clamped between the shank and the bore wall when the shank is fully received in the bore. In a favorable embodiment, the lead has a free end extending in the direction of insertion of the shank into the bore, which avoids the lead wire from being pushed out of the bore.

Abstract: A semiconductor device includes a semiconductor body (3) with a semiconductor element (1) with an electrically conducting region (5) on which a capacitor (2) forming a memory element is present with a lower electrode (11), an oxidic ferroelectric dielectric (12), and an upper electrode (13), which lower electrode (11) makes electrical contact with the conducting region (5) and includes a layer with a conductive metal oxide (112) and a layer (111) including platinum. The layer with the conductive metal oxide (112) acts as an oxygen barrier during manufacture. The invention also relates to a method of manufacturing such a semiconductor device. The device is characterized in that the layer including platinum (111) contains more than 15 atom % of a metal capable of forming a conductive metal oxide, and in that the layer (112) with the conductive metal oxide is present between the layer (111) comprising platinum and the ferroelectric dielectric (12).

Abstract: A light sensing array device including an array of photoelectric light sensing elements (10) individually addressable via sets of address conductors (12, 14) for use, for example, in image sensing or data input using a light pen, which is operable also in a power generating mode in which sensing elements in the array produce electrical power in the manner of a solar cell. To this end, the sets of address conductors are selectively connected via switching means (20, 21, 37, 38) to power output terminals (42, 43). The generated power may be used to supplement a power supply, e.g. using a battery pack, of the device or of electronic apparatus, such as a notebook computer, incorporating the device.

Abstract: Microprocessor with registered clock counting for at a predetermined count producing a command signal of adjustable shape, and a hierarchical interrupt system for use therewith.A microprocessor comprises registered counting means that counts clock pulses. Upon attainment of a predetermined count it generates a command signal. Furthermore, it has a presettable input section that recurrently receives a variable preset count for downcounting, a secondary count section that is fed by said command signal output for counting successive command signals and under control of attainment of a predetermined count generates a secondary command signal on a secondary output. Next, a programmable registered pulse shaper mechanism under control of said secondary command signal executes serial shifting and outputs a shaped version of the secondary command signal. The above counting means is also associated to a parametrizeable interrupt priority mechanism.

Abstract: A rail-to-rail input stage with constant g.sub.m and constant common-mode output currents is provided. The common-mode output currents are controlled by the use of current switches. When low and high common-mode input voltages are applied to the input stage, the current switches take part of the tail currents of the input stage transistors, divides it into two equal parts, and directs the two equal current signals to the outputs. When intermediate common-mode input voltages are applied, the current switches regulate the tail currents of the input pairs such that the common-mode output current and g.sub.m remains constant. The current switches are responsive to changes in the common-mode input voltages, and thereby maintain the g.sub.m constant.

Abstract: A semiconductor device has a carrier, at least one semiconductor component provided on this carrier, and a multilayer metallization between the semiconductor component and the carrier. A first metal layer of aluminium, gold, or a gold alloy is provided on the surface of the semiconductor component, a second metal layer of titanium is provided on the first metal layer, a third metal layer of nickel is provided on the second metal layer, and a fourth metal layer of a binary or ternary gold-germanium alloy is provided on the third metal layer. The device has a low-ohmic contact resistance and extremely long useful life under temperature loads.

Abstract: A part of the read-write memory of a digital signal processor, generally referred to as a DSP, is used for the storage of a software layer which acts as a control unit which reads instructions in an, if desired large, memory external to the DSP, and which controls their transfer to the program memory of the DSP, which transfer is effected instruction by instruction or at least instruction block by instruction block. Field of use: real-time digital computations, particularly in consumer products, such as telematics terminals.

Abstract: A semiconductor device with a semiconductor body (3) including a surface region (5) of a first conductivity type which adjoins a surface (4) and in which a field effect transistor (1) with insulated gate (6) is provided. The field effect transistor (1) has source and drain regions (7, 8, respectively) of the second, opposed conductivity type situated in the surface region (5), and a channel region (9) of the first conductivity type situated between the source and drain regions. A metal gate electrode (6) separated from the channel region (9) by an insulating layer (10) is provided over the channel region (9) and is provided with a protection device (2) against excessive voltages applied to the gate electrode (6).

Abstract: The invention relates to a local network operating in the asynchronous transfer mode (ATM), comprising a plurality of stations (10) which are each coupled to transmitting and receiving ring lines (16, 19) via a network interface (9) which comprises at least one switch (11) and which stations are provided for transmitting cells. The switch (11) is arranged for relaying a user cell containing information relating to the user from a receiving ring line (16) to the transmitting ring line (19) and/or to the station (10) or from a station (10) to the transmitting ring line (19) in response to status information.