Abstract: The present invention is directed to a semiconductor device incorporating a semiconductor element which is provided with a housing having at least a base member, a top member and an insulator member which connects the base and top members, the housing having enclosed within it a semiconducting element which is clamped in place between two electrodes by means of at least one spring, the semiconducting element being electrically connected to the electrodes by a thin layer of soft solder, the semiconductor device being provided with a current supply lead which is in contact with at least one of the exterior faces of the housing.

Abstract: A method and apparatus are provided for alignment of an electron beam with precisely located areas of a major surface of a member. Marks of predetermined shape are formed of X-ray producing material and are positioned adjacent the major surface of the member which is preferably substantially transparent to the X-rays generated by the marks. An electron beam to be aligned has at least one alignment beam portion of a predetermined cross-sectional shape and preferably corresponds in dimensional accuracy to the alignment accuracy desired. The X-ray emissions are detected by a detector means preferably positioned adjacent the opposite surface of the member. The position of the electron beam is moved relative to the member while continuing said detection until the X-ray emissions detected indicate alignment of the alignment beam portion with a corresponding mark.

Abstract: A semiconductor switching device is described in which a control electrode is disposed on a base zone adjacent to an emitter zone. The control electrode has at least one straight edge portion parallel to an adjacent straight border edge portion of the emitter zone. The parallel edges are also parallel to a [110] crystallographic direction of the semiconductor crystal which has a <111> crystal orientation; thus providing optimum firing of the device.

Abstract: A method is provided for making a light activated semiconductor controlled rectifier in a semiconductor body having opposed first and second major surfaces. Impurities are sequentially provided in the major surfaces to form four regions of alternate type conductivity disposed alternatively through the body between the major surfaces, with a PN junction between each region. An etchant solution is prepared preferably substantially equal amounts of chromium trioxide and water, and adding to said first solution just prior to use a given, preferably about 50% hydrofluoric acid solution in predetermined amounts preferably of substantially one part for each two parts of the first solution.

Abstract: An assembly comprising a metal-semiconductor-metal element, an insulating sleeve member disposed about the metal-semiconductor-metal element and a metal pole piece contact. The three elements together form a disc-shaped power semiconductor device assembly for operation in a compression bonded application.

Abstract: A thyristor is provided with a low forward voltage drop (V.sub.f) while providing a typical gate current to trigger (I.sub.g). The working point in the cathode-base region of the thyristor has an impurity concentration less than 5 .times. 10.sup.15 and preferably less than 1 .times. 10.sup.15 per cm.sup.3. The gating portion of the device is selectively irradiated, preferably with electron radiation, to maintain the gate current. The forward blocking voltage (V.sub.BO) and rate of rise of application of forward voltage (dV/dt) of the thyristor may also be maintained at typical values by a fine shunt pattern and/or doping of the shunt portions.

Abstract: Solid layer semiconductor compositions are deposited by the simultaneous sputtering from a sputter target and electrically discharge a reacting gas preferably by application of an RF potential. Preferably, the method is used to make solid solution layers and most desirably solid solution epitaxial layers of at least two semiconductor materials. The method may be used to make novel metastable compositions such as (GaAs).sub.1.sub.-x Si.sub.x, (GaAs).sub.1.sub.-x Ge.sub.x, (InSb).sub.1.sub.-x Si.sub.x, (InSb).sub.1.sub.-x Ge.sub.x, (InAs).sub.1.sub.-x Si.sub.x and (InAs).sub.1.sub.-x Ge.sub.x (where x is a number greater than about 0.01, and x + (1-x) = 1, and Ga.sub.x As.sub.y Si.sub.z, Ga.sub.x As.sub.y Ge.sub.z, In.sub.x Sb.sub.y Si.sub.z, In.sub.x Sb.sub.y Ge.sub.z, In.sub.x As.sub.y Si.sub.z, In.sub.x As.sub.y Ge.sub.z and In.sub.x Sb.sub.y As.sub.z (where x, y and z are numbers greater than about 0.01, and x + y + z = 1).

Abstract: A magnetic film is incorporated in a device suitable for use with a computer; the film is capable of supporting magnetic bubble domains of two different sizes corresponding to stable hysteresis states which exist simultaneously under the same external magnetic field bias. When densely packed in an array, the bistable magnetic bubble domains form the basis for binary coded data storage. Single crystal garnet and amorphous intermetallic compounds may be employed as bistable bubble domain materials.

Abstract: A conventional amplifying gate thyristor is provided with gate assist turn-off capability by a package assembly. The package assembly comprises an encapsulation means adapted for packaging therein the amplifying gate thyristor, said encapsulation means including a locator means for aligning and supporting a gate contact adapted to make ohmic contact with a gate electrode of the amplifying gate thyristor and for aligning and supporting a diode relative to said gate electrode. A diode is disposed in a semiconductor body having cathode and anode regions forming a PN junction therebetween and adjoining opposed major surfaces of said semiconductor body, respectively. The diode is fastened to said locator means with said cathode region thereof making ohmic contact with said gate contact and said anode region thereof making ohmic contact with an anode electrode affixed on a major surface of said semiconductor body and adapted to make ohmic contact with a floating electrode of the amplifying gate thyristor.

Abstract: Solar cell elements are produced in accordance with the present invention in which a Cu.sub.2 S thin film is epitaxially formed on a CdS film by vacuum deposition in a heterojunction forming relationship. By a first method a Cu.sub.2 S layer on the order of 1/100 micron in thickness is formed on a CdS polycrystalline thin film by dipping in a solution of cuprous ions. The CdS film itself is less than 5 microns thick and rests on a conductive substrate. After the dipping step the Cu.sub.2 S film is increased to a thickness on the order of 1/10 micron by vapor evaporation of an additional amount of Cu.sub.2 S. By a second method both the CdS and Cu.sub.2 S are entirely vapor deposited on a substrate to achieve approximately the same final structure as the first method.

Abstract: A method is provided for contactless testing of an integrated circuit by fabricating, integrally with the integrated circuit, semiconductor switch elements, that is, thyristors, transistors and combinations thereof, that are connected to power and/or signal electrical inputs of the integrated circuit. Base regions of the switch elements are selectively exposed to a fine-dimensioned electron beam to switch the elements and supply desired electrical inputs at the connected inputs of the integrated circuit. The integrated circuit can thus be selectively tested preferably by segments and modules. After testing, the switch elements are disconnected from the integrated circuit, and the integrated circuit selectively connected preferably while accommodating and passivating defective components and modules of the circuit.

Abstract: An improved case member for a power semiconductor device is comprised of compacted powdered iron infiltrated with copper to provide good electrical and thermal contact for the semiconductor element and sufficient mechanical strength for use in a compression bonded encapsulation.

Abstract: A plasma thyristor circuit is provided for generating high power, ultra-short duration electrical signals. A silicon semiconductor body has first, second and third impurity regions therein with a PN junction formed at the transition between the first and second or the second and third impurity regions. The second impurity region has an impurity concentration of less than about 5 .times. 10.sup.14 atoms/cm.sup.3, and a width of greater than about 80 microns. The ratio of the punch-through voltage of the second impurity region to the reverse breakdown voltage of the PN junction is between 0.3 and 0.7. Power sources apply both a reverse bias voltage across the body greater than said punch-through voltage and less than said reverse breakdown voltage, and a current to the body having a density greater than the saturation current density of the second impurity region.

Abstract: A semiconductor device and particularly a self-aligned Schottky barrier gate field-effect transistor is made by epitaxial growth of facets corresponding to the source and drain regions on a surface of a semiconductor body through spaced apart preferably elongated windows in a masking layer and overgrowing edge portions of the masking layer at the windows to form overgrown portions on the facets. The channel region of the transistor is previously formed in the semiconductor body, preferably by epitaxial growth of a layer on a surface of a semiconductor body having a semi-insulating layer adjoining the surface. After removal of the masking layer, the Schottky barrier gate is self-aligned by deposition of metal on the unshielded portions of the planar surface between the facets.

Abstract: A low frequency oscillator including a pair of novel integrator circuits and a resistive inverter circuit electrically connected together in cascade and having ganged gain control following each integrator. The novel integrator circuit includes an operational amplifier having first and second input terminals, said first input terminal being adapted for connection to a voltage source and including a resistor between said source and terminal. A first negative feedback loop including a capacitor is electrically connected between the output of the amplifier and the first terminal. A second positive frequency independent feedback loop is electrically connected between the output of the amplifier and the second input terminal. The second feedback loop preferably includes a voltage divider having a temperature variable resistor and a pair of independent heaters for varying the resistance of said resistor.

Abstract: A high frequency, Schottky barrier gate, field-effect transistor is provided with a substantially constant impedance over a broadband of frequencies. The transistor is comprised of a thin dielectric layer providing an effective dielectric constant at gate and drain contacts greater than .sqroot.2. The dielectric layer is supported on the major surface of a conductor substrate, and is preferably 5 microns in thickness and has a dielectric constant greater than about 5. The transistor is also comprised of a thin semiconductor layer of less than about 2 microns in thickness at least at gate portions with an N-type concentration of between about 5 .times. 10.sup.14 and 5 .times. 10.sup.17 carriers/cm.sup.3. The gate contact of the transistor is an elongated Schottky barrier contact adjoining the semiconductor layer spaced between elongated source and drain contacts which make ohmic contact with the semiconductor layer.

Abstract: A bipolar transistor is provided with both high voltage and high frequency capabilities. A semiconductor body of a resistivity between 10 and 100 ohm-cm forms the collector region of the transistor and has an epitaxial semiconductor layer grown on a major surface thereof of a resistivity between about 0.5 and 10 ohm-cm and of a thickness between about 20 and 100 microns and of a conductivity type opposite from the body. At least one emitter region and integral emitter electrode are alloyed into the epitaxial layer preferably in annular rings. A base region is formed in the epitaxial layer between the emitter and semiconductor body and around the emitter region, said base region having a minimum thickness between the emitter region and the semiconductor body in the interior of the body of less than 20 and preferably between 5 and 10 microns.

Abstract: Diodes of a particular type are fine tuned with irradiation to optimize the reverse recovery time while minimizing forward voltage drop and providing more uniform electrical characteristics. The initial and desired minority carrier lifetimes in the anode region of the type are determined as a function of forward voltage drop and reverse recovery time, and the minority carrier radiation damage factor is determined for a desired type of diode and radiation source. The radiation dosage to achieve the desired carrier lifetime with the radiation source is thereafter determined from the function 1/.tau. = 1/.tau..sub.o + K.phi., where .tau. is the desired minority carrier lifetime, .tau..sub.o is the initial minority carrier lifetime, K is the determined minority carrier radiation damage factor and .phi. is the radiation dosage. A major surface and preferably the major surface adjoining the anode region of the diodes is then irradiated with the radiation source to the determined radiation dosage.