Abstract: A method of forming extruded structures from a polycrystalline material and structures formed thereby. The method generally entails forming a structure that comprises a polycrystalline material constrained by a second material in all but one direction, with the polycrystalline material having a patterned surface that is normal to the one direction. The polycrystalline material is then selectively heated, during which the second material restricts thermal expansion of the polycrystalline material in all but the one direction normal to the surface of the polycrystalline material. As a result, stresses are induced in the polycrystalline material that cause grain growth from the surface of the polycrystalline material in the one direction. The growth of an individual grain produces an extruded structure that projects above the surface of the polycrystalline material.

Abstract: A method of measuring overlay error comprises forming a first mask having a first alignment array comprising a periodic pattern of first features having a first periodicity, forming a second mask having a second alignment array comprising a pattern of second features having the first periodicity, the first alignment array being adjacent the second alignment array, the first alignment array and the second alignment array forming a combined alignment array, transforming the combined alignment array to produce a transformed array, selecting a first region within the transformed array, inverse transforming the region to produce geometric phase shift information, averaging the phase shift information, converting the averaged phase shift information into a value for misalignment in a first direction corresponding to the first region, repeating the selecting, inverse transforming, averaging and converting using a second region within the transformed array to calculate a value for misalignment in a second direction c

Abstract: A laser system (called a UV Dermablator) and method that enables a clean, precise removal of skin while minimizing collateral damage to the skin underlying the treated region. The depth of ablation can be controlled via feedback from the physiology of the skin, namely the infusion of blood into the area of excision when skin has been ablated to a sufficient depth to produce bleeding. A second laser, such as a uv light source with a different wavelength, to penetrate the blood, heating it sufficiently to coagulate the blood. Other features provide precise control, permitting the epidermis to be removed down to the papillary dermis, following the undulations of the papillary dermis. This lateral and depth control may be accomplished by using careful observation, assisted by spectroscopic detection, to identify when the epidermis has been removed, exposing the underlying dermis, with spatial resolution appropriate for the spacing of the undulations of the papillary dermis.

Abstract: An algorithm which detects tandem repeats (TR) is provided. In an illustrative embodiment, a set of repeating units contained in an input sequence is identified, wherein each given repeating unit satisfies at least the following conditions: (a) a first measure of similarity between adjacent repeating units in the set is greater than a first user defined threshold, and (b) the given repeating unit includes at least one unit having a second measure of similarity with any other unit in the set that is a greater than a second user defined threshold. The method then provides for reporting positions in the input sequence that are covered by the set of repeating units.

Abstract: A gate structure for a semiconductor device, and particularly a MOSFET for such applications as CMOS technology. The gate structure entails an electrical insulating layer on a semiconductor substrate, over which a polysilicon gate electrode is formed. The gate structure further includes a gate conductor that is electrically connected with the gate electrode through a diffusion barrier layer having semi-insulating properties. The composition and thickness of the diffusion barrier layer are tailored so that the barrier layer is effective to block diffusion and intermixing between the gate conductor and polysilicon gate electrode, yet provides sufficient capacitive coupling and/or current leakage so as not to significantly increase the gate propagation delay of the gate structure.

Abstract: A semiconductor substrate has at least one PN junction with dopant atoms at the junction. A non-dopant at the junction provides interstitial traps to prevent diffusion during annealing. In a process for making this, a non-dopant diffusion barrier, e.g., C, N, Si, F, etc., is implanted into the “halo” region of a semiconductor device, e.g. diode, bipolar transistor, or CMOSFET. This combined with a lower annealing budget (“Spike Annealing”) allows a steeper halo dopant profile to be generated. The invention is especially useful in CMOSFETs with gate lengths less than about 50 nm.

Abstract: A method for generating data characterizing an item described by an ordered string of characters, comprises the steps of: (i) for a set of separation metrics each representing a unique number of positions of separation between arbitrary characters in a character group in the ordered string of characters, associating first with each separation metric; generating a set of character groups, wherein each character group comprises at least two characters contained within the ordered string of characters; and (ii) for at least one given character group in the set of character groups, for each given separation metric in the set of separation metrics, generating second data representing number of occurrences that the given character group satisfies the given separation metric; generating third data associated with the given character group, wherein the third data is based upon the second data and the first data; and storing the third data in memory for subsequent use.

Abstract: A method for writing timing marks on a rotatable storage medium, such as on a disk in a disk drive, includes the steps of: 1) during a rotation of the disk, detecting the passage of at least a portion of a first timing mark located at a radial trajectory at a first radius of the disk, and 2) during the same rotation of the disk, writing a second timing mark at a second radius of the disk. The second timing mark is located at least one of a) where at least a portion of the second timing mark overlaps at least a portion of the radial trajectory of the first timing mark, and b) where the second timing mark is in close proximity to the radial trajectory of the first timing mark. The second timing mark is written based on different parameters such as a measured time interval, a calculated time interval, and a predetermined delay.

Abstract: The basic idea comprised of the present invention is to provide a translation lookaside buffer (TLB) arrangement which advantageously uses two buffers, a small first level TLB1 and a larger second level TLB2. The second level TLB feeds address information to the first level TLB when the desired virtual address is not contained in the first level TLB. According to the invention the second level TLB is structured advantageously comprising two n-way set-associative sub-units of which one, a higher level unit covers some higher level address translation levels and the other one, a lower level unit, covers some lower level translation level. According to the present invention, some address information holds some number of middle level virtual address (MLVA) bits, i.e., 8 bits, for example, being able to serve as an index address covering the address range of the higher level sub-unit.

Abstract: Computer systems may be used to generate and display objects represented by triangles defined by coordinates of vertices. The present invention generates coordinates of a simplified vertex based upon coordinates of vertices adjacent to a first vertex and to a second vertex that define an edge of the triangles. First, a set of triangles that are adjacent to the edge is identified, Second, a first volume associated with the set of triangles is calculated. Finally, the coordinates of the simplified vertex are calculated such that a second volume associated with the simplified vertex corresponds to the first volume. In addition, a technique is presented that generates a second object which is a simplified representation of a first object. The technique begins by identifying first and second vertices that define an edge. The coordinates of a simplified vertex that corresponds to first and second vertices of the edge is determined. Error values and tolerance values are assigned to vertices.

Abstract: A system for reliable multicast transmission [multicasting data packets] in a packet-based data network includes mechanisms for performing the following: (1) preparing at least one packet comprising a payload portion and multicast route information, an error detection mechanism; (2) transmitting the packet to at least one intermediate node for delivery to at least two destination nodes; (3) waiting for a period of time for at least one acknowledgment signal indicating receipt of the at least one packet by at least one destination node; and (4) retransmitting a packet to a set of destination nodes from which no positive acknowledgment has been received. The multicast routing information includes information for use by the at least one intermediate node to forward the packet to at least two destination nodes.

Abstract: A method of enriching the surface of a substrate with a solute material that was originally dissolved in the substrate material, to yield a uniform dispersion of the solute material at the substrate surface. The method generally entails the use of a solvent material that is more reactive than the solute material to a chosen reactive agent. The surface of the substrate is reacted with the reactive agent to preferentially form a reaction compound of the solvent material at the surface of the substrate. As the compound layer develops, the solute material segregates or diffuses out of the compound layer and into the underlying substrate, such that the region of the substrate nearest the compound layer becomes enriched with the solute material. At least a portion of the compound layer is then removed without removing the underlying enriched region of the substrate.

Abstract: A process of fabricating a CMOS device having an enhanced ultra-shallow junction in which substantially no transient enhanced diffusion of dopant occurs is provided. Specifically, the CMOS device having the aforementioned properties is formed by implanting a dopant into a surface of a Si-containing substrate so as to form a doped region therein; forming a metal layer on the Si-containing substrate; and heating the metal layer so as to convert the metal layer into a metal silicide layer while simultaneously activating the doped region, whereby vacancies created by this heating step combine with interstitials created in step (a) so as to substantially eliminate any transient diffusion of the dopant in said Si-containing substrate.

Abstract: A method, system and article of manufacture for providing access frontier page(s) around all accessible memory pages loaded from an object-oriented database to prevent simultaneous access by multiple threads to an initializing page. On initializing the root pages from an object-oriented database including bringing them into memory and swizzling pointers in the pages, access frontier pages corresponding to each swizzled pointer are initialized and marked as inaccessible. All pointers contained in these access frontier pages that do not point to either an initialized and accessible page such as a root page or another access frontier page have page table entries created for them and are marked inaccessible. Any dereference of a pointer that causes a fault must be an access to an object on an access frontier page.

Abstract: For optimizing access to system memory having a plurality of memory banks, interleaving can be used when storing data so that data sequences are distributed over memory banks. The invention introduces an address-mapping method applying a table lookup procedure so that arbitrary, non-power-of-two interleave factors and numbers of memory banks are possible for various strides.

Abstract: The present invention is directed to expanding the scope of execution optimization by method inlining in a language with a security facility such as Java. More particularly, the present invention is directed to a step of generating a code necessary for looping by a tail recursion for a first method including an invocation of a method whose process after its invocation is indefinite and which includes a self recursion, and a step of generating a code for counting the number of iterations of the loop are included. SecurityManager corrects the depth of the frame associated with a second method in the storage area by using the count value by the code for counting the number of iterations of the loop.

Abstract: A method of forming nano-scale features with conventional multilayer structures, and nano-scale features formed thereby. The method generally entails forming a multilayer structure that includes a polycrystalline layer and at least one constraining layer. The multilayer structure is patterned to form first and second structures, each of which includes the polycrystalline and constraining layers. At least the first structure is then locally heated, during which time the constraining layer restricts the thermal expansion of the polycrystalline layer of the first structure. As a result, stresses are induced in the polycrystalline layer of the first structure, causing substantially two-dimensional grain growth from the edge of the first structure. Sufficient grain growth occurs to produce a third structure which, based on the grain size of the polycrystalline layer, will be a nano-scale structure.

Abstract: A method of forming a semiconductor device, includes forming at least one conductive island having a predetermined sidewall angle in a conductive substrate, forming a dielectric material over the at least one island, forming a conductive material over the dielectric material, and forming a contact to the conductive material and the at least one island.

Abstract: In this invention streaming video data is embedded within a panoramic image for display. The invention teaches a method and system for displaying an image of a scene of interest from a stored environment map of the scene and from video data of the scene. The method includes the steps of: (A) receiving and storing the video data of the scene; (B) selecting an orientation of the scene; (C) retrieving video data according to the selected orientation of the scene; (D) rendering the environment map according to the selected orientation of the scene to generate a first image for the selected orientation; (E) synchronously combining the retrieved video data and the first image to form a composite image for the selected orientation of the scene of interest; and (F) displaying the composite image. In one embodiment the method for displaying the image of the scene of interest further includes a step of continuously receiving video data packets that include image data and sound data.

Abstract: A semiconductor device such as a P-N or P-I-N junction diode, includes a first semiconductor layer having a first conductivity-type and being mounted over a metal address line, and a second semiconductor layer having a second conductivity-type and being mounted over the first semiconductor material. The diode preferably has a thickness of substantially no more than about 1 micron, and the diode includes a P-N junction confined to a thickness of less than about 0.1 micron. In the preferred embodiment the method comprises depositing a first semiconductor layer having a first conductivity type, depositing a second intrinsic layer, annealing to convert both layers to a polycrystalline layer, implanting ions of a second conductivity type into the second layer, and annealing to convert the second layer to a polycrystalline. The result is a diode having an ultra-sharp p-n junction.