Abstract: In an embodiment, a tuner circuit includes an inter-chip receiver circuit configurable to couple to a first inter-chip communication link to receive a first data stream and includes an analog-to-digital converter configured to convert a radio frequency signal into a digital version of the radio frequency signal. The tuner circuit further includes a digital signal processor coupled to the inter-chip receiver circuit and the analog-to-digital converter. The digital signal processor is configurable to generate an output signal related to at least one of the first data stream and the digital version of the radio frequency signal based on a selected operating mode.

Abstract: In a particular embodiment, a data storage device is disclosed that can include a data storage medium having a device failure partition including a device failure log to store operational state information. The operational state information can include commands, data, performance data, and environmental data associated with the data storage device. The data storage device can further include a controller adapted to selectively store the operational state information to the device failure log in a first-in first-out (FIFO) order representing recent states of the data storage device.

Abstract: A method is disclosed for preserving data in a hard disk drive, in which data loss due to adjacent track erase (ATE) phenomenon can be minimized by relocating data, which is written in a zone where the ATE phenomenon is likely to occur since frequency of use is high, to another zone having a low TPI when writing the data in a disk.

Abstract: The disclosure is related to data storage systems having multiple cache and to management of cache activity in data storage systems having multiple cache. In a particular embodiment, a data storage device includes a volatile memory having a first read cache and a first write cache, a non-volatile memory having a second read cache and a second write cache and a controller coupled to the volatile memory and the non-volatile memory. The memory can be configured to selectively transfer read data from the first read cache to the second read cache based on a least recently used indicator of the read data and selectively transfer write data from the first write cache to the second write cache based on a least recently written indicator of the write data.

Abstract: Digital rights management (DRM) can be effectively implemented through use of an anchor point and binding records in a user domain and backed up through use of an escrow anchor point and an escrow binding record in an anchor point based digital rights management system. An escrow binding record provides additional functionality and reliability to a DRM system by allowing a user to use of digital content even after an access device has been lost or compromised.

Abstract: An apparatus includes a memory that is allocated to reported portions and overprovisioned portions. The apparatus includes an error correction circuit that communicates with the memory in error correction coded data that has a controllable ECC length. The ECC length is a function of a history of error reports. A memory allocation engine balances a size of the overprovisioned portions to maintain a size of the reported portions. The balancing is performed as a function of an average of ECC lengths in the ECC length table over a time interval in which a size of the memory decreases with accumulated erase cycles of the memory.

Abstract: The present disclosure provides a system and method for wear leveling. In one example, the method includes receiving first data to be stored to a first data storage medium and storing the first data to a first storage location in a nonvolatile data store of a second data storage medium comprising a solid-state memory. The method also includes setting a pointer to enable writing second data that is received to a next storage location in the nonvolatile data store. The next storage location comprises an address of the nonvolatile data store that is sequentially after an address of the first storage location. When the address of the first storage location is a last addressed location of the nonvolatile data store the pointer is set to enable writing the second data to a first addressed location of the nonvolatile data store.

Abstract: A precision oscillator for an asynchronous transmission system. An integrated system on a chip with serial asynchronous communication capabilities includes processing circuitry for performing predefined digital processing functions on the chip and having an associated on chip free running clock circuit for generating a temperature compensated clock. An on-chip UART is provided for digitally communicating with an off-chip UART, which off-chip UART has an independent time reference, which communication between the on-chip UART and the off-chip UART is effected without clock recovery. The on-chip UART has a time-base derived from the temperature compensated clock. The temperature compensated clock provides a time reference for both the processing circuitry and the on-chip UART.

Abstract: A storage device has a storage medium, a set of credentials stored on the storage medium, and a controller. The controller within the storage device is coupled to the storage medium, and adapted to identify security status of the storage device. The controller is adapted to alter one or more credentials of the set of credentials responsive to the security status.

Abstract: A clock object is provides, which includes a clock time and a monotonic time that are readable by the electronic device. The monotonic time is incremented every read of the monotonic time from the clock object. The clock object can also include an indication of a level of trust of the clock time.

Abstract: A data storage device is provided, including a first data storage device electrically storing write data, a second data storage device magnetically storing write data, and a controller partitioning write data into first and second write data portions. The first write data portion is programmed to the first data storage device and the second write data portion if magnetically written to the second data storage device at the same time.

Abstract: In a particular embodiment, a forward error correction (FEC) decoder is disclosed that includes an input responsive to a communication channel to receive sampled bits from a continuous bit stream. The circuit device further includes a logic circuit to alternately provide sets of the received sampled bits from the continuous bit stream to one of a first syndrome generator and a second syndrome generator to correct errors in the sets of sampled bits to produce a decoded output related to the continuous bit stream.

Abstract: A method is disclosed that includes receiving a classification voltage at a powered device from a network. The classification voltage includes a baseline voltage level that is below an operating voltage range of the powered device and includes a sequence of distinct signal elements derived from the classification voltage. The method further includes detecting a number of signal elements of the sequence of distinct signal elements. A current is drawn until the number of signal elements exceeds a predetermined number.

Abstract: A low-noise amplifier (LNA) includes an input terminal for receiving an input signal, an output terminal for providing an output signal related to the input signal. The LNA further includes a first transistor having a first source coupled to the input terminal through the first capacitor, a first gate configured to receive a first direct current (DC) bias signal, and a first drain coupled to the output terminal. The LNA also includes a second transistor having a second source coupled to the input terminal through the second capacitor, a second gate configured to receive a second DC bias signal, and a second drain coupled to the output terminal.

Abstract: In an embodiment, an electrical over-stress (EOS) circuit includes a detection circuit coupled between first and second supply terminals and configured to detect a perturbation in a supply voltage potential between the first and second supply terminals or between a supply voltage potential and a pad voltage of a bond pad. The EOS circuit further includes an alert generation circuit configured to store data indicating an EOS event in response to detecting the perturbation.

Abstract: A storage device has a storage medium, a key generator and a controller. The key generator generates an encryption/decryption key from selected bits of program code within the storage device. The controller controls access to the storage medium and applies the encryption/decryption key to encrypt and decrypt data written to or read from the storage medium.

Abstract: A fixed disc drive includes a built-in user level security system. The system includes instructions that create an user interface upon a computer allowing interaction with security features of the drive without relying upon BIOS compatibility. In a specific embodiment, the user level security interface is provided by the disc drive during the system boot sequence. A method of disc drive security includes receiving a request from a computer to provide an operating system, and responsively providing user level security interface instructions. The user level security instructions are then executed by the computer to generate a user level security interface. If the drive is in a locked state, the interface requires an user to provide an acceptable password otherwise access to data on the drive is forbidden or otherwise restricted.

Abstract: Digital content protection can be effectively implemented through use of an anchor point and binding records in a user domain. An anchor point domain may include a secure anchor point, and data storage to store digital property instances and rights objects. The secure anchor point may be configured to receive a title pre-key from the rights object and use a binding key to decrypt the title pre-key to yield a title key. The binding key may include data uniquely associating the encrypted digital property instance with the secure anchor point.

Abstract: A method is provided for preventing a peripheral device such as an ATA disc drive, which is restricted to use with a designated host, being hot-plugged to another system after the drive is unlocked. Thus, violation of privacy of data (eg. music/video) stored on the drive through a hot-plug attack may be avoided. This is accomplished by maintaining time synchronization between the drive and its designated host so that both devices obtain the same seed from time information to generate a validation number at any time that a read/write command is issued from the host.

Abstract: A method of establishing security in an electronic device. The method includes generating a statistically unique root key value and storing the root key value in a one-time programmable memory of the device. The method also includes isolating firmware in the device from access to the root key value. The root key value is used as a root of trust that ensures that each electronic device has its own key. In general, the root key is used to encrypt other keys in the device. In different aspects, a root key test value, which is utilized to test the root key, and other security features such as a re-purpose number and a cipher block chaining re-purpose value are included to protect the electronic device from unauthorized access. An electronic device that includes these security features is also provided.