Abstract: A garage door bracing arrangement comprises a plurality of vertically extending door-stiffening column members, which are pivotally attached to upper mounting brackets affixed to garage building structure directly above the garage door opening. Lower mounting brackets are affixed to second ends of the column members and are anchored to the garage floor directly beneath the upper mounting brackets. The door-stiffening column members are configured as generally hollow, rigid, telescoping sections having longitudinal channels which retain fasteners that project from sides of the telescoping sections, so as to pass through holes in mounting brackets that affix the door-stiffening column members to the garage building structure, and deflection brackets that secure the door-stiffening column members to door panel hinge joints.

Abstract: A hybrid surge protector architecture is configured to accommodate a plurality of replaceable L-shaped communication signal surge protection modules and a multi receptacle AC voltage terminal strip in the same housing architecture. The modules may be configured to provide surge protection for different types of communications signal lines. The hybrid surge protector has a housing structure which contains a floor, a vertical wall and convex cover. A first portion of the wall has an opening in which an AC voltage terminal strip is installed. A second portion of the wall has an aperture for a plurality of communication signal surge protection circuit modules. Hot and neutral leads of the terminal strip are coupled to input ports of the AC voltage surge protection circuit. A reference ground conductor for the terminal strip and the AC voltage surge protection circuit is mounted along the housing floor adjacent to the terminal strip.

Abstract: To derive a clock embedded in a digital data stream, a variable data rate synchronizer includes a data rate estimator that derives an estimate of the data rate of data contained in the digital data signal, and a frequency estimator that derives an estimate of the frequency of the output of a voltage controlled oscillator. A phase lock loop includes a phase detector to which the digital data signal and the output of the voltage controlled oscillator are coupled and has an output coupled to a sweepable loop filter. The output of the loop filter is coupled to the voltage controlled oscillator. During an initital frequency acquisition mode, the sweep controller sequentially varies an analog voltage applied to the voltage controlled oscillator, until the estimate of the data rate effectively corresponds to the estimate of the frequency of the output of the voltage controlled oscillator.

Abstract: A composite circuit card architecture conforms with a prescribed form factor for installation in a card slot and connection to a backplane of a multiple circuit card-supporting housing. Only a portion of the card is comprised of printed wiring board material, while the remainder, where no printed circuit components are installed, is a support substrate formed of a material other than that of said printed wiring board. Also, a front panel portion is formed of the material other than that of the printed wiring board, such as plastic integrally molded with the support substrate, thereby significantly reducing the cost associated with the conventional approach of making the entire card from printed circuit board material. At one communication link, such as a ribbon cable, may be coupled between the printed wiring board and at least one input/output port at the front panel.

Abstract: A test set interface automatically determines the type of communication link to which it is coupled, and then configures internal test circuitry to support testing of that particular type of line, irrespective of which of a plurality of different types of communication signals the line may be conveying. The interface includes a multiconductor line cord, end connections of which are configured for connection with any of multiple types of telecommunication circuits. A telecommunication circuit analysis is coupled to the line cord and to test circuitry, and is operative to analyze electrical characteristics of a respective telecommunication circuit to which the line cord is selectively connected by a test set microcontroller, so as to determine which of the different types of communication signals is being conveyed by the telecommunication circuit.

Abstract: Spurious energy suppression for a data communication system is achieved without using a large order noise suppression filter, by means of a post-mixer tracking filter that contains a current-controlled MOSFET-implemented resistance for a transconductance-capacitance filter and an associated transconductance tuning stage. The MOSFET-implemented resistance is controlled by the same control current that establishes the output frequency. As a result, the cut-off frequency of the tracking filter is linearly proportional to the carrier and independent of absolute processing parameters and temperature.

Abstract: A wideband circularly polarized antenna comprises a crossed-element spatial quadrature arrangement of log-periodic antenna elements. The orientation of one of the antenna arms of each diametrically opposed pair of arms is reversed from four port rose configuration, so that the antenna arms of each of the two pairs of elements have mutual mirror symmetry. As a result, each pair of antennal arms may be fed by phase quadrature ports of the same ninety degree hybrid, thereby significantly reducing the complexity of the feed network.

Abstract: A greeting card and gift display kit is configured to instill a sense of surprise in an examining customer, so that the customer feels as though he or she is the recipient of a gift, and thereby receives emotional enjoyment, and is motivated to purchase the card and gift for someone else. The kit includes a transparent display case containing a gift box in which both the gift and the card are inserted upside-down, plus wrapping materials for the gift box. The greeting card is placed on top of the box lid facing the front side of the display case, so that a `gift-related` expression on the greeting card is viewable through the front of the display case. A folded card containing use instructions and an aperture for viewing the open gift box from the rear of the display case is inserted in the bottom of the display case.

Abstract: A digitally implemented, look-up table-based, predistortion and feed-forward correction signal processing mechanism compensates for distortion generated in the RF power amplifier. The input signal to the RF amplifier is stored for comparison with the measured the RF output. In each of predistortion and feed-forward signal processing paths, the magnitude of the complex waveform of the input signal is extracted to derive a read-out address to a dual-port RAM which stores weights to be multiplied by the input signal. In the predistortion signal processing path, the product is coupled to the RF power amplifier. In the feed-forward correction loop, the product is amplified by an auxiliary feed-forward RF amplifier and coupled into the amplified output signal path of the RF power amplifier.

Abstract: A hybrid system for stabilizing the attitude of an instrument relative to a dynamic platform includes a plurality of (roll, pitch and yaw) inertial rate sensors, whose outputs are sampled at a rate sufficient to provide real time tracking of changes in orientation of the platform, and a global positioning system (GPS) receiver, whose precision platform attitude output is updated periodically, but at a rate less than the rate of change of attitude of the platform. The inertial rate sensors provide effectively continuous motion (e.g., angular rate) data signals representative of three-dimensional changes in attitude (position derivative signals) of the platform. The inertial rate output are integrated to provide output signals representative of the dynamic orientation of the platform. Sequential outputs of the integration-processing circuitry are also coupled to a sample buffer, which is controllably read-out in accordance with the periodic updates from the GPS receiver.

Abstract: A load device for an MOS transistor, such as that of a memory cell, includes a differentially doped vertical JFET structure that contains two separate and distinct opposite conductivity type regions. The interior region has the same conductivity as the well in which the JFET is formed, and is surrounded by the JFET channel region which has a generally annular shape. The pinch-off voltage of the annular vertical JFET channel is established by its cross-sectional thickness and doping profile. This reduced thickness, annular-shaped, vertical JFET channel provides a limited current flow path that can be very precisely tailored to restrict current flow to what is essentially a leakage current path, and thereby provide a very high load impedance.

Abstract: In order to ensure continuous telephone service to a customer premises served by an ISDN line, without requiring that the customer maintain an additional POTS line as an emergency back-up to the normally used ISDN service, ISDN signalling circuits and network termination interface components are modified, so that, in the event of a loss of power to customer premises digital communications equipment, a communication link between an auxiliary POTS telephone and the normal ISDN communication path to the central office may be established. There need not be any modification of the central office switch, per se, so that the integrity of the ISDN communication path with the central office line card remains unaffected. As a result, the central office equipment can continue to conduct standard ISDN communications with the customer premises equipment, even though the customer is employing a POTS back-up analog phone.

Abstract: A ring-trip circuit monitors the voltage developed across a source resistor coupled to one of the leads of the subscriber line circuit, regardless of the ringing frequency of the ringing voltage applied to the line circuit, and irrespective of the polarity of the DC loop current developed in the line. In response to detecting a prescribed threshold level of the source resistor voltage--indicating that the customer has answered the call, the ring-trip circuit provides a digital output that is read by the control equipment of the central office to terminate the ringing voltage.

Abstract: A D4 channel bank data bus monitoring scheme automatically determines if a channel unit connector slot is occupied, without having to gain physical access to the interior of the channel bank cabinet and inspect the channel bank's backplane slot positions. To this end, for a respective channel unit connector slot the channel bank's transmit data bus, which is initially pulled high via a pull-up resistor, is monitored for an all `1`s state. If the data on the bus is not all `1`s, then it is inferred that a channel unit is installed. If an all `1`s state is not detected, then, during the next time slot for that channel unit, the bus is decoupled from the pull-up resistor and coupled instead to a `soft` pull-down resistor. If the data on the bus is now all `0`s, it is inferred that the previously read all `1`s condition was due to the fact that no channel unit is installed, and the channel unit connector slot is declared as empty.

Abstract: A (monofilar or bifilar) helical antenna feed arrangement optimizes the efficiency of converting DC power of RF power amplifier circuitry into radiated power by means of a multi RF amplifier and port feed arrangement, that is exclusive of a lossy hybrid combiner. The arrangement combines the power conversion efficiencies of each of a plurality of RF amplifiers in an effectively lossless manner, and feeds the outputs of such RF power amplifiers, to respectively spaced apart, impedance matched, near end field feed locations of the helical antenna. A signal divider and associated phase delay circuit are operative to output respective phase-offset versions of a signal to be radiated by the helical antenna, which are offset in phase with respect to one another by the electrical phase differential between the spaced apart feed locations of the helical antenna.

Abstract: Controlled activation of a message-waiting light of a telephone unit of a PBX system, that is coupled over a two-wire link to a foreign exchange subscriber circuit terminating a digital communication link, is carried out by hardware and software modifications to each of FXO and FXS channel units at opposite ends of the digital communication link. These modifications are effective to rob redundant signalling bits of extended superframe format time division multiplexed digital communication signals to transport a prescribed request code, that instructs the FXS circuit to generate a message-waiting light driving signal on the tip-ring pair to the message-waiting phone.

Abstract: The transmission distance for DDS subscriber lines over a repeaterless four-wire link is extended to customer premises beyond the standard four-wire loop range of approximately 18 kft (56 kbps, 56 kbps with secondary channel capability, and 64 kbps) by employing commercially available ISDN transceiver chip hardware to multiplex a DDS data channel into quarter-rate (2B1Q) ISDN channels. At least one of a signalling channel and an out-of-band maintenance channel is used to convey differential delay compensation information, without modifying the framing structure of the transported channels, or requiring additional bandwidth for a separate framing channel.

Abstract: The control software of a central office-installed ringback test device is augmented to allow a craftsperson to test the operability of a caller identification, call-waiting (CIDCW) class of service of a line, without participation of another technician at the central office. Rather than instructing the craftsperson to go back in-hook, the SASS's microcontroller maintains the trunk circuit through which the incoming call is coupled to the SASS in a suspended, continuously monitored state, so as to effectively busy out the calling line. The SASS then places a return call to the calling number by way of the ringback line, which by-passes the trunk, to the central office switch.

Abstract: Pre heat-treatment processing of a silicon wafer to grow a hydrophilic oxide layer includes an initial step of contacting the wafer with a pre-clean SC-1 bath, thereby producing a silicon wafer surface that is highly particle free. After a deionized water rinse, the wafer is scoured with an aqueous solution containing hydrofluoric acid and hydrochloric acid to remove metallic-containing oxide from the wafer surface. In order to grow a hydrophilic oxide layer, an SC-2 bath (containing hydrogen peroxide and a dilute concentration of metal-scouring HCl) is used. The resulting hydrophilic silicon oxide layer grown on the surface of the silicon wafer using the combined SC-1.fwdarw.HF/HCL.fwdarw.SC-2 wafer cleaning process has a metal concentration no greater than 1.times.10.sup.9. The diffusion length of minority carriers is increased from a range on the order of 500-600 microns to a range on the order of 800-900 microns.

Abstract: A `virtual` encryption scheme combines selected ones of plurality of different encryption operators stored in an encryption operator database into a compound sequence of encryption operators. Data to be transported from a data source site, such as a user workstation, to a data recipient site, such as another workstation, is sequentially encrypted by performing a compound sequential data flow through this sequence prior to transmission. Because of the use of successively different encryption operators, the final output of the sequence will be a compound-encrypted data stream that has no readily discernible encryption footprint. Therefore, even if a skilled data communications usurper possesses a decryption key for each encryption operators, there is a very low likelihood that he would be able to recognize the characteristics of any individual encryption operator.