Abstract: An apparatus generally comprising a first circuit, a second circuit and a third circuit is shown. The first circuit may be configured to generate a phase signal by dividing each cycle of an output clock into a plurality of phase values. The second circuit may be configured to generate an intermediate data signal by interpolating an input data signal sampled with an input clock in response to the phase signal and the output clock. The third circuit configured to generate an output data signal by sampling the intermediate data signal with the output clock.
Abstract: A system and method is described that enables a health care provider to monitor and manage a health condition of a patient. The system includes a health care provider apparatus operated by a health care provider and a remotely programmable patient apparatus that is operated by a patient. The health care provider develops a script program using the health care provider apparatus and then sends the script program to a remotely programmable patient apparatus through a communication network such as the World Wide Web. The script program is a computer-executable patient protocol that provides information to the patient about the patient's health condition and that interactively monitors the patient health condition by asking the patient questions and by receiving answers to those questions. The answers to these health related questions are then forwarded as patient data from the remotely programmable patient apparatus to the health care provider apparatus through the communication network.
Abstract: A series-shunt switch is provided. The switch includes a PIN diode having an input electrical terminal, an output electrical terminal and a thermal terminal. The thermal terminal is configured to provide continuity of diode thermal ground with respect to a circuit thermal ground node.
Type:
Grant
Filed:
June 26, 2007
Date of Patent:
July 13, 2010
Assignee:
M/A-COM Technology Solutions Holdings, Inc.
Inventors:
Anthony Paul Mondi, Joseph Gerard Bukowski
Abstract: An apparatus comprising an encoder, a packet generator, a disc loader, and a rebuild circuit. The encoder may be configured to generate a format data stream in response to an input signal. The packet generator may be configured to generate special packets from extracts of the format data stream. The disc loader may be configured to write the special packets on a disc. The rebuild circuit may be configured to (i) rebuild one or more navigation files and a file system with the special packets and (ii) write the one or more navigation files and the file system to the disc.
Abstract: A die package generally including (A) ground paths routing a power ground from a ground power set of contact pads in a first conductive layer to a ground ring in a second conductive layer, (B) core paths routing a core voltage from a core power set of contact pads in the first conductive layer to a core ring in the second conductive layer, and (C) input/output voltage paths routing input/output voltages from an input/output power set of contact pads in the first conductive layer to an input/output ring in the second conductive layer, (i) the input/output ring surrounding the core ring, (ii) the ring being configured to power input and output circuits of the die, (iii) the input/output ring being split into ring segments isolated from each other and (iv) at least one particular ring segment having a length of less than a single connector pitch.
Type:
Grant
Filed:
February 21, 2008
Date of Patent:
July 6, 2010
Assignee:
LSI Corporation
Inventors:
Clifford R. Fishley, Abiola Awujoola, Leonard L. Mora
Abstract: An N-port memory architecture is disclosed that stores multi-dimensional arrays so that: (1) N contiguous elements in a row can be accessed without blocking, (2) N contiguous elements in a column can be accessed without blocking, (3) some N-element two-dimensional sub-arrays can be accessed without blocking, and (4) all N/2-element two-dimensional sub-arrays can be accessed without blocking. Second, the architecture has been modified so that the above can happen and that any element can be accessed on any data port. The architecture is particularly advantageous for loading and unloading data into the vector registers of a single-instruction, multiple-data processor, such as that used for video decoding.
Abstract: A storage medium for use in a computer to develop a circuit design. The storage medium recording a software tool that may be readable and executable by the computer. The software tool generally includes the steps of (A) receiving a first user input that identifies a specific cell of a plurality of existing cells in the circuit design, the specific cell having a timing characteristic, (B) generating a replacement display corresponding to the specific cell, the replacement display comprising a plurality of alternate cells suitable to replace the specific cell, each of the alternate cells having a different value associated with the timing characteristic of the specific cell, (C) receiving a second user input that identifies a replacement cell of the alternate cells and (D) automatically generating a first engineering change order to replace the specific cell with the replacement cell.
Type:
Grant
Filed:
November 28, 2007
Date of Patent:
June 29, 2010
Assignee:
LSI Corporation
Inventors:
Matthias Dinter, Juergen Dirks, Herbert Johannes Preuthen
Abstract: A communications network, system, and method includes a server; a primary device in communication with the server through a communications channel, wherein the primary device comprises a component that detects data transmissions from the server, and transmits the detected data transmissions; and a secondary device connected to the primary device, wherein the secondary device automatically performs self diagnosis relating to operational performance of the secondary device in response to the data transmissions. The remotely programmable apparatus comprises any of an appliance and an entertainment device, wherein the appliance comprises any of a refrigerator, a telephone, a stove, and a clock. The server generates computer executable commands that are executable by the secondary device and comprises any of queries, instructions, and messages.
Abstract: A system for remotely monitoring an individual. The system includes a server system for generating a script program from a set of queries. The script program is executable by a remote apparatus that displays information and/or a set of queries to the individual through a user interface. Responses to the queries that are entered through the user interface together with individual identification information are sent from the remote apparatus to the server system across a communication network. The server system also includes an automated answering service for providing a series of questions from a stored set of questions for an individual at the remote apparatus to respond to, storing responses to each provided question in the series of questions and providing a service based on the individual's response to the questions.
Abstract: A video decoder comprising a first comfort noise addition block and a second comfort noise addition block. The first comfort noise addition block may be configured to (i) add comfort noise to luminance data and (ii) adjust a distribution of the comfort noise added to the luminance data. The second comfort noise addition block may be configured to (i) add comfort noise to chrominance data and (ii) adjust a distribution of the comfort noise added to the chrominance data. The first and the second comfort noise addition blocks may be integrated into a video output path of the video decoder. The distribution of the comfort noise added to the luminance data and the distribution of the comfort noise added to the chrominance data may be adjusted independently.
Abstract: A diode having a first semiconductor region of a first polarity and a second semiconductor region of an opposite polarity at least partially surrounding the first semiconductor region. A metal contact coupled to the second semiconductor region at least partially surrounding the first semiconductor region. The diode offers improvements in switching speed.
Type:
Grant
Filed:
June 28, 2002
Date of Patent:
May 18, 2010
Assignee:
M/A-COM Technology Solutions Holdings, Inc.
Abstract: An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to (i) receive an image data stream comprising a plurality of frames each having a plurality of regions, (ii) select a particular region to be marked as being homogeneous or not homogeneous, and (iii) determine whether a group of neighboring regions to the selected region are qualified or not qualified. The second circuit may be configured to mark the selected region as being homogeneous when one or more of the adjacent regions are (i) qualified and (ii) previously marked as being homogeneous.
Abstract: A system for remotely monitoring an individual. The system includes a server system for generating a script program from a set of queries. The script program is executable by a remote apparatus that displays information and/or a set of queries to the individual through a user interface. Responses to the queries that are entered through the user interface together with individual identification information are sent from the remote apparatus to the server system across a communication network. The server system also includes an automated answering service for providing a series of questions from a stored set of questions for an individual at the remote apparatus to respond to, storing responses to each provided question in the series of questions and providing a service based on the individual's response to the questions.
Abstract: An N-port memory architecture is disclosed that stores multi-dimensional arrays so that: (1) N contiguous elements in a row can be accessed without blocking, (2) N contiguous elements in a column can be accessed without blocking, (3) some N-element two-dimensional sub-arrays can be accessed without blocking, and (4) all N/2-element two-dimensional sub-arrays can be accessed without blocking. Second, the architecture has been modified so that the above can happen and that any element can be accessed on any data port. The architecture is particularly advantageous for loading and unloading data into the vector registers of a single-instruction, multiple-data processor, such as that used for video decoding.
Abstract: A method for film mode detection is disclosed. The method generally includes the steps of (A) detecting if a plurality of fields in a video signal are in a 3:2 pull-down pattern to control a plurality of first flags based on a plurality of statistics gathered from the fields, (B) detecting if the fields contain moving interlaced text to control a second flag based on both (i) the statistics and (ii) a repeat-field flag of the first flags that indicates repeating consecutive same polarity fields and (C) deciding among a plurality of inverse telecine processes to de-interlace the fields based on all of (i) a 3:2 mode flag of the first flags, (ii) a 3:2 direction flag of the first flags and (iii) the second flag.
Abstract: A method for de-interlacing is disclosed. The method generally includes the steps of (A) determining a plurality of target mode values for a target pixel being synthesized to convert a current field into a current frame, wherein at least two of the target mode values are based on both (i) a plurality of original pixels and (ii) a plurality of synthesized pixels in a plurality of synthesized frames, (B) generating a plurality of candidate values for the target pixel using a plurality of interpolation techniques that includes a motion estimation interpolation utilizing a particular one of the synthesized frames and (C) selecting a particular one of the candidate values for the target pixel in response to the target mode values.
Type:
Grant
Filed:
November 30, 2005
Date of Patent:
April 20, 2010
Assignee:
LSI Corporation
Inventors:
Nien-Tsu Wang, Shi-Chang Wang, Hsi-Chen Wang
Abstract: An apparatus generally having a first circuit and a second circuit is disclosed. The first circuit may be configured to generate a plurality of sum values by adding a plurality of pixel difference values between a current block and a reference block, one of the sum values corresponding to each of a plurality of smallest partitions of the current block. The second circuit configured to (i) generate a plurality of intermediate values from the sum values, one of the intermediate values corresponding to each of a plurality of possible partitions of the current block, (ii) store a plurality of lowest values among the intermediate values as the current block is moved through a search window and (iii) generate a motion signal conveying at least one motion vector based on the lowest values.
Abstract: An apparatus comprising a first circuit, a second circuit, a third circuit and a fourth circuit. The first circuit may be configured to generate a demodulated signal in response to (i) a modulated signal and (ii) a seed value. The second circuit may be configured to generate a first control signal in response to the demodulated signal. The third circuit may be configured to generate a second control signal in response to (i) the first control signal and (ii) a compensation signal. The fourth circuit may be configured to generate the seed value in response to the second control signal.
Abstract: A method for recovering errors on a multiple disk system. The method including the steps of (a) determining a location and type for one or more errors in a plurality of blocks on the multiple disk system, (B) determining a current error of the one or more errors that is closest to a start of the plurality of blocks, (C) recovering data for the current error using data read from drives other than the drive containing the current error and (D) determining whether any further errors are present on the drive that contained the current error.
Abstract: A method for decoding a bitstream is disclosed. The method generally comprises the steps of (A) generating a first signal and a second signal by parsing a common slice in the bitstream, (B) generating a third signal by entropy decoding the first signal, and (C) generating a video signal by combining the second signal and the third signal.