Patents Represented by Attorney Claude A.S. Hamrick
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Patent number: 6278277Abstract: A probe head is used for nuclear resonance measurements during which two different kinds of nuclei are excited by means of radio frequency irradiation in a constant magnetic field. The probe head is provided with a pick-up coil receiving a sample under investigation. The pick-up coil is connected to a first input for feeding a signal of higher frequency for exciting a first kind of nuclei and/or for receiving a resonance signal emitted by the first kind of nuclei. The pick-up coil, further, is connected to a second input for feeding a signal of a lower frequency for exciting a second kind of nuclei and/or for receiving a resonance signal emitted by the second kind of nuclei. The pick-up coil, moreover, is connected to a radio frequency line the electrical length of which corresponds to an integer multiple of a quarter of the wave length of the higher frequency. A series capacitor is interconnected between the radio frequency line and the pick-up coil.Type: GrantFiled: July 19, 1999Date of Patent: August 21, 2001Assignee: Bruker Analytik GmbHInventor: Heinz Zeiger
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Patent number: 6274436Abstract: A method is disclosed for creating a sub-minimum opening in a semiconductor device, comprising the steps of: a) providing a first layer; b) providing a second layer over said first layer; c) providing a third layer over said second layer; d) providing a photoresist mask over said third layer; e) etching said third layer to form defined structures; f) depositing a fourth layer for forming spacers; g) etching said fourth layer to form said spacers; and h) etching said first layer to form an opening in said first layer. In etching the fourth layer to form the spacers, the third layer is generally etched away to form an opening to the first layer, and, in the following step, an opening (or feature) can be etched on the first layer. Generally speaking, the first and third layers can be of any material and should have similar etching rate; the second and fourth layers can be of any material and should have similar etching rate.Type: GrantFiled: February 23, 1999Date of Patent: August 14, 2001Assignee: Winbond Electronics CorporationInventors: Dah-Bin Kao, Albert T. Wu, Tung-Yi Chan
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Patent number: 6263344Abstract: A method for retrieving, decoding, and processing codes in an intermediate language generated from object specifying languages such as HTML and JAVA is disclosed. The codes in the intermediate language are decoded and processed on a minimally featured and minimally powered machine to generate a screen of information with selections thereon for the user. The file corresponding to the chosen selection is retrieved, decoded, processed, and displayed to the user again for selection. Codes in a simple scripting language are also provided to facilitate the processing of commands.Type: GrantFiled: September 18, 1998Date of Patent: July 17, 2001Inventors: Bo Wu, Ling Lu, Jing Wu, Ginohong Xu
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Patent number: 6249901Abstract: An automatic memory characterization system for determining timing characteristics associated with each of a plurality of circuit instances of a memory compiler circuit design includes: an automatic circuit reduction tool for receiving a circuit netlist extracted from layout data defining a circuit instance of the memory compiler, and for generating a critical path netlist; a memory storage unit for storing a timing parameter database including a script file having memory characterization instructions, and at least one specification file associated with one of the timing characteristics to be characterized for the circuit instance, the specification file having a plurality of input signal parameters defining a plurality of input signals to be applied to selected input nodes of the circuit instance, and a plurality of output loading parameters defining a plurality of output loads to be applied to selected output nodes of the circuit instance; a stimulus generator responsive to the input signal parameters and oType: GrantFiled: May 4, 2000Date of Patent: June 19, 2001Assignee: Legend Design Technology, Inc.Inventors: Chen-Ping Yuan, Hung-Ta Wei, You-Pang Wei
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Patent number: 6241607Abstract: An improved multiple payline gaming method and apparatus wherein a multiplicity of independently driven symbol carrying elements are arranged in a non-orthogonal and/or non-rectangular array and are combined with a plurality of individually selectable paylines intersecting various combination of the elements so as to give a game player various degrees of latitude in choosing potential outcomes available as a result of each gaming proposition. Means may also be provided for allowing selection of special payout opportunities based upon certain positional relationships between various ones of the elements and their displayed symbols.Type: GrantFiled: September 16, 1999Date of Patent: June 5, 2001Assignee: Silicon Gaming-NevadaInventors: Tony Payne, Mark C. Nicely
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Patent number: 6239808Abstract: In a computer display system, a method for mapping textures to three dimensional surfaces divided into a one or more polygons including the steps of determining pixels to be utilized in describing a polygon, selecting a texture map having a scale chosen to reproduce accurately a texture value for pixels for a polygon, determining a plurality of texture coordinates of a pixel at a plurality of positions surrounding a center of the pixel, determining texture values at each of the determined positions, and blending the texture values at the points to produce a texture value for the pixel.Type: GrantFiled: April 3, 1998Date of Patent: May 29, 2001Assignee: Nvidia CorporationInventors: David Kirk, Curtis Priem
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Patent number: 6236839Abstract: A smart antenna system includes: an antenna array including a plurality of antenna elements, and at least one calibration element; a plurality of transceiver units each having a port coupled with an associated one of the antenna elements, a receive port, and a transmit port; a transceiver calibration unit including a port coupled with the calibration element via a coaxial cable, a receive port, and a transmit port; and signal processing means communicatively coupled with each of the receive ports and the transmit ports of each of the transceiver units, and coupled with the calibration receive port and the calibration transmit port of the calibration unit. A transmitter calibration path associated with each antenna element extends from the transmit port of the associated transceiver unit to the associated antenna element, from the associated antenna element to the calibration element, and from the calibration element to the receive port of the calibration unit.Type: GrantFiled: December 16, 1999Date of Patent: May 22, 2001Assignee: UTStarcom, Inc.Inventors: Yucong Gu, Shiping Li, Zhang Ping Yang
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Patent number: 6231732Abstract: A cylindrical carriage sputtering system for disk, wafer, and flat panel substrates (20) comprising a cylindrical shaped vacuum sealed passageway formed by two concentric inner (11) and outer hollow cylinders (12), along with a top and a bottom sealing flange (13, 14). A central hollow cylinder (15), disposed between the inner (11) and outer cylinder (12), includes substrate-carrying openings and serves as a cylindrical carriage which substantially fills the sealed passageway and is rotatable in predetermined steps. Novel substrate processing devices (16) for deposition, heating, and cooling are attached around the circumference of the inner and outer cylindrical walls. Vacuum pumps are located between substrate processing devices (16). The openings in the cylindrical carriage are each fitted with thermally isolated substrate holders (19) for supporting a multiplicity of substrates (20).Type: GrantFiled: September 2, 1999Date of Patent: May 15, 2001Assignee: SciVacInventors: Dennis R. Hollars, Robert B. Zubeck
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Patent number: 6226275Abstract: A time division duplex switching circuit provides for selectively coupling signals between an antenna and a front stage transceiver circuit. The switching circuit is operative in a transmit mode and in a receive mode, and includes: a transmitter amplifier having an input and an output; a receiver amplifier having an input and an output; a first circulator including a first port coupled for communication with the front stage transceiver, a second port selectively coupled with the output of the receiver amplifier via a first switching, and a third port selectively coupled with the input of the transmitter amplifier via a second switching; and a second circulator including a first port coupled for communication via the antenna, a second port coupled with the input of the receiver amplifier, and a third port coupled with the output of the transmitter amplifier.Type: GrantFiled: August 25, 1999Date of Patent: May 1, 2001Assignee: UTStarcom, Inc.Inventors: Zhang Ping Yang, Shiping Li, Yucong Gu
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Patent number: 6226012Abstract: A method which evaluates each sequence of pixels provided in a polygon to determine whether the pixels vary linearly, selects sequences of adjacent pixels which vary linearly, determines a processing factor for the sequence of pixels, processes only every one of a selected number of pixels of the sequence, and interpolates the data for pixels of the sequence between the processed pixels after the processed pixels have been processed.Type: GrantFiled: April 2, 1998Date of Patent: May 1, 2001Assignee: Nvidia CorporationInventors: Curtis Priem, David Kirk
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Patent number: 6226370Abstract: A pager system connectable to the existing telephone wiring for activation through the normal residential DTMF telephone instruments, the system including a plurality of pager devices, each connected to the phone line between the tip and ring wires, and each pager including an identification circuit to allow it be individually addressed by a person using the phone, whether or not connection has been made through the central office. For use of the system, the keypad of the telephone instrument is used to enter a sequence of characters (e.g., symbols as well as numbers), which comprise an activation sequence. The DTMF activation sequence includes three parts: a header, a pager address (pager identification PID) and a signal identification (SID). The header portion is a sequence which is not used by the central office as part of its available services. The header portion is a system enabling signal that distinguishes the pager system from central office sequences.Type: GrantFiled: February 21, 1997Date of Patent: May 1, 2001Inventor: Lionel C. Shih
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Patent number: 6220617Abstract: An improved coupling device for connecting a towing vehicle to a semi-trailer and including a kingpin for attachment to a trailer and a tractor coupling plate for attachment to a towing vehicle, the tractor coupling plate having locking elements for positive and rotatable grasping of substantially rotationally symmetrical surfaces of the kingpin. The kingpin surfaces are formed by the outer surfaces of a thermally coated sleeve disposed about a kingpin stud and rotatable thereon. A method for corresponding modification of used coupling devices is also disclosed.Type: GrantFiled: June 2, 1999Date of Patent: April 24, 2001Inventor: Walter Hunger
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Patent number: 6219736Abstract: A RAM-based interrupt-driven interface device is disclosed for establishing a communication link between a universal serial bus (USB) host and a microcontroller device for providing a control function, the interface device being operative to receive digital information in the form of command, data and control packets from the host and to process the packets and communicate the processed digital information to the microcontroller device, and in response thereto, the microcontroller device being operative to communicate digital information to the interface device for processing and transfer thereof to the host.Type: GrantFiled: November 12, 1998Date of Patent: April 17, 2001Inventor: Edwin E. Klingman
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Method and apparatus for using an array of grating light valves to produce multicolor optical images
Patent number: 6219015Abstract: A multicolor optical image-generating device comprised of an array of grating light valves (GLVs) organized to form light-modulating pixel units for spatially modulating incident rays of light. The pixel units are comprised of three subpixel components each including a plurality of elongated, equally spaced apart reflective grating elements arranged parallel to each other with their light-reflective surfaces also parallel to each other. Each subpixel component includes means for supporting the grating elements in relation to one another, and means for moving alternate elements relative to the other elements and between a first configuration wherein the component acts to reflect incident rays of light as a plane mirror, and a second configuration wherein the component diffracts the incident rays of light as they are reflected from the grating elements.Type: GrantFiled: January 18, 1996Date of Patent: April 17, 2001Assignee: The Board of Directors of the Leland Stanford, Junior UniversityInventors: David M. Bloom, Andrew Huibers -
Patent number: 6214561Abstract: A method for detecting at least one substance (a ligand) present in a compound library using at least one additional substance (a receptor) that binds to the ligand comprises adding to the compound library such a receptor that has substantially higher molecular weight than the ligand to be identified, and performing of such a spectroscopic measurement technique with the mixture, without isolating the receptor-ligand complex, that can detect those dipolar resonance phenomena which occur upon a binding of a receptor to a ligand.Type: GrantFiled: November 25, 1997Date of Patent: April 10, 2001Inventors: Thomas Peters, Bernd Meyer
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Patent number: 6211547Abstract: A semiconductor memory array and methods therefor is provided herein comprising a substrate; a plurality of memory cell field effect transistors formed on said substrate and being arranged thereon into rows and columns of transistors, each transistor includes a channel region interposed between drain and source regions, and overlaid by a control gate region; a plurality of first diffused elongated regions formed within said substrate that electrically connect in common the drain regions of transistors in respective columns; a plurality of second diffused elongated regions formed within said substrate that electrically connect in common the source regions of transistors in respective columns; and a plurality of elongated conductive line formed over said substrate that electrically connect in common the control gate regions of transistors in respective rows.Type: GrantFiled: November 24, 1997Date of Patent: April 3, 2001Assignee: Winbond Electronics CorporationInventors: Dah-Bin Kao, Loc B. Hoang, Albert T. Wu, Tung-Yi Chan
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Patent number: 6196547Abstract: A process of dealing and drawing cards is provided wherein a player hand including N cards is dealt to the player from a computer card deck. An opponent hand including N cards is dealt to the opponent from the deck. The player and the opponent are provided with opportunity to draw cards. A gaming system determines which cards of the initial opponent hand to hold and which to discard using a play strategy-lookup table in accordance with the present invention. The strategy look-up table is addressed using an address set including all possible hands that could be dealt in an N card poker game. Each address of the address set stores a corresponding optimal hold scenario which provides information indicating which of the particular N cards of a hand to hold and which to discard in order have the greatest probability of winning. Cards are discarded from the initial opponent hand according to the look up table.Type: GrantFiled: February 10, 1999Date of Patent: March 6, 2001Assignee: Silicon Gaming - NevadaInventors: Andrew Pascal, John Kelly, Sharon Glusker, Mark Nicely, Robert (Eagle) Burns
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Patent number: 6194923Abstract: An off-chip driver circuit having a set of input terminals and an output terminal, a pull-up transistor having a controllable path connected between a first power supply and the output terminal of the off-chip driver circuit, a pull-down transistor having a controllable path connected between a second power supply and the output terminal of the off-chip driver circuit, a first controllable path for applying a first voltage at one of the input terminals to a control terminal of the pull-up transistor, the first controllable path functioning in response to voltages at the output terminal below a first value, a second controllable path for applying a second voltage greater than the first voltage to the control terminal of the pull-up transistor, the second controllable path functioning in response to voltages at the output terminal above the first value.Type: GrantFiled: October 8, 1996Date of Patent: February 27, 2001Assignee: Nvidia CorporationInventor: Curtis J. Dicke
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Patent number: 6193607Abstract: A method and apparatus for generating random numbers for use in electronic applications is disclosed. A given sequence of random binary numbers of a certain length can be decoded into several random numbers for a specific application. The upper range values of the random numbers to be decoded determine the number of bits required for the generation of the these random numbers. In the decoding process, the given random binary number divides a range value to generate a remainder and a quotient. The quotient becomes the new random binary number for the generation of other random numbers while the remainder is the generated random number. The process then repeats to generate other random numbers. At the end of the generation process, the last quotient determines the validity of the generated random numbers.Type: GrantFiled: May 9, 1997Date of Patent: February 27, 2001Assignee: Silicon Gaming, Inc.Inventor: Timothy L. Kay
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Patent number: 6191794Abstract: A method which derives for each triangle to be rendered the values of the texture map coordinates in world space and the screen space two dimensional coordinates across the polygon, utilizes the values to provide two bounding boxes, compares the values of sides of the bounding boxes, and uses these comparisons to select a texture map of a scale which will provide an accurate color representation of a texture value for the pixels of the polygon.Type: GrantFiled: April 8, 1998Date of Patent: February 20, 2001Assignee: NVidia CorporationInventors: Curtis Priem, David Schmenk, David Kirk