Patents Represented by Attorney D. A. Marshall
  • Patent number: 8169950
    Abstract: A transmission of information from a secondary to a primary node occurs in a plurality of N logical time durations. The transmission from the secondary to primary node in a wireless network is obtained using a first and a second sequence. Embodiments of the present invention mitigate interference by restricting the choice of the first sequence. Thus, in an embodiment of the invention, the first sequence is selected from a set of M sequences wherein M is strictly less than N. In order to accommodate high-velocity users, the restricted set contains a pair of sequences whose element-wise product is mirror symmetric. In other embodiments of the invention, the choices of the first sequence and second sequence in a time-frequency resource is arranged such that interference is mitigated. A transmission component for K-th logical time duration is obtained from the entire second sequence and K-th element of the first sequence.
    Type: Grant
    Filed: June 10, 2008
    Date of Patent: May 1, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Zukang Shen, Tarik Muharemovic, Pierre Bertrand
  • Patent number: 8170126
    Abstract: A method for transmitting a plurality of sequences across a plurality of bands of a wireless spectrum is described in which a first sequence is produced using a set of reference signal sequences, wherein the set of reference signal sequences comprises at least CAZAC sequences and near-CAZAC sequences. A second sequence is also produced. The first sequence is transmitted in a first band of the wireless spectrum, and the second sequence is transmitted in a second band of the wireless spectrum. The first and the second sequences are transmitted concurrently by a same user equipment.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: May 1, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Tarik Muharemovic, Zukang Shen
  • Patent number: 8171186
    Abstract: A method for performing write transactions in an interconnect fabric is described. A burst write transaction is received by a bridge coupled to a master. The burst transaction is initiated by a command phase that includes a wait state attribute. The bridge is also coupled to a second bus that is coupled to a slave destination device or to another bridge. The bridge may initiate a cut-through transaction to the second bus when the wait state attribute indicates a master inserted wait state will not be incurred during the burst transaction.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: May 1, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Brian Jason Karguth, Denis Roland Beaudoin, Akila Subramaniam
  • Patent number: 8165199
    Abstract: This invention uses a flying adder frequency synthesis circuit to provide the required frequency adjustments to accommodate the varying encoding density of a MPEG2 video data stream. This invention adjusts the local clock based on the information extracted from the program clock reference signal in the incoming data. This invention replaces an external or internal voltage-controlled crystal oscillator using a phase locked loop circuit on the video processing integrated circuit.
    Type: Grant
    Filed: October 20, 2008
    Date of Patent: April 24, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Liming Xiu, Grady Cook, Daniel Dudek, Hongbing Lian, Yihe Hu, Christopher S. Tracy
  • Patent number: 8155972
    Abstract: This invention involves time-scale modification of audio signals. The invention describes overlap and add time scale modification with variable input and output buffer sizes. Seamless speed change is achieved by keeping track of previously processed data to avoid discontinuities during playback speed transitions.
    Type: Grant
    Filed: October 5, 2005
    Date of Patent: April 10, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Atsuhiro Sakurai, Yoshihide Iwata
  • Patent number: 8149296
    Abstract: This invention is a solid-state image pickup device that solves the problem of limited dynamic range in the high luminance region in an image sensor having white pixels. White pixels or yellow pixels and at least red pixels, green pixels or blue pixels are arranged in array form on the light receiving surface of a semiconductor substrate. White pixels or yellow pixels have an additional capacitance CS connected to the photodiode via the floating diffusion, a capacitance coupling transistor S that can couple or separate the floating diffusion and the additional capacitance. The proportion of white or yellow pixels to the total number of pixels is higher in a central portion of the light receiving surface than a peripheral portion. The white or yellow pixel may share a floating diffusion with a red, green or blue pixel.
    Type: Grant
    Filed: May 20, 2009
    Date of Patent: April 3, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Hiromichi Oshikubo, Satoru Adachi, Koichi Mizobuchi
  • Patent number: 8149938
    Abstract: A transmission of information within a wireless cellular network may include a first and second type of information. A subframe is produced that includes a plurality of symbols, wherein at least one symbol is designated as a data symbol and at least one symbol is designated as a reference signal symbol that contains a pre-defined reference signal. The first type of information is embedded in the data symbols. If the second type of data is expected, then the second type of information is embedded in at least one reference symbol by quadrature amplitude modulating the pre-defined reference signal. The subframe is then transmitted from one node in the network to a second node. In some embodiments, if it is determined that the second node is not expecting the second type of information, then a discontinuous transmission (DTX) response is embedded in the reference symbol instead of the second type of information.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: April 3, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Zukang Shen, Tarik Muharemovic, Pierre Bertrand
  • Patent number: 8140944
    Abstract: For transmission of a block of control information within a wireless network, the control information is interleaved to form an ordered set of control bits, wherein more important information bits of the control information are placed into a first portion of the ordered set of control bits, with less important information bits of the control information placed into a second portion of the ordered set of controls bits. The ordered set of control bits is encoded to form an encoded block of data. The encoded block of data is transmitted to a serving base station, wherein bits from the first portion of the ordered set of control bits will statistically have a lower bit error rate (BER) than bits from the second portion of the ordered set of control bits during transmission.
    Type: Grant
    Filed: January 22, 2009
    Date of Patent: March 20, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Runhua Chen, Zukang Shen, Eko Nugroho Onggosanusi
  • Patent number: 8130667
    Abstract: A transport block size (TBS) of a first uplink message (RACH Msg3) transmitted on a Physical Uplink Shared Channel (PUSCH) during a random access procedure in a User Equipment (UE) accessing a radio access network may be determined by receiving a pathloss threshold parameter. A downlink pathloss value indicative of radio link conditions between the UE and a base station (eNB) serving the UE is then determined. A smaller value of TBS is selected from a set of TBS values if the determined pathloss value is greater than an operating power level of the UE minus the pathloss threshold parameter. A larger value of TBS is selected if the pathloss value is less than the operating power level of the UE minus the pathloss threshold parameter and the TBS required to transmit the RACH Msg3 exceeds the smaller TBS value.
    Type: Grant
    Filed: September 21, 2009
    Date of Patent: March 6, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Pierre Bertrand, Shantanu Kangude, Zukang Shen
  • Patent number: 8125885
    Abstract: A method of wireless transmission for estimating the carrier frequency offset in a base station of a received transmission from a user equipment (UE) accessing a radio access network. The method time de-multiplexes selected symbols of a received sub-frame, computes the frequency-domain symbols received from each antenna through an FFT, de-maps the UEs selected sub-carriers for each antenna, computes metrics associated to a carrier frequency offset hypothesis spanning a searched frequency offset window, repeats these steps on subsequent received sub-frames from the UE over an estimation interval duration, non-coherently accumulates the computed metrics and selects the carrier frequency offset hypothesis with largest accumulated metric amplitude.
    Type: Grant
    Filed: July 13, 2009
    Date of Patent: February 28, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Pierre Bertrand, Tarik Muharemovic, Slaheddine Aridhi
  • Patent number: 8120389
    Abstract: To make Flying-Adder architecture even more powerful, a new concept, time-average-frequency, is incorporated into the clock generation circuitry. This is a fundamental breakthrough since it attacks the clock generation problem from its root: how is the clock signal used in real systems? By investigating from this direction, a much more powerful architecture, fixed-VCO-Flying-Adder architecture, is created. Furthermore, based on fixed-VCO-Flying-Adder frequency synthesizer and time-average-frequency, a new type of component called Digital-to-Frequency Converter (DFC) is born.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: February 21, 2012
    Assignee: Texas Instruments Incorporated
    Inventor: Liming Xiu
  • Patent number: 8121835
    Abstract: Automatic level control of speech portions of an audio signal is provided. An audio signal is received in the form of a sequence of samples and may contain speech portion and non-speech portions. The sequence of samples is divided into a sequence of sub-frames. Multiple sub-frames adjacent to a present sub-frame are examined to determine a peak value of samples in the sub-frames. A gain factor is computed for the present sub-frame based on the peak value and a desired maximum value for said speech portion, and each sample in the present sub-frame is amplified by the gain factor. In an embodiment, variations in filtered energy values of multiple sub-frames enable determination of whether a sub-frame corresponds to a speech or non-speech/noise portion.
    Type: Grant
    Filed: March 6, 2008
    Date of Patent: February 21, 2012
    Assignee: Texas Instruments Incorporated
    Inventor: Fitzgerald John Archibald
  • Patent number: 8121194
    Abstract: The latest video-coding standards achieve higher coding efficiency than the previous video standards, while increasing the complexity and the difficulty of encoding. In a skip macroblock prediction mode some coding parameters (such as motion vectors and residual) are not coded. Selecting skip macroblock prediction mode reduces the size of the encoded bitstream while possibly deteriorating image quality. Previously the selection of the skip prediction mode is performed after motion estimation process. This invention determines whether each macroblock should be encoded in skip macroblock prediction mode before motion estimation. This invention substantially reduces computational cost with a very small deterioration in coding efficiency.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: February 21, 2012
    Assignee: Texas Instruments Incorporated
    Inventor: Masato Shima
  • Patent number: 8117398
    Abstract: A prefetch scheme in a shared memory multiprocessor disables the prefetch when an address falls within a powered down memory bank. A register stores a bit corresponding to each independently powered memory bank to determine whether that memory bank is prefetchable. When a memory bank is powered down, all bits corresponding to the pages in this row are masked so that they appear as non-prefetchable pages to the prefetch access generation engine preventing an access to any page in this memory bank. A powered down status bit corresponding to the memory bank is used for masking the output of the prefetch enable register. The prefetch enable register is unmodified. This also seamlessly restores the prefetch property of the memory banks when the corresponding memory row is powered up.
    Type: Grant
    Filed: January 20, 2009
    Date of Patent: February 14, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Sajish Sajayan, Alok Anand, Sudhakar Surendran
  • Patent number: 8117422
    Abstract: The core of this invention is the application of a fast comparison circuit to the problem of address translation. Traditional implementations generate the virtual address and the physical address in series. This invention generates the physical address and virtual address simultaneously. A bitwise operation on the base address, the offset address and each stored virtual address determines whether the base address and offset address sum equals the virtual address without requiring a carry propagate. Circular addressing is implemented in the match determination by masking bits corresponding to the circular address limit.
    Type: Grant
    Filed: February 5, 2009
    Date of Patent: February 14, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Timothy D. Anderson, Kai Chirca
  • Patent number: 8116371
    Abstract: The layered coding technique is employed to achieve the image quality scalability for video coding standards. The desired image quality scalability can be achieved by refining the image coefficients in subsequent enhancement layers. In most cases, the refinement coefficient consists of some binary information such as whether this coefficient is refined in this coding pass, whether this coefficient is positively or negatively refined, etc. Because it is generally difficult to code binary information efficiently with VLC (Variable Length Coding) technology, this disclosure introduces a method to code refinement symbol more efficiently with VLC by grouping the symbols of distinct binary elements.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: February 14, 2012
    Assignee: Texas Instruments Incorporated
    Inventor: Masato Shima
  • Patent number: 8111760
    Abstract: Deblock filtering for Microsoft WMV video decoders partitions the computation so that the deblock filtering operations can be performed on horizontal or vertical stripes or in one pass on oversized macroblocks.
    Type: Grant
    Filed: November 16, 2006
    Date of Patent: February 7, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Ching-Yu Hung, Ngai-Man Cheung
  • Patent number: 8111731
    Abstract: A method of transmitting signals in a communication system over at least two time periods including generating a base signal comprising of at least two samples in each time period, selecting a scrambling sequence of length equal to or greater than the number of time periods, scaling all samples in said signal in a time period with one element of said scrambling sequence and transmitting the scaled signal in said time period. Different elements of the scrambling sequence are used to scale the base signal in different time periods. The signal in each time period is obtained by scaling a base signal. The scrambling sequence is preferably a pseudo-random sequence. The step of scaling all samples in said signal in a time period consists of multiplying all samples of said signal with an element of said scrambling sequence.
    Type: Grant
    Filed: April 3, 2008
    Date of Patent: February 7, 2012
    Assignee: Texas Instruments Incorported
    Inventors: Zukang Shen, Tarik Muharemovic
  • Patent number: 8112668
    Abstract: A method for dynamically broadcasting configuration information to controllers connected in a scan topology in a target system is provided in which a selection event followed by the configuration information is received from a signal line at each of the controllers, wherein the plurality of controllers are connected in parallel to the signal line and the configuration information is stored within each controller that matches a selection criteria following the selection event when the selection event initiates a selection sequence.
    Type: Grant
    Filed: July 29, 2009
    Date of Patent: February 7, 2012
    Assignee: Texas Instruments Incorporated
    Inventor: Gary L. Swoboda
  • Patent number: 8112652
    Abstract: This invention manages power down and wakeup of shared memories in a multiprocessor system. A register for each shared memory has bits corresponding to each master. When a master wants to power down a memory, it sets its corresponding bit in the register. A hardware power down controller for the memory bank powers the memory bank if any processor signals powering the memory bank. The hardware power down controller for the memory bank powers down the memory bank only if all processor signal powering down the memory bank. The hardware power down controller waits for all masters to set their corresponding bits in the register before initiating power down of the memories. Software running on any processor has a view of the shared memory independent of the other processors and no inter-processor communication is needed.
    Type: Grant
    Filed: January 20, 2009
    Date of Patent: February 7, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Sajish Sajayan, Alok Anand, Sudhakar Surendran, Ashish Rai Shrivastava, Joseph R. Zbiciak