Patents Represented by Attorney, Agent or Law Firm Dan Shifrin
  • Patent number: 5841604
    Abstract: In a storage system using multiple disk drives, the disk drive spindles are rotated at the same frequency and at a predetermined phase relationship. A phase angle, measured as the difference between an index mark recorded on the disk and the disk's read head, is used to control the spindle rotation speed. Each of the disk drives are first independently frequency locked to a target frequency, and once frequency locked, each disk drive is phase locked in relation to one another. In the phase locking process, each disk generates a synchronizing signal for synchronizing the rotation of the disks to a predetermined phase relationship. If any one of the disk drives becomes inoperable (due to a failure or "hot-swapping"), the other disk drives remain synchronized since the synchronizing signal is not lost.
    Type: Grant
    Filed: May 6, 1997
    Date of Patent: November 24, 1998
    Assignee: Cirrus Logic, Inc.
    Inventor: Louis Supino
  • Patent number: 5838738
    Abstract: A partial response class-IV (PR4) read channel is disclosed for magnetic recording including a coding scheme which improves timing recovery by providing a more accurate phase error estimate. The conventional 1/(1+D.sup.2) precoder is not used in the present invention (to avoid the ambiguous initial state), so that the read channel can directly control the flux transitions written onto the magnetic disc. This enables the read channel to encode user data according to a criteria that creates well defined slopes in the analog read signal at the sample instances, thereby improving the accuracy of the timing recovery phase error estimate.
    Type: Grant
    Filed: July 29, 1996
    Date of Patent: November 17, 1998
    Assignee: Cirrus Logic, Inc.
    Inventor: Christopher P. Zook
  • Patent number: 5835295
    Abstract: A sampled amplitude read channel is disclosed for disc storage systems which asynchronously samples an analog read signal, equalizes the resulting discrete time sample values according to a target partial response, extracts synchronous sample values through interpolated timing recovery, and detects digital data from the synchronous sample values using a Viterbi sequence detector. The interpolated timing recovery comprises a zero phase restart circuit for minimizing an intial phase error between expected sample values and interpolated sample values at the beginning of an acquisition mode by computing an initial sampling phase offset.
    Type: Grant
    Filed: November 18, 1996
    Date of Patent: November 10, 1998
    Assignee: Cirrus Logice, Inc.
    Inventor: Richard T. Behrens
  • Patent number: 5825582
    Abstract: A sliding mode controller is disclosed for controlling the motion of a read/write head actuated by a voice coil motor over a rotating magnetic disk storage medium. The magnetic disk comprises a plurality of concentric data tracks recorded thereon wherein each data track comprises user data and servo data. The sliding mode controller operates by multiplying a head position error phase state and a head position error velocity phase state by respective switching gains to force the phase states to follow a predetermined phase state trajectory. The phase state trajectory can be defined by a single linear segment, a variable linear segment, multiple linear segments over the entire region of excursion, or optimum parabolic acceleration and deceleration segments. Switching logic, responsive to the phase states and a trajectory segment value .sigma., switches between positive and negative feedback gains to drive the phase states toward a current trajectory segment. A .sigma.
    Type: Grant
    Filed: May 10, 1995
    Date of Patent: October 20, 1998
    Assignee: Cirrus Logic, Inc.
    Inventors: Louis Supino, Paul M. Romano
  • Patent number: 5822337
    Abstract: An apparatus and method of generating redundancy symbols and syndromes which is order-programmable is disclosed. The apparatus and method involves the implementation of an error correcting encoder/decoder for polynomial codes which uses a single circuit to generate check symbols during the transmit operation and to generate syndromes during a receive operation. The selection of roots for the code generator, and hence, the code order is programmable.
    Type: Grant
    Filed: December 1, 1995
    Date of Patent: October 13, 1998
    Assignee: Cirrus Logic, Inc.
    Inventors: Christopher P. Zook, Neal Glover
  • Patent number: 5812336
    Abstract: A sampled amplitude read channel reads user data and embedded servo data stored on a magnetic medium by detecting digital data from a sequence of discrete time interpolated sample values. A write frequency synthesizer generates a write clock for writing digital data to the magnetic medium at a predetermined baud rate for a selected zone, and upon read back, a read frequency synthesizer generates a fixed sampling clock at a frequency slightly higher than the write frequency at the outer zone. A sampling device samples the analog read signal at this fixed sampling rate across the data zones and servo wedges to generate a sequence of discrete time channel samples that are not synchronized to the baud rate. Before sampling, an analog receive filter processes the read signal to attenuate aliasing noise without having to adjust its spectrum across data zones or servo wedges. A discrete time equalizing filter equalizes the channel samples according to a predetermined partial response (PR4, EPR4, EEPR4, etc.).
    Type: Grant
    Filed: December 5, 1995
    Date of Patent: September 22, 1998
    Assignee: Cirrus Logic, Inc.
    Inventors: Mark S. Spurbeck, William G. Bliss, Howard H. Sheerin
  • Patent number: 5802118
    Abstract: A sampled amplitude read channel is disclosed for reading binary data from a computer disk storage system, wherein the read channel sub-samples an analog read signal at a rate lower than the baud rate and detects the binary data from the sub-sampled values using a sequence detector. In one embodiment, the sub-sampled values are interpolated to generate synchronous sample values which are processed by a conventional sequence detector. In another embodiment, the sequence detector is modified to detect the binary data directly from the sub-sampled values. In yet another embodiment, the sequence detector comprises a remodulator and an error pattern detector for detecting and correcting bit errors in the detected binary data. In addition, for the various embodiments a channel code increases the distance property of the sequence detector in order to compensate for the degradation in performance caused by sub-sampling.
    Type: Grant
    Filed: July 29, 1996
    Date of Patent: September 1, 1998
    Assignee: Cirrus Logic, Inc.
    Inventors: William G. Bliss, David E. Reed, Richard T. Behrens
  • Patent number: 5796535
    Abstract: A sampled amplitude read channel incorporated within a magnetic disk storage system for reading data recorded in concentric tracks on a magnetic medium, where the data comprises user data sectors recorded at varying data rates across a plurality of predefined zones and embedded servo data sectors recorded at the same data rate across the zones. The sampled amplitude read channel comprises a timing recovery component for synchronous sampling of a read signal from a magnetic read head positioned over the magnetic medium, a gain control component for adjusting the amplitude of the read signal, and a DC offset component for cancelling a DC offset in the read signal. These components are dynamically configured to operate according to whether the read channel is processing user data or embedded servo data.
    Type: Grant
    Filed: May 12, 1995
    Date of Patent: August 18, 1998
    Assignee: Cirrus Logic, Inc.
    Inventors: Tyson Tuttle, Diwakar Vishakhadatta, Jerrel P. Hein, David R. Welland, David E. Reed, Richard T. Behrens, William G. Bliss, Paul M. Romano, Trent O. Dudley, Christopher P. Zook
  • Patent number: 5793548
    Abstract: A sampled amplitude read channel reads data from a magnetic medium by detecting digital data from a sequence of discrete time sample values generated by sampling pulses in an analog read signal from a read head positioned over the magnetic medium. The digital data comprises a preamble field followed by a sync mark followed by a data field. Timing recovery in the read channel synchronizes to a phase and frequency of the preamble field and a sync detector detects the sync mark in order to frame operation of an RLL decoder for decoding the detected data field. To decrease the probability of early misdetection, the sync mark is chosen to have minimum correlation with shifted versions of the sync mark concatenated with the preamble field. To further increase the fault tolerance, the sync mark detector is enabled by timing recovery relative to the end of the preamble field.
    Type: Grant
    Filed: September 26, 1995
    Date of Patent: August 11, 1998
    Assignee: Cirrus Logic, Inc.
    Inventor: Christopher P. Zook
  • Patent number: 5786951
    Abstract: This invention provides apparatus and a method to assist in calibrating a read channel in a magnetic data storage system. More particularly, the invention provides a read channel including a digital noise generator. During a calibration procedure, the digital noise generator injects an analog noise signal into the read channel, thereby increasing the read channel's bit-error rate, and consequently allowing rapid calibration of the read channel. The digital noise generator comprises a number of linear feedback shift registers that together generate a pseudo-random digital word sequence, and a digital-to-analog converter that converts the pseudo-random digital word sequence into the analog noise signal. The digital-to-analog converter comprises a plurality of one-bit digital-to-analog converters whose outputs are summed by an analog adder.
    Type: Grant
    Filed: June 5, 1996
    Date of Patent: July 28, 1998
    Assignee: Cirrus Logic, Inc.
    Inventors: David R. Welland, Richard T. Behrens, Iuri Mehr
  • Patent number: 5786950
    Abstract: A PR4 sampled amplitude read channel is disclosed which employs an NRZI modulator for writing encoded user data directly to a magnetic disc storage medium instead of using a conventional 1/(1+D.sup.2) precoder. This avoids the ambiguous initial state of the precoder and allows the read channel to directly control the magnetic flux transitions written onto the disc. Upon read back, a PR4 sequence detector outputs a preliminary data sequence which is converted back into the NRZI domain and then decoded into an estimated user data sequence.
    Type: Grant
    Filed: July 29, 1996
    Date of Patent: July 28, 1998
    Assignee: Cirrus Logic, Inc.
    Inventors: Christopher P. Zook, David E. Reed
  • Patent number: 5781365
    Abstract: A sliding mode controller is disclosed for controlling the motion of a magnetoresistive (MR) read head actuated by a voice coil motor over a rotating magnetic disk storage medium. The magnetic disk comprises a plurality of concentric data tracks recorded thereon wherein each data track comprises user data and servo data. The sliding mode controller operates by multiplying a head position error phase state and a head position error velocity phase state by respective switching gains to force the phase states to follow a predetermined phase state trajectory. The phase state trajectory can be defined by a single linear segment, a variable linear segment, multiple linear segments over the entire region of excursion, or optimum parabolic acceleration and deceleration segments. Switching logic, responsive to the phase states and a trajectory segment value .sigma., switches between positive and negative feedback gains to drive the phase states toward a current trajectory segment. A .sigma.
    Type: Grant
    Filed: July 14, 1995
    Date of Patent: July 14, 1998
    Assignee: Cirrus Logic, Inc.
    Inventors: Paul M. Romano, Louis Supino
  • Patent number: 5771127
    Abstract: In a computer disk storage system for recording binary data, a sampled amplitude read channel comprises a sampling device for asynchronously sampling pulses in an analog read signal from a read head positioned over a disk storage medium, interpolated timing recovery for generating synchronous sample values, and a sequence detector for detecting the binary data from the synchronous sample values. The sequence detector comprises a demodulator for detecting a preliminary binary sequence which may contain bit errors, a remodulator for remodulating to estimated sample values, a means for generating sample error values, an error pattern detector for detecting the bit errors, an error detection validator, and an error corrector for correcting the bit errors. The remodulator comprises a partial erasure circuit which compensates for the non-linear reduction in amplitude of a primary pulse caused by secondary pulses located near the primary pulse.
    Type: Grant
    Filed: July 29, 1996
    Date of Patent: June 23, 1998
    Assignee: Cirrus Logic, Inc.
    Inventors: David E. Reed, William R. Foland, Jr., William G. Bliss, Richard T. Behrens, Lisa C. Sundell
  • Patent number: 5768043
    Abstract: A table driven method and apparatus for automatic split field processing in a disk drive system stores data representing the split fields after each servo mark of a frame. Each track of the disk drive system is divided up into frames or groups of sectors or equivalently servo marks, each frame comprising a predetermined number N of sectors and a predetermined number M of servo marks. Beginning from the INDEX mark, after every N sectors or equivalently M servo marks, the next sector must start after the next servo mark. The value N is a constant within each zone on a disk but can vary from zone to zone as the storage density changes. The information for each servo mark within a frame is stored in a frame table in the buffer memory. A starting address pointer and an ending address pointer are used to keep track of the starting and ending addresses, respectively, of the frame table. An address pointer is used to point to the current entry of interest in the frame table.
    Type: Grant
    Filed: October 26, 1995
    Date of Patent: June 16, 1998
    Assignee: Cirrus Logic, Inc.
    Inventors: Siamack Nemazie, Son H. Ho
  • Patent number: 5768228
    Abstract: A method for cancelling optical servo crosstalk within an optical disk drive is disclosed. In accordance with the method and system of the present invention, the optical disk drive system includes a focus control module, a tracking control module, a variable frequency notch filter, and a lookup table. The focus control module is utilized for moving an objective lens in response to a focus error signal in order to maintain a laser beam in an in-focus condition on an optical disk. The tracking control module is utilized for moving a moving optical element in response to a tracking error signal to direct the laser beam onto a desired track position of the optical disk. The lookup table within the focus control module is utilized for storing several sets of tap coefficients for the variable frequency notch filter.
    Type: Grant
    Filed: September 9, 1996
    Date of Patent: June 16, 1998
    Assignee: International Business Machines Corporation
    Inventors: Allen Keith Bates, Alan August Fennema, Tetsuo Semba
  • Patent number: 5761212
    Abstract: A measurement circuit is provided to obtain data for monitoring the quality of performance from a digital read channel. Elements of the digital read channel including a sequence detector are incorporated into an integrated circuit together with the measurement circuit. The measurement circuit relates digitized samples of readback data from a magnetic storage device to surrounding samples so that particular samples can be collected in accordance with their surroundings. The circuit includes a programmable time window which can be repeatedly opened for data collection. The circuit is designed to collect various types of data including the bit error rate, sample value, squared sample error, squared gain error, squared timing error, and the occurrences of sample error when it is outside an acceptable programmable threshold. The measurement circuit includes a signal generator for producing a test pattern that is first stored and then read to produce the digitized readback sample values.
    Type: Grant
    Filed: October 20, 1995
    Date of Patent: June 2, 1998
    Assignee: Cirrus Logic, Inc.
    Inventors: William R. Foland, Jr., Richard T. Behrens, Alan J. Armstrong, Neal Glover
  • Patent number: 5761220
    Abstract: An asynchronous data path controller for reading, correcting, and transferring data on-the-fly from a digital recording device to a host system. Central to the data path controller is a RAM for storing the data as it is read from the recording device and a RAM controller for arbitrating access to the RAM. An error correcting system reads the data from the RAM, corrects the data, and then restores the corrected data back to the RAM before it is transferred to the host system. The error correcting system includes an error syndrome generator and a error location and error value generator. In a first embodiment, the data codewords, comprised of user data and redundancy symbols, are stored from the recording device into the RAM. The error syndrome generator reads the codewords from the RAM, generates error syndromes, and transfers the error syndromes to the error location and error value generator. In an alternative embodiment, the error syndrome generator receives the codewords directly from the recording device.
    Type: Grant
    Filed: May 9, 1997
    Date of Patent: June 2, 1998
    Assignee: Cirrus Logic, Inc.
    Inventor: Christopher P. Zook
  • Patent number: 5760984
    Abstract: A sampled amplitude read channel reads information stored on a magnetic medium by detecting digital data from a sequence of discrete time interpolated sample values, the interpolated sample values generated by interpolating a sequence of discrete time channel sample values generated by sampling pulses in an analog read signal from a magnetic read head positioned over the magnetic medium. A write VFO generates a write clock for writing digital data to the magnetic medium at a predetermined baud rate for a selected zone, and upon read back, the write VFO generates a sampling clock at a frequency slightly higher than the write frequency. A sampling device samples the analog read signal at the sampling clock rate to generate a sequence of discrete time channel samples that are not synchronized to the baud rate, and the channel samples are equalized by a discrete time equalizing filter according to a predetermined partial response (PR4, EPR4, EEPR4, etc.).
    Type: Grant
    Filed: October 20, 1995
    Date of Patent: June 2, 1998
    Assignee: Cirrus Logic, Inc.
    Inventors: Mark S. Spurbeck, Richard T. Behrens
  • Patent number: 5754352
    Abstract: An improved timing recovery phase-locked loop in a partial response recording channel comprising a means for generating a frequency error and a means for generating a phase error represented by a timing gradient. The frequency error is not affected by a DC offset in the input reference signal and is less susciptible to noise due to an increase in sensitivity. A state machine for generating expected samples is used to generate the timing gradient, rather than estimated signal samples, which results in a shorter acquisition preamble. When tracking arbitrary user data, the timing gradient is smoothed to reduce variations in the gain of the loop.
    Type: Grant
    Filed: August 22, 1996
    Date of Patent: May 19, 1998
    Assignee: Cirrus Logic, Inc.
    Inventors: Richard T. Behrens, Trent Dudley, William G. Bliss
  • Patent number: 5754353
    Abstract: A channel quality circuit, incorporated within a sampled amplitude read channel utilized in a magnetic storage system, for processing and accumulating performance data from the individual read channel components, wherein the performance data is used to calibrate the read channel to operate in a particular environment, to estimate the bit error rate of the storage system, and to detect defects in the magnetic medium. The channel quality circuit generates a test pattern of digital data which is written to the storage system. Then, as the test pattern is read from the storage system, the channel quality circuit accumulates performance data from the read channel components. The test pattern is used to generate expected samples and expected sample errors relative to the samples read by the read channel. Gating logic is programmed to accumulate only the particular performance data of interest. The channel quality circuit computes auto and cross-correlations, squared errors, and threshold comparisons.
    Type: Grant
    Filed: November 17, 1994
    Date of Patent: May 19, 1998
    Assignee: Cirrus Logic, Inc.
    Inventors: Richard T. Behrens, William R. Foland, Jr.