Patents Represented by Attorney, Agent or Law Firm David E. Lovejoy
  • Patent number: 4218747
    Abstract: An arithmetic and logic unit (ALU) formed by a small number of different types of basic cells suitable for cellular integration to form large scale integrated (LSI) semiconductor circuits. The arithmetic and logic unit is formed from a plurality of 1-bit ALU cells. Each ALU cell is formed by a plurality of cellular integrated basic cells where each ALU cell includes two data inputs, A and B, and responsively produces a data output, F. Each ALU cell has provision for some type of carry circuit, carry ripple or carry look-ahead. In a carry ripple example, the 1-bit ALU cells are of two basic types, an odd type and an even type. The carry-out from an odd type cell is connected as a carry-in to an even type cell and similarly, the carry-out of an even type cell is connected as a carry-in to an odd type cell. The arithmetic and logic unit is formed by a plurality of alternating odd and even 1-bit ALU cells.
    Type: Grant
    Filed: June 5, 1978
    Date of Patent: August 19, 1980
    Assignee: Fujitsu Limited
    Inventor: Kenichi Miura
  • Patent number: 4215617
    Abstract: Disclosed is a musical instrument and method for generating musical sound. Digital circuits produce a sequence of numbers which are converted to analog electrical signals which are periodically sampled to drive a conventional speaker. The digital circuits operate in accordance with a method of forming each sample by evaluation of a closed-form expression including a first function of time, either periodic or non-periodic, transformed by a second function of time where the second function is non-linear, non-sinusoidal and differs from the first function. The frequency spectra of the resulting musical sound can be finite and the amplitudes of frequency components do not have unwanted limitations.
    Type: Grant
    Filed: November 22, 1976
    Date of Patent: August 5, 1980
    Assignee: The Board of Trustees of Leland Stanford Junior University
    Inventor: James A. Moorer
  • Patent number: 4199261
    Abstract: A meter and method for measuring the intensity of reflected or other light. The meter is particularly suitable for use by blind or visually impared diabetics to determine sugar level in their urine and in one embodiment is a handheld, battery-powered, audio-output device. A chemical impregnated sample under test is illuminated with a light source and reflected light is detected to form an electrical measurement signal. In order to minimize variations in light source output, the measurement signal is typically formed as a ratio of logrithmically scaled signals derived from the sample under test and from the light source. The measurement signal is compared with reference levels and the comparison results are encoded to provide signals to an audio or other indicator. A time sequencer is provided for causing the measurement signal to be examined at a predetermined time.
    Type: Grant
    Filed: December 29, 1976
    Date of Patent: April 22, 1980
    Assignee: Smith-Kettlewell Eye Research Foundation
    Inventors: Leon E. Tidd, Alan B. Scott, Julius M. J. Madey, Carter C. Collins
  • Patent number: 4191916
    Abstract: A table positioning apparatus suitable for use in an electron beam exposure system. A movable table holds a wafer or other work piece. The table is driven by a motor in response to a motor drive signal to position the table at different locations. An optical position measuring transducer is located in fixed relation to the table to establish a reference position for the table in a local region. The transducer provides a position signal as a function of the table position in the local region. An amplifier is provided which is responsive to the position signal to produce a servo signal. A motor drive circuit provides the motor drive signal for driving the motor in response to the servo signal so that the table is driven to the reference position. At the reference position, a reset signal is provided to reset interferometers in both X and Y axes.
    Type: Grant
    Filed: November 23, 1977
    Date of Patent: March 4, 1980
    Assignee: Fujitsu Limited
    Inventors: John J. Zasio, Michael W. Samuels
  • Patent number: 4189664
    Abstract: The present invention is a power control unit and method of controlling power particularly for lighting loads such as incandescent lamps and fluorescent lamps. The power control unit is located between the power source and the load, typically between a circuit breaker and the lamps in a single circuit.The power control unit functions to reduce the voltage delivered to the load and thereby to reduce the power consumed by the load. Reductions in power up to 10% or more are possible without any significant loss in lighting usefulness. Savings of up to 40% or more are possible when significant reductions in lighting output are acceptable.
    Type: Grant
    Filed: October 5, 1977
    Date of Patent: February 19, 1980
    Inventor: Richard L. Hirschfeld
  • Patent number: 4189230
    Abstract: A semiconductor wafer holder, for use in discharge and other processing apparatus, comprised of a non-magnetic frame having an opening defined by an inner wall for receiving a wafer. A non-magnetic circular flange extends out from the frame body over the inner wall forming a bottom surface extending partially into the opening. The bottom surface acts as a mechanical stop for the top surface of a wafer forced up into the opening by a spring-loaded bottom plate. A spring-loaded plunger mechanism extends through a hole in the frame and inner wall into the opening to contact the side edge of a wafer in the opening and forces the wafer into contact with side-edge mechanical stops.
    Type: Grant
    Filed: October 26, 1977
    Date of Patent: February 19, 1980
    Assignee: Fujitsu Limited
    Inventor: Gabriel Zasio
  • Patent number: 4180772
    Abstract: A large scale integrated circuit with external integral access test circuitry having a semiconductor body with a surface. A large scale integrated circuit is formed in the semiconductor body through the surface and comprises a large number of interconnected circuit elements with a large number of input and output pads connected to the circuit elements and disposed near the outer perimeter of the semiconductor body. An integrated test circuit is formed in the semiconductor body and extends through the surface. The integrated test circuit has a plurality of probe pads carried by the semiconductor body and connected to the test circuit. The integrated test circuit is formed external of but in relatively close proximity to the large scale integrated circuit.
    Type: Grant
    Filed: May 31, 1977
    Date of Patent: December 25, 1979
    Assignee: Fujitsu Limited
    Inventors: Fred K. Buelow, John J. Zasio
  • Patent number: 4153929
    Abstract: Disclosed is a multi-faceted light reflector and a method of manufacturing the reflector. Planar facets are arranged in tiers, or in some other order, tangent to the surface of a spheroid to form the reflector. The size and location of the facets are correlated to the size and location of the illuminated plane. A light source is located at one focus and the illuminated plane is located at the other focus where the illuminated plane is perpendicular to the major axis of the spheroid. The facets are dimensioned and positioned so that substantially all of the reflected light from the light source is reflected to a preselected area on the illuminated plane. The method of manufacture includes calculating the coordinates for each facet, forming a convex die from the calculated coordinates, and molding the concave reflector from the convex die thus formed.
    Type: Grant
    Filed: October 20, 1976
    Date of Patent: May 8, 1979
    Assignee: Meddev Corporation
    Inventors: W. Philip Laudenschlarger, Richard K. Jobe, Richard P. Jobe
  • Patent number: 4149244
    Abstract: Disclosed is a primary data processing system comprised of, for example, a main store, a storage unit, an instruction unit, an execution unit, a console unit and a channel unit for performing primary system programs. The console unit includes a secondary digital computer for performing secondary programs which functions to observe and/or alter the primary system. The functions performable by the secondary system include altering the primary system control state, causing primary commands to be executed, controlling primary data and addresses, and scanning out primary information. The console is connected through a command bus, an address bus and a data bus to the controls and data paths of the channel unit, of the instruction unit and of the storage unit.
    Type: Grant
    Filed: June 7, 1976
    Date of Patent: April 10, 1979
    Assignee: Amdahl Corporation
    Inventors: David L. Anderson, Richard L. Bishop
  • Patent number: 4147937
    Abstract: An electron beam exposure system and method for use in the process of fabricating microminiature devices at high speeds. The high-speed operation is achieved with a computer providing programmed commands specifying a particular pattern to be scanned. A processor, responsive to programmed data, generates scan data a line at a time and loads a line generator. The line generator steps to each exposure location in a line to provide control signals for controlling the position of the electron beam. The starting and end positions of scan lines in both the X and Y directions may be arbitrarily selected thereby eliminating the need for scanning areas not intended to be processed.
    Type: Grant
    Filed: November 1, 1977
    Date of Patent: April 3, 1979
    Assignee: Fujitsu Limited
    Inventors: Fred K. Buelow, John J. Zasio, Laurence H. Cooke
  • Patent number: 4142243
    Abstract: A data processing system having a principal apparatus, such as a programmable large-scale data processing system, and a secondary apparatus. The secondary apparatus performs fault detection and analysis on the principal apparatus. The secondary apparatus under control of a secondary program and independently from the principal apparatus, accesses information from different points, such as latch circuits, throughout the principal appartus. The accessed information is utilized by the secondary apparatus to form an actual checksum having a value determined by the accessed information. The actual checksum thus formed is compared with an expected checksum provided from storage by the secondary apparatus. If the actual and expected checksums are different, a fault condition is indicated. An analysis of selected subsets of points in the primary apparatus is made using a compacted scan composed of the values of the selected subset of points.
    Type: Grant
    Filed: May 20, 1977
    Date of Patent: February 27, 1979
    Assignee: Amdahl Corporation
    Inventors: Richard L. Bishop, William A. Gibson
  • Patent number: 4132898
    Abstract: An electron beam exposure apparatus and method for use in fabricating semiconductor devices. A chip pattern larger in area than the electron beam scan field is divided into and exposed in a number of smaller parts (called partitions). The work piece on which the chip pattern is to be formed is moved relative to the scan field to enable each partition to be individually scanned at a different work piece position. The scan field, with the work piece positioned to scan one partition, overlaps onto and establishes a boundary region on an adjacent partition. Portions of chip patterns which lie in a boundary region are selectively scanned in connection with one or another of the abutting partitions. Portions of chip patterns falling in the boundary regions are selected for scanning in one or the other of adjacent partitions so as to minimize the number of divisions and so as to avoid dividing the pattern along critical dimensions.
    Type: Grant
    Filed: November 1, 1977
    Date of Patent: January 2, 1979
    Assignee: Fujitsu Limited
    Inventors: Fred K. Buelow, John J. Zasio, Laurence H. Cooke
  • Patent number: 4056843
    Abstract: Disclosed is a data processing system including a channel unit which services a plurality of channels. The channel unit is connected between the data processing system and the control units which control the operations of I/O devices. The channel unit includes one processor for controlling transfers between channel storage and system storage and having another processor for controlling transfers between input/output devices and channel storage.
    Type: Grant
    Filed: June 7, 1976
    Date of Patent: November 1, 1977
    Assignee: Amdahl Corporation
    Inventors: Richard L. Bishop, Steven P. Tulloh