Patents Represented by Attorney Davis Wright Tremaine LLP
  • Patent number: 8349191
    Abstract: A method of treatment of water in an aquatic environment. Water is first pumped from a reservoir to a first mixing station. An inert gas is introduced into the pumped water at the first mixing station to provide inert gas saturated water, which inert gas saturated water will displace undesired gasses in the water in the reservoir. The inert gas saturated water is then pumped to a sparging column such that the inert gas and undesired gasses will be released from the inert gas saturated water to provide depleted water.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: January 8, 2013
    Assignee: Revalesio Corporation
    Inventor: Anthony B. Wood
  • Patent number: 8349556
    Abstract: Aspects of the invention provide novel and surprisingly effective methods for the detection of nucleic acids, comprising nucleic acid amplification using base-modified deoxynucleoside 5?-triphosphates (dNTPs). Particular aspects relate to methods for enhancing hybridization properties of oligonucleotide primers and probes in assays detecting nucleic acids, comprise amplifying target DNAs in presence of base-modified duplex-stabilizing deoxyribonucleoside 5?-triphosphates to provide for modified target DNAs, and thereby considerably improving performance of the detection assays. The disclosed methods allow for increasing of the reaction temperature in PCR-based detection systems or, alternatively, reducing the length of the oligonucleotide primers and probes. Certain aspects relates to improvement of real time PCR assays, wherein nucleic acids of interest are detected as the reaction proceeds using fluorescent agents or oligonucleotide FRET probes.
    Type: Grant
    Filed: April 30, 2007
    Date of Patent: January 8, 2013
    Inventor: Igor Kutyavin
  • Patent number: 8351236
    Abstract: A three-dimensional array especially adapted for memory elements that reversibly change a level of electrical conductance in response to a voltage difference being applied across them. Memory elements are formed across a plurality of planes positioned different distances above a semiconductor substrate. A two-dimensional array of bit lines to which the memory elements of all planes are connected is oriented vertically from the substrate and through the plurality of planes. A single-sided word line architecture provides a word line exclusively for each row of memory elements instead of sharing one word line between two rows of memory elements thereby avoids linking the memory element across the array across the word lines. While the row of memory elements is also being accessed by a corresponding row of local bit lines, there is no extension of coupling between adjacent rows of local bit lines and therefore leakage currents beyond the word line.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: January 8, 2013
    Assignee: SanDisk 3D LLC
    Inventors: Tianhong Yan, George Samachisa
  • Patent number: 8349835
    Abstract: The invention belongs to pharmaceutical field. The invention relates to the compounds according to Formula I, including their optically active forms, pharmaceutically acceptable salts or hydrates, and the pharmaceutical composition comprising thereof as active ingredient; uses in the preparation of vascular endothelial growth factor receptor tyrosine kinase inhibitors, and uses in the preparation of medicament for the treatment and/or prevention of cancer.
    Type: Grant
    Filed: February 10, 2009
    Date of Patent: January 8, 2013
    Assignee: Shenyang Pharmaceutical University
    Inventors: Linxiang Zhao, Jinling Lv, Rui Wang, Dan Liu, Yongkui Jing
  • Patent number: 8351269
    Abstract: Part of the latency from memory read or write operations is for data to be input to or output from the data latches of the memory via an I/O bus. Methods and circuitry are present for improving performance in non-volatile memory devices by allowing the memory to perform some of these data caching and transfer operations in the background while the memory core is busy with a read operation. A read caching scheme is implemented for memory cells where more than one bit is sensed together, such as sensing all of the n bits of each memory cell of a physical page together. The n-bit physical page of memory cells sensed correspond to n logical binary pages, one for each of the n-bits. Each of the binary logical pages is being output in each cycle, while the multi-bit sensing of the physical page is performed every nth cycles.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: January 8, 2013
    Assignee: SanDisk Technologies, Inc.
    Inventor: Yan Li
  • Patent number: 8342349
    Abstract: A container assembly for storing and transporting consumable products. The container assembly includes two or more containers, each having a container coupling portion configured to facilitate the coupling of one container to another container. The container assembly also includes one or more adaptor lids operative to seal a cavity of a container by threaded engagement therewith, and to selectively couple two containers together. In some embodiments, two containers may be coupled to each other by placing a first container on top of a second container and rotating the two containers relative to each other. The container assembly may be operative to permit multiple quantities and sizes of containers to be selectively coupled together to provide flexibility for a user to store and transport a variety of consumable products. The container assembly may also include a lid having a handle to allow a user to easily transport the container assembly.
    Type: Grant
    Filed: February 3, 2010
    Date of Patent: January 1, 2013
    Assignee: Pacific Market International, LLC
    Inventor: Flying Lu
  • Patent number: 8339185
    Abstract: A multi-stage charge pump selects the number of active stages dynamically. In the exemplary embodiment, this is done by having a multi-stage master charge pump section in which the number of active stages is settable and a slave charge pump section that is of the same design as the master section. The master section is used to drive the external load, while the slave section drives an adjustable internal load. The adjustable internal load is set by control logic by comparing the operation of the two sections. The control logic then operates the slave section with a different number of active stages than the master stage in order to determine whether the master stage is using the optimal number of active stages. The control logic can then change the number of active stages accordingly.
    Type: Grant
    Filed: December 20, 2010
    Date of Patent: December 25, 2012
    Assignee: SanDisk 3D LLC
    Inventors: Marco Cazzaniga, Tz-Yi Liu
  • Patent number: 8339183
    Abstract: A charge pump circuit for generating an output voltage is described. Charge pump circuits typically have two branches. As the clocks supplying the branches of a charge pump circuit alternate, the output of each branch will alternately provide an output voltage, which are then combined to form the pump output. The techniques described here allow charge to be transferred between the two branches, so that as the capacitor of one branch discharges, it is used to charge up the capacitor in the other branch. An exemplary embodiment using a voltage doubler-type of circuit, with the charge transfer between the branches accomplished using a switch controller by a boosted version of the clock signal, which is provided by a one-sided voltage doubler.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: December 25, 2012
    Assignee: SanDisk Technologies Inc.
    Inventors: Khin Htoo, Feng Pan, Byungki Woo, Trung Pham, Yuxin Wang
  • Patent number: 8339970
    Abstract: A mobile station (MS) used in a wireless communication system collects communication metrics data during a call session and stores the communication metrics data in the MS at the time that a session is disrupted. When a new communication link is established, the MS transmits the stored communication metrics. The communication metrics and other data relating to the disrupted communication session may be analyzed to determine which communication metrics were operating at abnormal values and determine the probability that a particular communication metric was related to the cause of the session disruption. The communication metrics values and probability metrics values may be used to determine a likely cause for the session disruption.
    Type: Grant
    Filed: April 2, 2010
    Date of Patent: December 25, 2012
    Inventor: Pinalkumari Tailor
  • Patent number: 8339402
    Abstract: A real-time method for producing an animated performance is disclosed. The real-time method involves receiving animation data, the animation data used to animate a computer generated character. The animation data may comprise motion capture data, or puppetry data, or a combination thereof. A computer generated animated character is rendered in real-time with receiving the animation data. A body movement of the computer generated character may be based on the motion capture data, and a head and a facial movement are based on the puppetry data. A first view of the computer generated animated character is created from a first reference point. A second view of the computer generated animated character is created from a second reference point that is distinct from the first reference point. One or more of the first and second views of the computer generated animated character are displayed in real-time with receiving the animation data.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: December 25, 2012
    Inventors: Brian Henson, Jeff Forbes, Michael Babcock, Glenn Muravsky, John Criswell
  • Patent number: 8341371
    Abstract: Upon the arrival at a memory device of one or more data chunks associated with respective logical addresses, each data chunk is assigned a signature, stored in a first location, and copied to a second location. The copy is assigned a signature that matches the signature of its parent data chunk. Before erasing a memory block that includes one or more data chunks, it first is verified that those data chunks have been copied, i.e., that copies of all the data chunks in the block, with matching signatures, exist in the memory device.
    Type: Grant
    Filed: September 7, 2005
    Date of Patent: December 25, 2012
    Assignee: SanDisk IL Ltd
    Inventor: Menahem Lasser
  • Patent number: 8334796
    Abstract: An on-chip DC voltage generator and hardware efficient method provide for generating linear DC voltages with a programmable negative temperature coefficient. A temperature-dependent DC voltage is digitally derived from an on-chip temperature readout, a programmable digital word to control the temperature coefficient and a programmable digital word to adjust the digital level. The digital result is applied to a resistor string digital to analog converter (DAC) to generate an analog DC voltage with a negative temperature slope. Additionally, another programmable digital word for trimming allows convergence at a given temperature of voltages having a common level but different temperature coefficients. These voltages can be applied to the word line in the flash memory and track the threshold voltage of the memory cell, which has a negative temperature coefficient, such that the difference between the gate voltage and the threshold voltage is constant over temperature.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: December 18, 2012
    Assignee: SanDisk Technologies Inc.
    Inventors: Barkat A. Wani, Raul-Adrian Cernea
  • Patent number: 8334180
    Abstract: A flash NAND type EEPROM system with individual ones of an array of charge storage elements, such as floating gates, being capacitively coupled with at least two control gate lines. The control gate lines are preferably positioned between floating gates to be coupled with sidewalls of floating gates. The memory cell coupling ratio is desirably increased, as a result. Both control gate lines on opposite sides of a selected row of floating gates are usually raised to the same voltage while the second control gate lines coupled to unselected rows of floating gates immediately adjacent and on opposite sides of the selected row are kept low. The control gate lines can also be capacitively coupled with the substrate in order to selectively raise its voltage in the region of selected floating gates. The length of the floating gates and the thicknesses of the control gate lines can be made less than the minimum resolution element of the process by forming an etch mask of spacers.
    Type: Grant
    Filed: August 5, 2011
    Date of Patent: December 18, 2012
    Assignee: SanDisk Technologies Inc
    Inventor: Eliyahou Harari
  • Patent number: 8331302
    Abstract: A method of assigning parameter values to transceivers in a wireless communication network. Each of the parameter values assigned determines at least in part how a plurality of subcarriers are organized into a plurality of sub-channels. In particular embodiments, the method assigns the parameter values to the transceivers based on correlations between the sub-channels determined by the parameter values, distances between the transceivers, and loads experienced by the transceivers. After the parameter values are assigned to the transceivers, each of the transceivers is configured to transmit on the sub-channels determined at least in part by the parameter value assigned to the transceiver.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: December 11, 2012
    Assignee: Clearwire IP Holdings LLC
    Inventors: Esmail Dinan, Jong-Hak Jung, Swati Tiwari, Hemanth Pawar, Krishna Sitaram
  • Patent number: 8329206
    Abstract: A bolus for administration of a substance to an animal, the bolus including An external coating, and A core inside the external coating wherein the core is formed from a plurality of dosage media, wherein each dosage media contains a substance, the bolus characterised in that the dosage media are ordered within the bolus such that the amount of substance released by each dosage media is progressively more than the amount of substance released by the previous dosage media.
    Type: Grant
    Filed: June 29, 2009
    Date of Patent: December 11, 2012
    Assignee: Bomac Research Limited
    Inventors: Wayne Frederick Leech, William Ernest Pomroy
  • Patent number: 8323464
    Abstract: Electrochemical sensors for investigating a physiological sample and methods of manufacture are disclosed. The sensor includes a longitudinally extending reaction cell, having electrodes and a reagent, and laterally spaced electrical contact points for electrically communication with a meter. An array of such sensors is further disclosed including connective flaps for joining adjacent sensors. In use, the array of sensors can be stored in a folded configuration and dispensed individually.
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: December 4, 2012
    Assignee: Universal Biosensors Pty Ltd
    Inventors: Jerry T. Pugh, Alastair Hodges, Garry Chambers
  • Patent number: 8323890
    Abstract: There is disclosed an improved high-throughput and quantitative process for determining methylation patterns in genomic DNA samples based on amplifying modified nucleic acid, and detecting methylated nucleic acid based on amplification-dependent displacement of specifically annealed hybridization probes. Specifically, the inventive process provides for treating genomic DNA samples with sodium bisulfite to create methylation-dependent sequence differences, followed by detection with fluorescence-based quantitative PCR techniques. The process is particularly well suited for the rapid analysis of a large number of nucleic acid samples, such as those from collections of tumor tissues.
    Type: Grant
    Filed: June 2, 2009
    Date of Patent: December 4, 2012
    Assignee: The University of Southern California
    Inventors: Peter W. Laird, Cindy A. Carroll, Kathleen D. Danenberg
  • Patent number: 8327238
    Abstract: The present invention presents a non-volatile memory and method for its operation that allows instant and accurate detection of erased sectors when the sectors contain a low number of zero bits, due to malfunctioning cells or other problems, and the sector can still be used as the number of corrupted bits is under the ECC correction limit. This method allows the storage system to become tolerant to erased sectors corruption, as such sectors can be used for further data storage if the system can correct this error later in the written data by ECC correction.
    Type: Grant
    Filed: September 10, 2008
    Date of Patent: December 4, 2012
    Assignee: SanDisk Technologies Inc.
    Inventor: Sergey Anatolievich Gorobets
  • Patent number: D672208
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: December 11, 2012
    Assignee: Pacific Market International, LLC
    Inventor: Andrew C. F. Wahl
  • Patent number: D673429
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: January 1, 2013
    Assignee: Pacific Market International, LLC
    Inventor: Tyler Sean Gilbert