Patents Represented by Attorney Davis Wright Tremaine LLP
  • Patent number: 8061534
    Abstract: An equipment rack panel system using one or more rack extension panels with optional raceway to interconnect equipment cables to service cables through connectors within the rack extension panel. The rack extension panel is either fastened to or integral with one of the posts of the equipment rack or otherwise adjacent to the equipment rack and extends away from the equipment rack so as not to occupy space within the equipment rack normally reserved for equipment.
    Type: Grant
    Filed: September 10, 2007
    Date of Patent: November 22, 2011
    Assignee: Leviton Manufacturing Co., Inc.
    Inventors: Erik Laursen, Jennifer M. Waite, Mark E. Dearing, Keith B. Kosanovich, Mark A. Guymon
  • Patent number: 8056745
    Abstract: A stopper for an opening of a container such as a thermos. The stopper includes a pushbutton, a fluid flow channel extending between an inlet and an outlet, and a movable plug portion positioned adjacent the inlet. A biasing member biases the plug portion into sealing engagement with the inlet thereby preventing the contents of the container from flowing into the channel. A cam follower is disposed upon a cam surface opposing the biasing member. The cam follower is rotatable by the pushbutton relative to the cam surface from a closed position to an open position and when so rotated, exerts a biasing force on the cam surface sufficient to overcome the biasing force exerted by the biasing member on the plug portion and space the plug portion from the inlet allowing the contents of the container to flow into the channel and out the outlet.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: November 15, 2011
    Assignee: Pacific Market International, LLC
    Inventor: Ji Hyung Yu
  • Patent number: 8059463
    Abstract: Information stored as physical states of cells of a memory is read first by setting each of one or more references to a respective member of a first set of values and reading the physical states of the cells relative to the values of the first set. Subsequently, the references are set to respective members of a second set of values, and the physical states of the cells are read again relative to the values of the second set. The second set is different from the first set, so that the two readings together read the physical states of the cells with higher resolution than the first reading alone.
    Type: Grant
    Filed: March 9, 2009
    Date of Patent: November 15, 2011
    Assignee: Sandisk IL Ltd
    Inventors: Mark Murin, Mark Shlick
  • Patent number: 8055972
    Abstract: Memory cells are programmed and read, at least M=3 data bits per cell, according to a valid nonserial physical bit ordering with reference to a logical bit ordering. The logical bit ordering is chosen to give a more even distribution of error probabilities of the bits, relative to the probability distributions of the data error and the cell state transition error, than would be provided by the physical bit ordering alone. Preferably, both bit orderings have 2M?1 transitions. Preferably, the logical bit ordering is evenly distributed. The translation between the bit orderings is done by software or hardware.
    Type: Grant
    Filed: October 25, 2007
    Date of Patent: November 8, 2011
    Assignee: SanDisk IL Ltd
    Inventor: Menahem Lasser
  • Patent number: 8054684
    Abstract: A program operation in a non-volatile memory is segmented at predefined junctures into smaller segments for execution over different times. The predefined junctures are such that they allow unambiguous identification when restarting the operation in a next segment so that the operation can continue without having to restart from the very beginning of the operation. This is accomplished by requiring the programming sequence of each segment to be atomic, that is, to only terminate at a predetermined type of programming step. In a next segment, the terminating programming step is identified by detecting a predetermined pattern of ECC errors across a group of programmed wordlines.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: November 8, 2011
    Assignee: Sandisk Technologies Inc.
    Inventors: Sergey Anatolievich Gorobets, Gautam Ashok Dusija
  • Patent number: 8055832
    Abstract: Host system data files are written directly to a large erase block flash memory system with a unique identification of each file and offsets of data within the file but without the use of any intermediate logical addresses or a virtual address space for the memory. Directory information of where the files are stored in the memory is maintained within the memory system by its controller, rather than by the host. A type of memory block is selected to receive additional data of a file that depends upon the types of blocks into which data of the file have already been written. Blocks containing data are selected for reclaiming any unused capacity therefrom by a process that selects blocks in order starting with those containing the least amount of valid data.
    Type: Grant
    Filed: May 8, 2006
    Date of Patent: November 8, 2011
    Assignee: SanDisk Technologies, Inc.
    Inventors: Alan W. Sinclair, Barry Wright
  • Patent number: 8054681
    Abstract: A non-volatile memory device has individual pages of memory cells to be sensed in parallel. The memory device includes a source level tracking circuit coupled to receive a predetermined word line voltage from a word line voltage supply and the voltage level at the aggregate source node of one or more pages and coupled to provide to word lines of the memory an output voltage during the sensing operation, where the source level tracking circuit includes an op amp whereby the output voltage is the word line voltage offset by an amount to track the voltage level at the aggregate node and compensate for source bias errors due to a finite resistance in the ground loop.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: November 8, 2011
    Assignee: SanDisk Technologies Inc.
    Inventors: Feng Pan, Trung Pham, Byungki Woo
  • Patent number: 8050126
    Abstract: One or more sense amplifiers for sensing the conduction current of non-volatile memory is controlled by signals that are timed by a reference sense amplifier having similar characteristics and operating conditions. In one aspect, a sensing period is determined by when the reference sense amplifier sensing a reference current detects an expected state. In another aspect, an integration period for an amplified output is determined by when the reference sense amplifier outputs an expected state. When these determined timings are used to control the one or more sense amplifiers, environment and systemic variations are tracked.
    Type: Grant
    Filed: December 10, 2010
    Date of Patent: November 1, 2011
    Assignee: SanDisk Technologies Inc.
    Inventor: Raul-Adrian Cernea
  • Patent number: 8050732
    Abstract: A system and method for cardiac mapping and ablation include a multi-electrode catheter introduced percutaneously into a subject's heart and deployable adjacent to various endocardial sites. The electrodes are connectable to a mapping unit, an ablation power unit a pacing unit, all of which are under computer control. Intracardiac electrogram signals emanated from a tachycardia site of origin are detectable by the electrodes. Their arrival times are processed to generate various visual maps to provide real-time guidance for steering the catheter to the tachycardia site of origin. In another aspect, the system also include a physical imaging system which is capable of providing different imaged physical views of the catheter and the heart. These physical views are incorporated into the various visual maps to provide a more physical representation. Once the electrodes are on top of the tachycardia site of origin, electrical energy is supplied by the ablation power unit to effect ablation.
    Type: Grant
    Filed: April 19, 2010
    Date of Patent: November 1, 2011
    Assignee: Catheffects, Inc.
    Inventor: Jawahar M. Desai
  • Patent number: 8047729
    Abstract: An enhanced camera transport system and method includes a strap and coupler. The coupler is configured to engage with an attachment point on a camera otherwise reserved by engagement with a camera stand such as a tripod, monopod, or the like. Following general camera construction, the attachment point is found on the bottom of the camera. In some implementations, the coupler is slideably attached to the strap to assist with repositioning of the camera from a transport position to a picture taking position. Other implementations include an enclosure for storage of the camera while not being used.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: November 1, 2011
    Assignee: Black Rapid, Inc.
    Inventors: Tyler R. M. Kope, Ronald D. Henry
  • Patent number: 8051257
    Abstract: In a nonvolatile memory with block management system, critical data such as control data for the block management system is maintained in duplicates. Various methods are described for robustly writing and reading two copies of critical data in multi-state memory. In another aspect of the invention, a preemptive garbage collection on memory block containing control data avoids an undesirable situation where a large number of such memory blocks need be garbage collected at the same time.
    Type: Grant
    Filed: August 13, 2004
    Date of Patent: November 1, 2011
    Assignee: SanDisk Technologies Inc.
    Inventors: Sergey Anatolievich Gorobets, Alan Douglas Bryce, Alan David Bennett
  • Patent number: 8050095
    Abstract: In order to maintain the integrity of data stored in a flash memory that are susceptible to being disturbed by operations in adjacent regions of the memory, disturb events cause the data to be read, corrected and re-written before becoming so corrupted that valid data cannot be recovered. The sometimes conflicting needs to maintain data integrity and system performance are balanced by deferring execution of some of the corrective action when the memory system has other high priority operations to perform. In a memory system utilizing very large units of erase, the corrective process is executed in a manner that is consistent with efficiently rewriting an amount of data much less than the capacity of a unit of erase.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: November 1, 2011
    Assignee: SanDisk Technologies Inc.
    Inventors: Carlos J. Gonzalez, Kevin M. Conley
  • Patent number: 8043509
    Abstract: Devices and methods for water purification are provided. An improved demister (70) for removing liquid or other particles from steam is disclosed. The demister can have adjustable outlets. In other embodiments, a demister apparatus is placed, at least partially, inside a boiler apparatus (310). Additionally, a filter flow indicator (401) that provides an optical indication of the efficiency of a water filter is also provided. The filter flow indicator has a viewable side passage that connects the input and output sides of a filter unit. A weighted object, such as a ball (440), can move up and down the side passage in response to the pressure differential in the filter system. The user can determine the status of the filter by viewing the location of the weighted object in the side passage. Additionally, a device and method of adding various minerals back to purified water in order to improve the flavor of the water is described.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: October 25, 2011
    Assignee: Sylvan Source, Inc.
    Inventor: Eugene Thiers
  • Patent number: 8046522
    Abstract: Data files are assigned addresses within one or more logical blocks of a continuous logical address space interface (LBA interface) of a usual type of flash memory system with physical memory cell blocks. This assignment may be done by the host device which typically, but not necessarily, generates the data files. The number of logical blocks containing data of any one file is controlled in a manner that reduces the amount of fragmentation of file data within the physical memory blocks, thereby to maintain good memory performance. The host may configure the logical blocks of the address space in response to learning the physical characteristics of a memory to which it is connected.
    Type: Grant
    Filed: December 26, 2006
    Date of Patent: October 25, 2011
    Assignee: SanDisk Technologies, Inc.
    Inventors: Alan W. Sinclair, Barry Wright
  • Patent number: 8044427
    Abstract: This invention relates to the thermal management, extraction of light, and cost effectiveness of Light Emitting Diode, or LED, electrical circuits. An integrated circuit LED submount is described, for the packaging of high power LEDs. The LED submount provides high thermal conductivity while preserving electrical insulation. In particular, a process is described for anodizing a high thermal conductivity aluminum alloy sheet to form a porous aluminum oxide layer and a non-porous aluminum oxide layer. This anodized aluminum alloy sheet acts as a superior electrical insulator, and also provides surface morphology and mechanical properties that are useful for the fabrication of high-density and high-power multilevel electrical circuits.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: October 25, 2011
    Assignee: DiCon Fiberoptics, Inc.
    Inventors: Wen-Herng Su, Junying Lu, Ho-Shang Lee
  • Patent number: 8045378
    Abstract: A group of memory cells is programmed respectively to their target states in parallel using a multiple-pass programming method in which the programming voltages in the multiple passes are correlated. Each programming pass employs a programming voltage in the form of a staircase pulse train with a common step size, and each successive pass has the staircase pulse train offset from that of the previous pass by a predetermined offset level. The predetermined offset level is less than the common step size and may be less than or equal to the predetermined offset level of the previous pass. Thus, the same programming resolution can be achieved over multiple passes using fewer programming pulses than conventional method where each successive pass uses a programming staircase pulse train with a finer step size. The multiple pass programming serves to tighten the distribution of the programmed thresholds while reducing the overall number of programming pulses.
    Type: Grant
    Filed: October 6, 2010
    Date of Patent: October 25, 2011
    Assignee: Sandisk Technologies Inc.
    Inventor: Raul-Adrian Cernea
  • Patent number: 8044705
    Abstract: Techniques of operating a charge pump are described. The charge pump is connectable to receive a clock signal and a regulating voltage and provide an output voltage. The charge pump can have one or multiple stages, each of the stages will include a capacitor. During the charging phase, the regulating voltage is used to regulate the potential of the capacitor's bottom plate. During the boosting phase, the capacitor's top plate is connected to supply the output for the stage and the bottom plate is connected to receive the stage's input. Each stage will also have a set of switching elements, allowing the capacitor to be alternately connected in the charging and boosting phases. For the first stage, the input is derived from the clock signal, and for any subsequent stages, the input will be the output of the preceding stage. The last stage provides the output voltage of the pump.
    Type: Grant
    Filed: August 28, 2007
    Date of Patent: October 25, 2011
    Assignee: SanDisk Technologies Inc.
    Inventors: Prajit Nandi, Sridhar Yadala
  • Patent number: 8045391
    Abstract: In sensing a group of cells in a multi-state nonvolatile memory, multiple sensing cycles relative to different demarcation threshold levels are needed to resolve all possible multiple memory states. Each sensing cycle has a sensing pass. It may also include a pre-sensing pass or sub-cycle to identify the cells whose threshold voltages are below the demarcation threshold level currently being sensed relative to. These are higher current cells which can be turned off to achieve power-saving and reduced source bias errors. The cells are turned off by having their associated bit lines locked out to ground. A repeat sensing pass will then produced more accurate results. Circuitry and methods are provided to selectively enable or disable bit-line lockouts and pre-sensing in order to improving performance while ensuring the sensing operation does not consume more than a maximum current level.
    Type: Grant
    Filed: October 4, 2010
    Date of Patent: October 25, 2011
    Assignee: Sandisk Technologies Inc.
    Inventor: Nima Mokhlesi
  • Patent number: PP22248
    Abstract: A new Magnolia plant variety, ‘Centennial Blush’, is provided. ‘Centennial Blush’ is a new and distinct cultivar of the plant Magnolia stellata, which is characterized by dense conical pyramidal habit, large 12 to 14 cm wide flowers composed of 46 tepals, flower bud development at most nodes resulting in heaviest flowering of any known varieties of Magnolia stellata, and ability to set numerous flower buds as a 2 to 3-year-old plant.
    Type: Grant
    Filed: June 29, 2010
    Date of Patent: November 15, 2011
    Assignee: University of Georgia Research Foundation, Inc.
    Inventor: Michael A. Dirr
  • Patent number: PP22254
    Abstract: The new variety Pennisetum ‘Tift 8’ is provided. The new and distinct variety has high ornamental value; cold tolerance for short periods of time; and relatively long trichomes on the sheath and at the leaf blade edge at the collar. The asexually reproduced variety is reliably propagated vegetatively.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: November 15, 2011
    Assignee: University of Georgia Research Foundation, Inc.
    Inventors: Wayne William Hanna, S. Kristine Braman, Brian Matthew Schwartz