Patents Represented by Attorney Dickstein Shapiro Morin & Oshinsky LLP
  • Patent number: 7094189
    Abstract: A fitness stretching apparatus comprising a base and a cage structure surrounding the base. The cage structure includes at least a first stretching station for performing stretching of a muscle. A second stretching station is located on the base and within the cage structure. Preferably, the second stretching station is configured for seated stretching exercises.
    Type: Grant
    Filed: August 11, 2004
    Date of Patent: August 22, 2006
    Inventor: Thomas Fallacaro
  • Patent number: 7095300
    Abstract: A coaxial capacitor is inserted in a coaxial cable in a predetermined position. A housing is provided as a ground conductor path in order to establish conduction between two external conductors in portions of the coaxial cable which are separated by the inserted coaxial capacitor. Inside the housing, a resonator formed by a dielectric coaxial resonator or the like, the coaxial capacitor, and a connecting conductor are accommodated.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: August 22, 2006
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Masamichi Andoh
  • Patent number: 7095301
    Abstract: A resonator device including a plurality of resonance units formed on a dielectric substrate, each resonance unit having a plurality of conductor lines forming a capacitive area and an inductive area in a ring shape.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: August 22, 2006
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Seiji Hidaka, Shin Abe
  • Patent number: 7095885
    Abstract: A method and apparatus for measuring registration between two or more integrated circuit layers is disclosed. Images of actual operative circuitry of different layers of a semiconductor wafer, obtained by an optical technique or a scanning electron microscope, are digitized and analyzed for the relative placement of pattern shapes of the corresponding layers. This relative placement is then compared to tolerance values and if out of tolerance misregistration of the two layers is indicated.
    Type: Grant
    Filed: March 1, 2000
    Date of Patent: August 22, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Eugene A. DeLaRosa, Troy V. Gugel
  • Patent number: 7094448
    Abstract: Disclosed is a spray pack for use in forming a uniform, stable spray coating, comprising a spray container device and, packed therein, a spraying composition comprising a liquid dispersion medium and, dispersed therein, particulate cellulose having an average degree of polymerization (DP) of not more than 300 and an average particle diameter of not more than 10 ?m, wherein the composition has a cellulose content of from 0.1 to 5.0% by weight, and wherein the composition exhibits a maximum viscosity value (?max) of 1×103 mPa·s or more in the viscosity-shear stress curve obtained, with respect to the composition, using a cone-plate type rotating viscometer in a shear rate region of from 1×10?3 s?1 to 1×102 s?1 and at 25° C. A method for forming a uniform, stable spray coating by using the above-mentioned spray pack is also disclosed.
    Type: Grant
    Filed: December 27, 2002
    Date of Patent: August 22, 2006
    Assignee: Asahi Kasei Chemical Corporation
    Inventors: Hirofumi Ono, Hideki Amakawa
  • Patent number: 7095853
    Abstract: The method of preventing illegal copy of contents encrypts a header using a key generated from the previous sector, performs variable-length coding to the encrypted header to shorten its length, and stores the decoded header into the recording medium as well as contents data, in encryption phase. The method, in decryption phase, reproduces the contents data which have different length for each sector by decoding and encoding the header.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: August 22, 2006
    Assignee: NEC Corporation
    Inventor: Takuya Morishita
  • Patent number: 7091622
    Abstract: A semiconductor device is provided with a metal stiffening layer between the die and a multilayer structure comprising at least two insulating layers each having at least one conductor thereon. A top insulating layer of the multilayer structure contains a ball grid array. The metal layer is used as an electrical ground plane to simplify the routing pattern of conductive traces on the insulating material. The metal layer may also be used to dissipate heat from the die. The conductors of the multilayer structure provide additional versatility in wiring the die to the ball grid array.
    Type: Grant
    Filed: July 14, 2004
    Date of Patent: August 15, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Larry D. Kinsman, Salman Akram
  • Patent number: 7091770
    Abstract: Circuit arrangement for voltage regulation having a voltage divider and a regulating circuit. The voltage divider is arranged between a first potential and a reference-ground potential and has a plurality of diodes connected in series, wherein an output voltage is tapped off at a terminal of one of the diodes. The regulating circuit, to which the output voltage and a reference voltage are applied, regulates the first potential based on a comparison of the output voltage with the reference voltage. The divider ratio of the voltage divider is altered by activating or deactivating one or more of the diodes, and is additionally altered by setting a magnitude of a voltage drop across at least one of the diodes.
    Type: Grant
    Filed: October 21, 2004
    Date of Patent: August 15, 2006
    Assignee: Infineon Technologies AG
    Inventor: Andreas Schlaffer
  • Patent number: 7092271
    Abstract: A method for operating a content addressable memory that includes receiving a first data value for evaluation at a first memory block during a first time interval, receiving a second data value for evaluation at a second memory block during a second time interval and evaluating said both the first and second data values during a third time interval. According to one embodiment of the invention the first and second time intervals are separate so that the first and second data blocks receive unique data out of phase with one another from a single address bus. Evaluation of both data values takes place substantially simultaneously in the respective memory blocks. Also included is a device architecture and a device adapted to control data transfer to two CAM memory blocks in response to alternate phase transitions of a control signal.
    Type: Grant
    Filed: January 14, 2005
    Date of Patent: August 15, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Sathya P. Kaginele
  • Patent number: 7091065
    Abstract: A center bond flip chip device carrier and a method for making and using it are described. The carrier includes a flexible substrate supporting a plurality of conductive traces. A cut out portion is formed in each trace at a position within a gap of a layer of elastomeric material provided over the traces. Each cut out portion is sized and configured to receive a solder ball for electrically connecting the carrier with a semiconductor die.
    Type: Grant
    Filed: September 23, 2003
    Date of Patent: August 15, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Tongbi Jiang, Alan G. Wood
  • Patent number: 7091496
    Abstract: Both wafers on which copper wiring was performed and wafers on which non-copper wiring was performed can be inspected by a single unit of electron microscopic inspection apparatus with no possibilities of the wafers being contaminated with copper. All elements within the apparatus that come in contact with wafers, such as hands of a wafer transporter, are duplicated or more and one of the elements that contact wafers is used appropriately for the wafers under inspection which may be either the wafers on which copper wiring was performed or the wafers on which non-copper wiring was performed.
    Type: Grant
    Filed: June 17, 2003
    Date of Patent: August 15, 2006
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Sho Takami, Tadashi Otaka, Manabu Shirakihara
  • Patent number: 7092178
    Abstract: A method and apparatus are disclosed for determining an appropriate write current for a magnetic recording medium and to write magnetic information on the magnetic recording medium at the appropriate write current thus determined. When a current value suited to writing on a magnetic recording medium is to be found, a coercive force of the magnetic recording medium is found from a voltage at which magnetic information written on the magnetic recording medium is read, and a traveling quantity of the magnetic recording medium, and a current value corresponding to the coercive force, are found.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: August 15, 2006
    Assignee: Omron Corporation
    Inventors: Seiji Moriya, Masahiro Yoshii, Akihiro Tadamasa, Takeshi Horinouchi, Gaku Sezaki
  • Patent number: 7090789
    Abstract: A process for the treatment of synthesis gas to increase content of hydrogen and/or carbon monoxide in the gas comprising the step of contacting the synthesis gas with a catalyst comprising oxides of manganese and zirconium, which metals are present in a molar ratio Mn/Zr of between 0.05 to 5.00.
    Type: Grant
    Filed: January 14, 2004
    Date of Patent: August 15, 2006
    Assignee: Haldor Topsoe A/S
    Inventors: Niels Christian Schiødt, Poul Erik Højlund Nielsen, Peter Lehrmann
  • Patent number: 7091493
    Abstract: Ionization efficiency is improved in Penning ionization capable of selective ionization. A metastable excited species of a rare gas is produced by introducing the rare gas into an ionization space and inducing an electrical discharge, a sample gas is introduced into the ionization space and Penning ionization is produced owing to collision between the sample gas and the metastable excited species of the rare gas. Electrons released from atoms or molecules positively ionized by Penning ionization are captured by applying a positive potential to an electron-capture electrode placed in the ionization space, and the atoms or molecules positively ionized are guided to a mass analyzer.
    Type: Grant
    Filed: May 12, 2004
    Date of Patent: August 15, 2006
    Assignee: Yamanashi TLO Co., Ltd.
    Inventor: Kenzo Hiraoka
  • Patent number: 7091536
    Abstract: A barrier implanted region of a first conductivity type located below an isolation region of a pixel sensor cell and spaced from a doped region of a second conductivity type of a photodiode of the pixel sensor cell is disclosed. The barrier implanted region is formed by conducting a plurality of deep implants at different energies and doping levels below the isolation region. The deep implants reduce surface leakage and dark current and increase the capacitance of the photodiode by acting as a reflective barrier to electrons generated by light in the doped region of the second conductivity type of the photodiode.
    Type: Grant
    Filed: November 14, 2002
    Date of Patent: August 15, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Howard Rhodes, Chandra Mouli
  • Patent number: 7091059
    Abstract: A method of forming a multiple-trench photosensor for use in a CMOS imager having an improved charge capacity. The multi-trench photosensor may be either a photogate or photodiode structure. The multi-trench photosensor provides the photosensitive element with an increased surface area compared to a flat photosensor occupying a comparable area on a substrate. The multi-trench photosensor also exhibits a higher charge capacity, improved dynamic range, and a better signal-to-noise ratio. Also disclosed are processes for forming the multi-trench photosensor.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: August 15, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Howard E. Rhodes
  • Patent number: 7091466
    Abstract: Embodiments provide structures and methods for binning pixel signals of a pixel array. Pixel signals for pixels in an element of the array are binned simultaneously. Pixels in an element are located in a plurality of rows and columns. In exemplary embodiments, pixel voltage signals or pixel current signals are binned.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: August 15, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Nikolai E. Bock
  • Patent number: 7091047
    Abstract: Methods and kits for diagnosing tumorigenicity by measuring the concentration of GP88 in blood, plasma, serum, saliva, urine and other biological fluids. The methods and kits detect GP88 in biological fluids at a concentration as low as about 0.1 to 10 nanograms per milliliter and are useful for determining whether a patient has a tumorigenic condition, whether the patient is likely to be responsive to anti-tumorigenic therapies, and whether the treated patient is responding to anti-tumorigenic therapy by measuring the concentration of GP88 in the patient's serum or other biological fluid.
    Type: Grant
    Filed: October 28, 2002
    Date of Patent: August 15, 2006
    Assignee: A&G Pharmaceutical, Inc.
    Inventor: Ginette Serrero
  • Patent number: 7092949
    Abstract: A recording medium can store data which can be accessed exclusively by a particular person in a general circumstance of using a recording medium such as a personal computer circumstance. The recording medium stores the data having a directory structure. A first set of root directory information is recorded in a first section. A second set of root directory information is recorded in a second section located at a predetermined position different from the position of the first section. The first set of root directory information is a part of the second set of root directory information.
    Type: Grant
    Filed: February 27, 2001
    Date of Patent: August 15, 2006
    Assignee: Ricoh Company, Ltd.
    Inventor: Mitsuru Ohgake
  • Patent number: 7090815
    Abstract: A method of forming a catalyst body by forming a first layer of hemispherical grain polysilicon over a substrate, and oxidizing at least a portion of the first layer to form a second layer of silica. Additionally, forming a third layer of nitride material over the second layer, and forming a catalyst material over the nitride layer, can be performed before annealing to form a catalyst body.
    Type: Grant
    Filed: April 7, 2005
    Date of Patent: August 15, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Yongjun Jeff Hu, Er-Xuan Ping