Patents Represented by Attorney Douglas J. Flehr Hohbach Test Albritton & Herbert LLP Crisman
  • Patent number: 5914753
    Abstract: A method and system is disclosed for scaling computer video in the process of scan rate conversion. In the disclosed system and method storage is provided for at least two lines of graphics pixels per video component composing the computer graphics signals and less than a full frame's worth of the graphics pixels. The graphics pixels are stored as they are provided so that the newest graphics pixels or a linear combination of the newest graphics pixels and stored graphics pixels overwrite previously-stored graphics pixels. In a repeating pattern for every RV VGA lines, where RV.gtoreq.2, television pixels composing the television video signals are generated from a weighted sum of the stored graphics pixels such that a different precomputed set of weights are used to compute the television pixels for each of the generated television lines.
    Type: Grant
    Filed: June 25, 1998
    Date of Patent: June 22, 1999
    Assignee: Chrontel, Inc.
    Inventor: Timothy J. Donovan
  • Patent number: 5900623
    Abstract: An active pixel sensor implemented with CMOS technology that employs a plurality of photocells, each including a photodiode to sense illumination and a separate storage node with a stored charge that is discharged during an integration period by the photocurrent generated by the photodiode. Each photocell includes a switching network that couples the photocurrent to the storage node only during the integration period while ensuring that a relatively constant voltage is maintained across the photodiode during integration and non-integration periods. The transistors in the switching network operate in a forward active subthreshold region, ensuring linear operation and the diode voltage is clamped to a small positive voltage so that the diode is always reverse-biased. A source-follower generates a output signal correlated to the charge on the storage node that is coupled to column output circuitry that samples the signal.
    Type: Grant
    Filed: August 11, 1997
    Date of Patent: May 4, 1999
    Assignee: Chrontel, Inc.
    Inventors: Randy P.L. Tsang, Lawrence Tze-Leung Tse, Timothy J. Donovan, King Cheung Yen
  • Patent number: 5886923
    Abstract: A semiconductor non-volatile memory device is disclosed which is based on the use of Fowler Nordheim electron tunneling to charge and discharge the isolated gates of the storage cells. The disclosed memory device includes global decoder circuitry capable of passing either positive or negative voltages to a set of global word lines controlling, local decoder circuitry. The local decoder includes a set of word line drivers, each of which sets the voltage level of a corresponding local word line in response to the voltage levels of its associated global word line and a collection of control signals. Each word line driver includes one p-channel transistor and two n-channel transistors. These three transistors collectively establish selected local word lines at appropriate voltages for erase, program and read operations. The three transistors also establish unselected local word lines at solid bias voltages that prevent disturbance of memory cells that are not the target of a memory operation.
    Type: Grant
    Filed: October 27, 1997
    Date of Patent: March 23, 1999
    Assignee: Integrated Silicon Solution Inc.
    Inventor: Hsi-Hsien Hung
  • Patent number: 5887091
    Abstract: A bidirectionally amplifying rare earth doped fiber optical amplifier having an equalized gain at multiple wavelengths is disclosed for use in dense wavelength multiplexed bidirectional fiber transmission applications. In a first embodiment, a four port circulator is utilized with two amplifying fibers; one for each direction of propagation and a multiplicity of gratings configured to equalize the gain at the different wavelengths. Different embodiments utilizing three port and four port circulators are utilized. A more general amplifier device with equal gain at multiple wavelengths is disclosed.
    Type: Grant
    Filed: July 18, 1997
    Date of Patent: March 23, 1999
    Assignee: Ditech Corporation
    Inventors: Salim N. Jabr, Gennady I. Farber, Edward A. Vetter, Sami T. Hendow
  • Patent number: 5861981
    Abstract: A system and method are disclosed for adjusting the gain profile of an optical amplifier including a pump laser and an active gain element by selectively controlling the electron populations of at least one Stark sublevel of the electronic energy levels of the optical amplifier's active gain element. By dynamically controlling the electron populations of selected Stark sublevels the gain profile of the active gain element can be flattened. In a first method for controlling electron populations two-photon transitions are initiated between a pair of Stark sublevels of the same energy manifold of the active gain element. Two-photon transitions are stimulated by two additional pump lasers operating at wavelengths whose difference approximates the energy difference in the pair of Stark sublevels between which electrons are to be moved.
    Type: Grant
    Filed: August 20, 1997
    Date of Patent: January 19, 1999
    Assignee: Ditech Corporation
    Inventor: Salim N. Jabr
  • Patent number: 5852379
    Abstract: A tunable phase generator is disclosed suitable for use in integrated circuits. The phase generator includes a delay element wherein passive resistors and conductors are employed to provide relatively constant delays despite changes in operating temperatures and voltages. The phase generator is driven by a clock signal and generates therefrom a self-resettable output signal pulse with a selectable pulse width no longer than the width of the clock signal. The variable widths are provided by varying the delays of the delay elements and adding combinational logic between respective delay elements and at the input and output of the phase generator that ensure that, in most situations, the output signal pulse is reset after a delay that is independent of the pulse width of the clock signal. Delays are lengthened by decreasing the current available to a delay element for charging the capacitors.
    Type: Grant
    Filed: May 9, 1997
    Date of Patent: December 22, 1998
    Assignee: Integrated Silicon Solution Inc.
    Inventor: Yong H. Jiang
  • Patent number: 5852666
    Abstract: A system providing capability security for distributed object systems is disclosed. The basic tenet of capability security is that the right to do something to an object (e.g., invoke a particular object's methods) is represented solely by the holding of a reference to that object. In each of the preferred embodiments described herein, an object is presumed to hold legitimately a reference to a particular object only if the object knows some unpublicized (except under the conditions required by capability security) key associated with the particular object. That is, an object's key is required along with the object's reference. So that capability security is preserved when object references are passed between objects in different processes, the object references being passed are encrypted upon transmission and then decrypted upon arrival at their intended destination.
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: December 22, 1998
    Assignee: Sun Microsystems, Inc.
    Inventors: Mark S. Miller, E. Dean Tribble, Norman Hardy, Eric C. Hill, Christopher T. Hibbert
  • Patent number: 5828880
    Abstract: A pipelined process execution control system for multiprocessors is disclosed that enables multiple processors to cooperatively execute one or many software processes so that cache locality is not violated and extensive state, or context, information need not be saved and restored for each small piece of work performed on multiple data items. The present pipelined process execution control system incorporates (1) a software procedure defined as a pipelined sequence of normal or parallel steps, (2) multiple threads running on the multiprocessor, each of which executes the entire sequence of steps on one datum or data item from a received data stream, and (3) a process control structure to control the threads executing the sequence of steps, so that the normal steps are executed by only one thread at a time and the threads begin executing (or "enter") subsequent normal steps in the sequence in the same order as the threads entered the first step of the sequence.
    Type: Grant
    Filed: July 6, 1995
    Date of Patent: October 27, 1998
    Assignee: Sun Microsystems, Inc.
    Inventor: James G. Hanko
  • Patent number: 5826025
    Abstract: A system and method for providing annotation overlays from diverse sources of commentary for World-Wide Web documents is disclosed. Sources of commentary contribute annotation overlays regarding particular documents on the World-Wide Web. The annotation overlays from a particular source are stored on one or more overlay servers, which are connected to the Web. A user of a Web browser opens an annotation proxy server between the Web browser and the Web servers that intercepts all documents retrieved by the Web browser and merges with the retrieved documents commentary from sources designated by the user of the Web browser that refer to the requested documents. Multiple annotation overlay proxies can be serially connected. The annotation proxy can perform the merge operation by first creating a local annotation directory of annotation overlays from sources designated by the user then, when the user requests a document, merging with the requested document information only from the annotation directory.
    Type: Grant
    Filed: September 8, 1995
    Date of Patent: October 20, 1998
    Assignee: Sun Microsystems, Inc.
    Inventor: Wayne C. Gramlich
  • Patent number: 5818766
    Abstract: A program drain voltage pump is provided that employs multiple pumping sections that are adaptively controlled to provide a pumped drain voltage (VD) that rises smoothly and rapidly to an optimum VD level for programming EPROM or flash memory cells and maintains VD at the optimum level with minimal ripple. The pumping sections are configured to pump a common VD node that is coupled to the drains of the EPROM or flash memory cells. Each pumping section is driven by a clock signal whose pulses are out of phase with the clock signals driving the other pumping sections. All of the clock signals have roughly the same frequency. Due to the staggered clocks, each pump is activated during a different respective time period, which smooths out VD.
    Type: Grant
    Filed: March 5, 1997
    Date of Patent: October 6, 1998
    Assignee: Integrated Silicon Solution Inc.
    Inventor: Paul Jei-Zen Song
  • Patent number: 5812482
    Abstract: A wordline wakeup circuit for use in a static memory responsive to an external clock signal and chip enable signals provided by a controller/microprocessor to perform a memory operation on the static memory. The wordline wakeup circuit receives a global clock (GCLK) signal generated by memory control circuitry from the external clock signal and a word line enable (WLEN) signal asserted by the control circuitry when the chip enables indicate a pending memory operation. The wordline wakeup circuit asserts a wordline wakeup signal (LWLEN) signal as soon as possible after the GCLK signal goes high. The LWLEN signal when asserted activates decoder circuity to assert wordlines as necessary to perform the memory operation. If the WLEN signal is provided, the wordline wakeup circuit keeps the LWLEN signal high for at least the high portion of the GCLK signal, enabling the decoder to execute the memory operation, if the WLEN signal is not provided, the wordline wakeup circuit drops the LWLEN signal.
    Type: Grant
    Filed: November 13, 1996
    Date of Patent: September 22, 1998
    Assignee: Integrated Silicon Solution Inc.
    Inventors: Yong H. Jiang, Steve Lim
  • Patent number: 5813019
    Abstract: A user-friendly text editor for structurally represented computer programs is disclosed. The present editor combines advantages of text editors and structure editors by transforming, as the user types, the text stream entered by the user into a token stream, where the tokens of the token stream constitute the words of the program being entered. Each of the tokens is classified by the editor as one of a group of extended lexemes defined by the language in which the program being edited is written. These extended lexemes are defined similar to lexemes that might be used in a batch lexer, but are more numerous as the present editor must account for the incomplete and ill-formed lexemes that arise as the user types the program. Before performing lexical analysis, the present editor separates program statements from program comments.
    Type: Grant
    Filed: July 6, 1995
    Date of Patent: September 22, 1998
    Assignee: Sun Microsystems, Inc.
    Inventor: Michael L. Van De Vanter
  • Patent number: 5805889
    Abstract: A system and method for integrating versioning and editing of data repositories is disclosed. A data repository consists of a number of packages, each having at least one package version that includes at least one component. A version handler is uniquely associated with a package version being edited and monitors all versioning commands associated with that package version. A component handler is uniquely associated with a component being edited or a component in an editing chain. When associated with a component being edited, a component handler forms the exclusive interface between that component and the editor and monitors all editing actions taken with respect to its associated component. Other component handlers act as communications links between their child component handler and one parent handler (e.g., a top-level component handler is coupled to the version handler associated with the same package).
    Type: Grant
    Filed: October 20, 1995
    Date of Patent: September 8, 1998
    Assignee: Sun Microsystems, Inc.
    Inventor: Michael L. Van De Vanter
  • Patent number: 5790669
    Abstract: A system and method is disclosed that provides lightweight non-repudiability for networked computer systems. Each party to a two-party communication maintains hashes on its incoming and outgoing messages. At its discretion, either party can request that the other party commit to the conversation. The second party (if it agrees) then sends signed hashes that third parties can use to verify the content of the conversation. The party requesting the commitment stores its corresponding hashes when it sends the request. If the hashes from both parties are the same for the same positions in their conversation, the two parties can verify that their conversation is error-free. If the sending party also maintains logs of both sides (incoming and outgoing) of the conversation and stores hashes corresponding to the beginning of the logs, the sending party is also able to verify to a third party that the logged portion of the conversation was between the first party and the second party.
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: August 4, 1998
    Assignee: Sun Microsystems, Inc.
    Inventors: Mark S. Miller, Christopher T. Hibbert, Norman Hardy, E. Dean Tribble
  • Patent number: 5781633
    Abstract: A system providing capability security for distributed object systems is disclosed. The basic tenet of capability security is that the right to do something to an object (e.g., invoke a particular object's methods) is represented solely by the holding of a reference to that object. In each of the preferred embodiments described herein, an object is presumed to hold legitimately a reference to a particular object only if the object knows some unpublicized (except under the conditions required by capability security) key associated with the particular object. That is, an object's key is required along with the object's reference. So that capability security is preserved when object references are passed between objects in different processes, the object references being passed are encrypted upon transmission and then decrypted upon arrival at their intended destination.
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: July 14, 1998
    Assignee: Sun Microsystems, Inc.
    Inventors: E. Dean Tribble, Mark S. Miller, Norman Hardy, Christopher T. Hibbert, Eric C. Hill
  • Patent number: 5781241
    Abstract: A method and system is disclosed for scaling computer video in the process of scan rate conversion. In the disclosed system and method storage is provided for at least two lines of graphics pixels per video component composing the computer graphics signals and less than a full frame's worth of the graphics pixels. The graphics pixels are stored as they are provided so that the newest graphics pixels or a linear combination of the newest graphics pixels and stored graphics pixels overwrite previously-stored graphics pixels. In a repeating pattern for every M television lines, where M>2, television pixels composing the television video signals are generated from a weighted sum of the stored graphics pixels such that a different precomputed set of weights are used to compute the television pixels for each of the M television lines. The television signals are horizontally and vertically scaled so the graphics image corresponding to the computer graphics signals being converted fits within a television display.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: July 14, 1998
    Assignee: Chrontel, Inc.
    Inventor: Timothy J. Donovan
  • Patent number: 5774471
    Abstract: A multi-location word line repair circuit is described that can be employed in a static memory including a plurality of sub-arrays responsive to respective sets of global word lines (GWL). Included in the repair circuit is a redundant word line (WL) decoder that stores and subsequently decodes the address of a defective global word line to be repaired. A selector circuit coupled to the redundant WL decoder is activated whenever the decoder decodes the stored address of the defective GWL from the memory address lines. When this occurs, the selector circuit activates at least one redundant global word line to repair the defective global word line within a selected group of global word lines that can include any combination of the respective sets of GWLs that are provided to the plurality of sub-arrays. To prevent the defective GWL from interfering with a memory operation being performed by the substitute RWL, a deselector circuit disables the defective global word line within the selected group of word lines.
    Type: Grant
    Filed: December 17, 1996
    Date of Patent: June 30, 1998
    Assignee: Integrated Silicon Solution Inc.
    Inventor: Yong H. Jiang
  • Patent number: 5767729
    Abstract: A distribution charge pump is disclosed that provides a high voltage output that can be used to write or erase EEPROM cells. The charge pump is enabled by a high (VCC) input signal, which is input to a pair of always-on pass transistors. The output of one of these pass transistors turns on a third transistor whose source is tied to an internal node that is coupled to one terminal of a MOS capacitor and the gate of a fourth transistor. The other terminal of the MOS capacitor is tied to a clock signal and the source and drain of the fourth transistor are tied respectively to the charge pump output and a high voltage power supply node (VPP). The capacitor stores charge on the internal node when the clock signal goes high and discharges when the clock signal goes low. Due to this discharge, the voltage at the internal node drops, which causes the third transistor to turn on and supply charge to the internal node, preventing the complete discharge of charges stored during the positive phase of the clock cycle.
    Type: Grant
    Filed: October 31, 1996
    Date of Patent: June 16, 1998
    Assignee: Integrated Silicon Solution Inc.
    Inventor: Paul Jei-Zen Song
  • Patent number: 5754857
    Abstract: A system and method for automating workflow by distributing the tasks required for the execution of said workflow over servers and clients connected on a network. The disclosed system and method allow the stages of the workflow to be performed asynchronously, meaning that, once a workflow initiated by a user has been initiated by a database server, the stages of the workflow can be executed on respective network clients without further interaction with the server (i.e., without requiring a stateful connection between the clients and servers). This is accomplished through the use of a workflow courier that embodies all programs (encompassing rules governing the execution of the workflow) and forms needed by clients to complete stages of the workflow. The workflow courier also stores workflow state information that indicates which stages of the workflow have been completed.
    Type: Grant
    Filed: December 8, 1995
    Date of Patent: May 19, 1998
    Assignee: Sun Microsystems, Inc.
    Inventor: Steven D. Gadol
  • Patent number: 5752058
    Abstract: A user-friendly editor for structurally represented computer programs is disclosed. The present editor combines advantages of text editors and structure editors by transforming, as the user types, the text stream entered by the user into a token stream, where the tokens of the token stream constitute the words of the program being entered. Each of the tokens is classified by the editor as one of group of extended lexemes defined by the language in which the program being edited is written. These extended lexemes are defined similarly to lexemes that might be used in a batch lexer, but are more numerous as the present editor must account for the incomplete and ill-formed lexemes that arise as the user types the program. Based on information in the token stream, the editor prettyprints the program as the user types.
    Type: Grant
    Filed: July 6, 1995
    Date of Patent: May 12, 1998
    Assignee: Sun Microsystems, Inc.
    Inventor: Michael L. Van De Vanter