Abstract: A user-friendly editor for structurally represented computer programs is disclosed. The present editor combines advantages of text editors and structure editors by transforming, as the user types, the event stream entered by the user into a token stream, where the tokens of the token stream constitute the words of the program being entered. Each of the tokens is classified by the editor as one of group of extended lexemes defined by the language in which the program being edited is written. These extended lexemes are defined similar to lexemes that might be used in a batch lexer, but are more numerous as the present editor must account for the incomplete and ill-formed lexemes that arise as the user types the program. Based on information in the token stream, the editor prettyprints the program as the user types. The editor also allows the user to edit the program from the prettyprinted display as if the program were internally represented as text.

Abstract: A system and method are disclosed that enable a batch lexer to be used to incrementally update a token stream representation of a computer program maintained in an editor as the computer program is being edited. A keystroke executive interprets editing inputs and dispatches editing events to a lexical analyzer. The lexical analyzer converts a range of the tokens likely to be affected to an equivalent old textual stream that preserves whitespace implied by but not represented within the token stream. A new text stream is generated from the old text stream by carrying out the current editing event. I.e., insertion of text is handled by the insertion of the relevant text into the old text stream (now the new stream) and deletion of a character is handled by deleting the appropriate character from the old text stream. The batch lexer is then invoked on the new text stream and as a result returns a new token stream.

Abstract: A repeat-bit based system and method for executing zero overhead loops, or repeat loops, in an information processing chip that does not require a repeat end register or a dedicated comparator. Executing repeat loops requires a processor to iterate N times a code fragment of loop instructions. All systems providing this capability must know when to refetch the first loop instruction at the end of a repeat. To do this, the present invention adds a repeat bit to the processor's instruction set. This bit is set by the assembler/compiler that generates the executable code fragment comprising the repeat loop. Where the repeat loop includes plural instructions, the assembler sets the repeat bit of the penultimate loop instruction. As each loop instruction is fetched, decoded and executed, the decoder detects the repeat bit and passes it to loop control circuitry.

Abstract: An audio synthesis circuit is disclosed that incorporates a phase accumulator, adder, sinusoid computing circuit, feedback controller, modulation controller and output accumulator. The audio synthesis circuit generates harmonically complex audio tones, which are output from the sinusoid computing circuit via the output accumulator through the use of frequency modulation of the phase of the audio tones. Instead of feeding back the audio tone to modulate the current phase, the disclosed audio synthesis circuit feeds back the current phase, which is converted by the feedback controller into a scaled feedback factor generated through a process using a waveform computing circuit that, without log-linear conversion, computes a preset cyclical function at an argument equal to the current phase. The feedback factor is then added to the current phase to generate a modulated phase value.

Abstract: A portfolio management system (PMS) is disclosed that allows users to manage, create, edit, debug and compile software portfolios that can include several different types of components, or projects. For example, projects can be Java applets, standalone executable programs, image files, Java class libraries or remote Java applets. The software portfolios and/or their constituent projects can be stored on the system hosting the portfolio management system or on any remote system that can be accessed via the Internet using standard Internet communications protocols, such as FTP or HTTP. The PMS includes portfolio files, each of which includes links to the projects that compose a portfolio and project files that set out the attributes of one project. The PMS also provides portfolio methods that allow users to create, choose, import and remove entire portfolios and project methods that allow users to create, import, choose, edit, remove, run, copy and paste projects.

Abstract: A power usage simulator and method for generating a baseline power usage model for a representative sample of cells in a circuit cell library, where the baseline power model is based on signal slew rates and output load for a given of environmental conditions. The baseline power usage model is aggregated for a representative set of library cells so as to provide an accurate baseline power usage computation for all logic cells rather than for each transistor or each individual cell. Thereafter, power coefficient sensitivities to varying temperature, supply voltage and process conditions are determined for each power coefficient. Power coefficient sensitivities are measured by comparing the ratios of the measured power coefficients resulting from maintaining two of the three parameters (temperature, voltage and process) at baseline values while varying the third parameter over its entire range.