Abstract: In a database, a high availability data replicator (28, 46, 48) synchronizes primary and secondary servers (10, 30). A smart large object application program interface (82) resides on the secondary server (30). A cache module (108) creates a memory cache (88) corresponding to a smart large object responsive to a smart large object read operation requested by a client (86). A smart large object read module (110) executes the read operation without acquiring a lock on the corresponding smart large object. An exception module (102) sends an exception to the client (86) responsive to a synchronizing event of the high availability data replicator (28, 46, 48) modifying said smart large object. On the primary server (10), log entries of the modifying operation are ordered so that a log entry updating a large object header of said smart large object is consistent immediately upon execution on the secondary server (30).

Abstract: A method to replace an electrical interface on a printed circuit board having a plurality of contact pads on a top surface, the contact pads being connected to conducting material extending through said circuit board. For the contact pad being replaced, drilling a hole through said printed circuit board at that location, and removing any remaining conductor material attached to the contact pad on the top board surface. Providing a replacement conductor/contact pad structure having a generally T-configuration with a stem and a head that completely surrounds the stem, wherein said head has a diameter greater than the diameter of the drilled hole. Inserting the replacement conductor/contact pad into the hole with said stem extending beyond the second surface of the board with the bottom surface of the head being in contact with the first surface of said board. A replacement conductor/contact pad on repaired board is also described.

Abstract: A technique for supporting a user of a first device coupled to a second device of a support agent. A current screen image of the first device is sent to the second device. The second device displays the current screen image of the first device. The agent device determines the position of an input icon to be displayed on the current screen image, and the position is sent to the first device. The first device displays an input icon on the current screen image on the first device based on the position. The second device also determines how the user should operate the input icon on the first device. Corresponding operation information is transferred to the first device.

Abstract: An information processor having a plurality of operating modes differing in power consumption and capable of changing the operating mode according to the amount of processing has periodic switching detection means of performing detection as to whether the information processor is periodically switching from a low-power-consumption operating mode in which the power consumption is lower to a high-power-consumption operating mode in which the power consumption is higher in the plurality of operating modes, and operating mode changing means of changing the operating modes between which the information processor switches to a combination of the operating modes such that the difference between the power consumptions is reduced relative to that at the time of switching between the low-power-consumption operating mode and the high-power-consumption operating mode if the switching cycle detected by the periodic switching detection means is shorter than a set cycle determined in advance.

Abstract: An interface connection is described for joining a host device, such as a Network Processor, to peripherals such as modems, printers, local area networks, Ethernets and Token-Ring interfaces. The connection is particularly useful for joining portable computers, such as laptops, to these peripherals. The connector utilizes a programmable Network Processor (NP) either in the host device or in an external fan-out box. This programmable Network Processor adapts the host device to a variety of peripheral devices utilizing different protocols and I/O speeds. The NP can use a Digital Signal Processor to provide programmable services to the physical layers. The host device may contain a high-speed communication interface with the NP contained in the external connection box.

Abstract: A method and system for forming a semiconductor device having superior ESD protection characteristics. A resistive material layer is disposed within a contact hole on at least one of the contact stud upper and lower surface. In preferred embodiments, the integral resistor has a resistance value of between about one Ohm and about ten Ohms, or between 10 and 100 Ohms. Embodiments of the resistive layer include sputtered silicon material, a tunnel oxide, a tunnel nitride, a silicon-implanted oxide, a silicon-implanted nitride, or an amorphous polysilicon. Embodiments of the invention include SRAMs, bipolar transistors, SOI lateral diodes, MOSFETs and SiGe Transistors.

Abstract: A composition for stripping and cleaning organic coatings from substrates, comprising a solution of high-boiling alcohols, preferably polyglycols, a surfactant, preferably a nonylphenol ethoxylate, and an alkali metal hydroxide, said composition being essentially free of any amines. The composition aggressively and effectively strips paints and other organic coatings without harming underlying substrates damaged by prior art strippers, over conventional or lower time periods, and at conventional or lower temperatures. One embodiment of the invention comprises from about 40% to about 98.9% by weight of a high-boiling alcohol; from about 1% to about 60% of a non-ionic surfactant; and from about 0.1% to about 10% of an alkali hydroxide or mixture of alkali hydroxide.

Abstract: A method and system for controlling a plurality of pipes in a computer network, including at least one processor for a switch, the at least one processor having a queue, the plurality of pipes utilizing the queue for transmitting traffic through the switch, wherein each pipe is assigned a priority ranking class, each class has a unique priority rank with respect to each of the other classes, the ranks ranging from a highest priority rank to a lowest priority rank. A transmission probability is calculated for each pipe responsive to its priority rank. If excess bandwidth exists for the queue, the transmission probability of each pipe is linearly increased. Alternatively, if excess bandwidth does not exist, the transmission probability for each pipe is exponentially decreased. Packets are transferred from a pipe to the queue responsive to the pipe transmission probability and priority rank.

Abstract: A parallel processing system includes a plurality of stages operatively coupled in parallel and operating simultaneously. Each stage including a process unit generating a predetermined function and a buffer coupled via a slow output and a slow input ports to the process unit. The buffer also includes a fast input port and a fast output port. A controller drives the buffer to operate in a Slow Read Phase when data is written from the buffer into the process unit, a Slow Write Phase when data is written into the buffer from the process unit, a Fast Write Phase when data is written at a fast rate into the buffer and a Fast Read Phase when data is read from the buffer.

Abstract: A thermal monitor diode is provided that comprises a silicon thin film on an insulator mounted on a silicon substrate. An opening extends through the silicon thin film and through the insulator and partially into the silicon substrate and terminates at an end wall. A conductive material is disposed in the opening and extends to the end wall. The substrate has a P/N junction formed therein adjacent the end wall, and an insulating spacer material surrounds the conductive material and is sufficiently thin to allow temperature excursions in the silicon thin film to pass therethrough. The invention also contemplates a method of forming the diode.

Abstract: Photoimagable polymers, as well as dielectric materials and their manufacture and use in the production of printed circuit boards and printed wiring boards are described. The polymers comprise between about 30 and about 70 parts of a polyfunctional resin and between about 70 and about 30 parts of the condensation product of an epihalohydrin and a bisphenol based on 100 parts by weight of resin. The polymer is cured by a photocationic initiator. It is characterized by a glass transition temperature of at least about 140° C. and a flex fatigue life of at least about 10,000 cycles at a 3% strain. Optionally, less than 10 parts of a third specified epoxy resin may be added to the mixture to improve flexibility without decreasing the glass transition temperature of the polymer.

Abstract: In general, the present invention provides a computer apparatus, power supply control method and program for reducing the standby power requirements in a computer supporting a wake-up function. The present invention reduces standby power requirements on power off by three types of control: a wake-up function being set by a user, existence of a device actually capable of realizing the wake-up function, and supplying the power from the auxiliary source only to the device capable of realizing the wake-up function.

Abstract: An electronic subassembly comprises a printed circuit board and an electronic module, particularly a ceramic module, electrically connected to one another through a planar interposer. The interposer comprises an insulator sheet and electrical spring elements joining contact sites on the module with contact pads on the PCB. The invention includes modifications that improve the integrity of electrical connections between the printed circuit board and the electronic module. This is achieved by compensating for non-planarity between the surfaces of the interposer and the module, particularly resulting from a convex curvature of the module, by minimizing relative movement, such as rocking in the x-z and y-z planes. It also includes modifications to the suspension of the module within the interposer housing to reduce the effects caused by any sliding that may occur between the interposer and the module in the x-y plane.

Abstract: A circuitized substrate and a method of making the circuitized substrate are provided. The circuitized substrate includes a substrate having a conductive pad thereon. A first layer of solder enhancing material is positioned on the conductive pad, the first layer of solder enhancing material includes a first region and a second region positioned relative to the first region. A solder member is positioned on the first region of the first layer of solder enhancing material. A second layer of solder enhancing material is positioned on the solder member and on a portion of the second region of the first layer of solder enhancing material. The circuitized substrate may be used in the fabrication of an electronic package.

Abstract: A method and apparatus are used for finding the longest prefix match in a variable length prefix search when searching a direct table within a routing table structure of a network processor. The search through the routing table structure is expedited by hashing a first segment of an internet protocol address with a virtual private network number followed by concatenating the unhashed bits of the IP address to the result of the hash operation to form an input key. Patterns are compared a bit at a time until an exact match or the best match is found. The search is conducted in a search tree that provides that the matching results will be the best possible match.

Abstract: The density of electronic packaging and the electrical reliability of the sub-assemblies utilizing stacked blind vias are improved by providing a blind, landless via in a first dielectric layer laminated to a conductive metal core serving as a ground plane or a power plane. A hole is provided through the dielectric layer extending to the core. A metal, such as copper, is deposited electrolytically using the metal core as the cathode, or electrolessly without seeding into the hole. The metal is deposited on the core and progressively builds in the hole to the depth required for the via. A second dielectric layer is laminated to the first, and is provided with a second layer blind via aligned with the first via. This second via may be formed by conventional plating techniques. Multiple dielectric layers with stacked blind vias can be assembled in this manner.

Abstract: A computer system, method of operation, and program product which gives a clear indication to a user when a computer system has transitioned to a trusted state.

Abstract: An apparatus and method reduce the transfer of vibration to and/or from a data a data transfer mechanism in a data storage device by coupling an adaptive mount responsive to an electrical stimulus to the data transfer mechanism. In one embodiment of the invention, a controller reads a signal that relates to the position error of a read/write component in a data transfer mechanism, applies an algorithm, and varies the damping of an adaptive mount coupled to the data transfer mechanism. The controller may be further configured to report an error to a host system that identifies a substandard data transfer mechanism so that such data transfer mechanism can be repaired or replaced.

Abstract: An apparatus is provided for engaging electrical hardware devices. The apparatus has a handle; a planar body; a planar engagement bar projecting normal from the body; a pair of arms, one arm formed at each of two ends of the bar; and each arm further bending and terminating in a bottom hook portion, the bottom hooks aligned in a common plane parallel to and spaced a gap distance from the bar and generally normal to the planar body. The hook spacing dimension is about equal to or slightly greater than an outer dimension of an electrical hardware device workpiece body but less than an outer dimension of a rectilinear lip element projecting from the hardware device workpiece. The gap distance is about equal to or slightly greater than a thickness dimension of the rectilinear lip element.

Abstract: A cache controller structure and method are provided for managing cache access for a computer system. The computer system has a processor having a direction flag and configured to run a repetitive string operation, wherein the string operation is configured to sequentially access a targeted memory block for each repetition depending on the state of the direction flag. A cache controller logic is provided to control a cache embedded in the processor while the processor executes string operations. The cache controller is configured to manipulate the cache lines responsive to the direction flag and to a position of a targeted memory block within a cache line. In some embodiments, the controller logic is also configured to manipulate the cache lines responsive to a repetition parameter value within the string operation.