Abstract: A digital hue correction circuit for correcting the color of digital TV chrominance signals includes a pipelined divider arranged to divide the smaller of the magnitudes of I and Q color mixture signals by the larger of the magnitudes of the I and Q signals to produce quotients representing tangents over the range of zero to 45 degrees for chrominance angles occurring over the range of zero to 360 degrees. The polarity bits of the I and Q signals and the polarity bit of the difference of the magnitudes of I-Q are encoded to transpose the zero to 45 degree angle tangent values over the range of zero to 360 degree angles. The transposed tangent values address a memory programmed with all negative hue correction coefficients representing the sines and cosines of angles by which the chrominance vector is to be rotated to effect hue correction.

Abstract: Frame comb filters effectively separate the chrominance and luminance components of composite video signal but produce undesirable image distortion when interframe motion occurs. Luminance cross components introduced into the comb filtered chrominance signal component during interframe motion intervals contribute to the image distortion. The luminance cross components are eliminated from the comb filtered chrominance signal by successively filtering the chrominance signal with a chrominance bandpass filter and an interline chrominance comb filter.

Abstract: A digital TV receiver includes circuitry for performing hue control by rotation of the axes of the I and Q color mixture signals. The I and Q color mixture signals are time division multiplexed and applied to a multiplicand input port of a multiplier circuit. The sines and cosines of the angle by which the I and Q vectors are to be rotated are also applied to the multiplier wherein alternate pairs of the I and Q signals are multiplied by the sine terms and intervening pairs of the I and Q signals are multiplied by cosine terms. The signal from the multiplier is applied to a delay element which delays successive samples by one sample period. Delayed and nondelayed signal samples are applied to an ADDER which produces the algebraic sums Icos .phi.+Qsin .phi. and Qcos .phi.-Isin .phi. corresponding to the desired modified I and Q signals respectively. The sums from the ADDER are demultiplexed by latches to generate separate I and Q signals.

Abstract: A pipelined binary divider which operates at video rates which consists of N like subtraction stages coupled in cascade. Each subtraction stage includes a latch for storing the divisor, the partial quotient and a modified dividend from the previous stage. A binary multiplier is arranged to multiply the latched modified dividend by a factor of two, the result being applied as the minuend to a binary subtractor and to one input of a multiplexer. The latched divisor is applied as the subtrahend to the subtraction circuit. The sign bit from the subtraction circuit controls the multiplexer to selectively pass the multiplied dividend as the dividend to the succeeding stage, for negative differences, or the magnitude of the difference from the subtraction circuit for positive differences. The sign bit is complemented and applied as an additional least significant bit (LSB) to the partial quotient. Each stage adds one bit to the quotient.

Abstract: Motion induced image distortion resulting from processing video signals in a frame-to-frame comb filter is substantially reduced by extracting motion induced luminance cross components in frame combed chrominance signal and reinserting them in the frame combed luminance signal. The chrominance signal is applied to a low pass filter to extract luminance components for reinsertion in the combed luminance signal. Higher frequency luminance cross components required to completely compensate the combed luninance signal are rejected by the low pass filter, however, to account for the missing high frequency luminance cross components, the combed luminance signal is selectively low pass filtered during interframe motion intervals before reinsertion of the cross components.

Abstract: An FM signal is demodulated by the technique of sequentially sampling the signal and combining the samples to approximate the standard formula for the instantaneous frequency deviation ##EQU1## where the dots indicate the first derivative of the samples. The FM signal is assynchronously sampled at approximately four times the carrier frequency rate. Alternate samples are substantially equivalent to orthogonal components x and y of the FM signal. At least four successive samples are successsively stored so that at least four of the lastmost samples are always available for processing. Particular x samples are summed to create averaged samples x.sub.n and differenced to create approximations of derivatives x.sub.n of the x signal components and particular y samples are similarly summed and differenced to create averaged values y.sub.n and derivatives y.sub.n. These values are used in the equation for F.sub.n. In terms of successive samples, S, the equation for F.sub.n becomesF.sub.n =(S.sub.n-1 S.sub.n+2 -S.

Abstract: An auto-flesh circuit for a TV receiver is described which operates an I and Q color mixture signals to produce flesh corrected color mixture signals I' and Q'. The received I and Q signals are demodulated in respective circuitry to generate the magnitude and angle of their vector sum. The angle values are applied as address codes to a ROM programmed to produce the sines and cosines of the applied address codes. For address code angles corresponding to chrominance signals representing flesh tones, the values of the programmed sines and cosines correspond to values of flesh corrected chrominance angles. The sine and cosine values output by the ROM are then multiplied by the magnitude of the vector sum (chrominance magnitude) to produce corrected Q' and I' color mixture signals respectively.

Abstract: A phase measuring arrangement for sampled signals changes the phase of the sampling signal in fine phase increments while comparing the magnitudes of the signal samples so produced to determine whether they have magnitudes within a given range of values. The range of values is indicative of a known phase angle. The number of magnitudes falling within the given range is indicative of the phase of the sampled signal relative to the known phase angle. Embodiments are disclosed in which such phase measuring arrangement is employed in a phase-locked loop useful for processing chrominance signals in a television receiver.

Abstract: Low pass sampled data filters tend to produce pre- and post- over/undershoots in the output signal in response to input signal transitions. These over/undershoots or sequence of artifacts are eliminated in the present system by the following method. The input signal is monitored for transitions exceeding an amplitude which tends to generate objectionable artifacts. The values of such transitions are stored and applied to a plurality of weighting circuits to generate a plurality of signal values corresponding to respective ones of the sequence of artifacts. The weighted samples are selectively combined with the filter output samples in time correspondence with the occurrence of the output artifacts to cancel the effects of the artifacts.

Abstract: The converter system includes a conventional N bit analog-to-digital (A/D) converter and also includes an automatic gain control circuit and DC offset circuit to alter the input analog signal to utilize the full N bit capacity of the A/D converter regardless of the amplitude of the input signal, within the range of the calibration of the system.

Abstract: Digital TV receivers which digitally process chroma and luma signals in different channels and convert the digital signals to analog form before matrixing will include low pass analog filters after the DAC's to remove clock switching components. The luma and chroma analog filters will impose differing group delay on their respective signals. This creates a differential phase error between the analog signals which is corrected by predictively delaying the signal which leads in phase in the DAC. This is accomplished by using clocked digital-to-analog converters forced to operate synchronously with the data stream and appropriately delaying the clock signal applied to one of the DAC's relative to the other.

Abstract: In a color TV receiver, color saturation errors associated with flesh tone correction circuits operating on demodulated color mixture signals are corrected. This is accomplished by adding the absolute value of a fraction of one of the color mixture signals to the color mixture signal in quadrature phasing therewith.

Abstract: In processing color video signals in sampled data format, the sample rate is nominally far in excess of that required to process the baseband color signals. Thus, when the chrominance signal is demodulated only certain ones of the chrominance signal samples need to be demultiplexed from the data stream to reconstruct the color mixture signals. It is convenient to phase lock a clock to the data stream and select like samples from every sequence of samples. However, the NTSC video format provides a chrominance signal which has a 180 degree phase displacement from line-to-line. Thus, if like samples are selected from all lines, there will be a line-to-line spatial translation of image points on the displayed image giving rise to fine dot crawl along vertical edges of color transitions. The present invention includes a demodulator which demultiplexes sample points which are vertically aligned line-to-line and complements (inverts the polarity) of the samples on every other line.

Abstract: A digital finite impulse response (FIR) filter is provided in which a plurality of weighted signal taps are symmetrically located in time about a weighted center tap. Weighted signals from the symmetrically located taps are summed at a first point in the filter, which sum is then combined with signals from the center tap in one sense, that is, either additively or subtractively, to produce signals at a first output. The summed signals at the first point are also combined with signals from the center tap in an opposite sense to produce signals at a second output. The two outputs will exhibit bandpass and lowpass filter response characteristics, with the outputs at which the respective responses are produced being determined by the respective senses of signal combination. The FIR filter may be of either the input tap-weighted or output tap-weighted variety.

Abstract: A color TV receiver designed to digitally process I and Q color mixture signals incorporates chroma gain control, static tint control and autoflesh in the circuitry for converting the I and Q signals to (R-Y), (B-Y) and (G-Y) for R,G,B matrixing. The magnitude and angle of the vector sum of I and Q are first determined. The angles are then adjusted for static tint control and then applied to a ROM which is programmed to output angles adjusted for fleshtones. Angles from the autoflesh ROM are applied to a summing circuit which algebraically adds to the flesh corrected angle, angle values corresponding to the angular displacement between the I axes and the (R-Y), (B-Y) and (G-Y) axes. The angles produced by the summing circuit are applied to a look-up ROM which produces the cosine values of the applied angles.The magnitude signal is amplified by coefficients which relate the I and Q signals to (R-Y), (B-Y) and (G-Y) components and which coefficients may be amplified by a chroma gain signal.

Abstract: A binary ADDER stage for producing SUM and Carry signals is constructed with five transistors, an exclusive OR gate and an exclusive NOR gate. The two digits to be added are applied to the exclusive OR gate, the output of which is connected to one input of the exclusive NOR gate and to the gate electrode of a first N-type transistor. The second input of the exclusive NOR gate is connected to a carry input terminal, and the output of the exclusive NOR provides the sum of the two digits plus the carry. The conduction path of the first N-type transistor is connected between the carry input and carry output terminals and is conditioned to conduct when the input digits differ. Second and third N-type transistors are serially connected between the carry out terminal and ground reference and have respective gate electrodes connected to the two digit input terminals respectively, for clamping the carry out terminal to a logic 0 whenever both input digits are logical 1's.

Abstract: In a television (TV) receiver having digital signal processing in which the video and sound signals are separated in the analog processing circuitry, one analog-to-digital converter (ADC) serves both the video and sound signal paths. The analog video and sound signals are multiplexed into the ADC and are demultiplexed out of the ADC to the digital video processor and to the digital sound processor at predetermined times during each horizontal TV line. In one arrangement, the sound signal conversions are periodically interleaved with the video signal conversions during the horizontal lines. In another arrangement, the sound signal is sampled and stored at normal rate over a horizontal TV line, then converted by the ADC and digitally stored at a higher-than-normal rate during the horizontal blanking interval, and then supplied to the digital sound processor periodically at the normal rate.

Abstract: A flash analog-to-digital converter includes 2.sup.N comparator circuits for an N bit resolution. Each comparator comprises a summing capacitor which is alternately connected to a reference ladder and to the input signal. The majority of the capacitors are substantially charged and discharged between input potential and reference potential each cycle. The charging/discharging tends to load both the reference ladder and the input signal source. The loading is reduced by including a D.C. biased FET between the input signal source and each summing capacitor. The FET's are biased to condition them to operate as source-followers with the summing capacitors as the load element for at least a portion of the input signal range. Respective ones of the summing capacitors are thereby precluded from charging/discharging over the full input signal excursion which in turn reduces loading on associated circuitry.

Abstract: A sampled data FIR filter of the type including alternately connected ADDER circuits and delay stages in a serial chain where input samples are multiplied by coefficients and applied in parallel to the ADDER circuits for addition to partial sums therein has respective COUNTER circuits coupled to each ADDER circuit to respond to sum overflows. The COUNTER circuits are serially connected one to another by delay stages. The overflow count corresponding to each signal sample is translated to successive counter in consonance with such partial sum being translated from ADDER circuit to ADDER circuit. The last COUNTER circuit contains the net number of overflows corresponding to the output sum, which overflow signal is indicative of the state of correctness of the output sample.

Abstract: An analog carrier signal and its sidebands contain modulated information which is to be digitally encoded and processed. Demodulation and digital encoding is accomplished in a single process by an analog-to-digital converter, which samples the analog signals in response to a sampling signal of a frequency which is at least twice the bandwidth of the band of frequencies containing the carrier signal and its information-bearing sidebands. The analog signal samples are digitally encoded, producing a band of digital information signals corresponding to baseband signal components. When used in a television receiver to produce digital signal samples, the band of analog signals may include both sound and picture carriers and their audio and video information. By controlling the phase and frequency of the analog carrier signal in relation to the color subcarrier signal, and deriving the sampling signal from the analog carrier, an ease in video signal demodulation is provided.