Abstract: An electrical connector assembly suitable for use in a matrix assembly. The electrical connector assembly has two connectors, each assembled from wafers. The individual wafers are sheilded and separate shield pieces are positioned in one connector transverse to the wafers in that connector. Additionally, wafers in at least one of the connectors includes a compliant portion that allows the two connectors to be self-aligning.

Abstract: A strip, leadframe or panel type handling device for use in testing semiconductor components. The handling device has a thermal plate assembly with embedded electrical resistance heaters. The heaters are separately controlled in zones to provide uniform temperature across the plate for elevated temperature testing. Cooling channels are formed in the plate. Intermingling channels are provided to allow different types of cooling fluids to be used to cool at different rates or hold a cold temperature at different levels. The cooling channels can likewise be provided in zones to promote temperature uniformity. Vacuum channels are used to hold the semiconductor parts under test in close contact with the thermal plate.

Abstract: A contactor for use in testing integrated circuit chips. The contactor is made with an array of V-shaped contact elements. The V-shaped contact elements are nested so that the contact elements can be longer than the pitch of the contact points. In this way, the compliance of the beam portions of the contact elements can be increased. Also, the V-shape is very robust. Further, the V-shape allows “fly-by” testing, which is very useful at high speeds.

Abstract: An automatic test system for testing smart card chips. The system includes synchronization circuitry that allows response signals generated at random times after a stimulus to be synchronized with a pattern generator. The described system has multiple paths in the synchronization circuitry that allows responses from several devices under test to be synchronized with each other so that parallel testing is supported. The system is well adapted for testing of smart card chips because such chips often respond to stimulus at random times. Other adaptations are included for testing of smart card chips. These adaptations include circuitry to generate a modulated RF carrier signal and signal processing circuitry that can detect modulation imposed on the RF carrier, allowing the smart card chip to be tested without modifications to the device for test access.

Abstract: A system to automate distribution of materials and tooling to production machines, where a very simple cross-section track, such as a circle or an X, is anchored to the equipment and to load/unload stations for materials and tooling, and where simple one or two wheeled robotic cars, where the wheels need not be mounted with yaw pivots to the cars, transport the materials or tooling. A control system keeps controls the motor or motors that drive one or two wheels to minimize pitch of the cars as they move along the track.

Abstract: Pin slice circuitry used in automatic test equipment is disclosed. The pin slice circuitry includes a portion implemented using CMOS technology and a portion implemented using bipolar technology. The CMOS portion includes a plurality of timing generator circuits, digital sigma delta modulator circuitry used to generate digital bit streams representative of analog reference levels, and programmable digital signal processing circuitry. The bipolar portion includes driver/receiver channels, a parametric measurement unit, and decoder circuitry, which produces the analog reference levels from the digital bit streams generated by the modulator circuitry. The analog reference levels are used by the driver/receiver channels and the parametric measurement unit; and, the digital signal processing circuitry is used to monitor and control levels produced by the parametric measurement unit. The disclosed pin slice circuitry has the advantages of reduced size and cost as compared with conventional pin slice circuitry.

Abstract: Automatic test equipment suitable for testing high speed semiconductor devices. The test equipment includes a formatter circuit with a flip flop that produces an output in the desired format even if the edge signals that control the setting and resetting of the flip flop overlap. The flip flop allows the test system to generate outputs with narrow pulses, and can generate output pulses that are narrower than the controlling edge signals.

Abstract: A tester having a fast but flexible pattern generator which is implemented using readily available memories. The tester includes a pattern memory which holds test vectors. The vectors are organized into modules. The order of execution of the modules is selected from a list stored in memory. In the preferred embodiment, memories which operate in burst mode are used to implement the pattern memory. To compensate for the decrease in data rate which occurs when execution switches between modules in the middle of a burst, the memory refresh rate is dynamically altered upon switching between modules.

Abstract: Pin slice circuitry used in automatic test equipment is disclosed. The pin slice circuitry includes a portion implemented using CMOS technology and a portion implemented using bipolar technology. The CMOS portion includes a plurality of timing generator circuits and sigma delta modulator circuitry, which is used to generate digital bit streams representative of analog reference levels. The bipolar portion includes driver/receiver channels, a parametric measurement unit, and decoder circuitry, which produces the analog reference levels from the digital bit streams generated by the modulator circuitry. The analog reference levels are used by the driver/receiver channels and the parametric measurement unit. The disclosed pin slice circuitry has the advantages of reduced size and cost as compared with conventional pin slice circuitry.

Abstract: A high speed, high density surface mount connector which may be easily manufactured. The connector is formed by injection molding a ground plate into a portion of an insulative housing, leaving conducting beam portions and tail portions extending from opposite ends of the housing. A mating section of the housing is separately made. Signal contacts are sandwiched between the two pieces of the housing, which are then mated. The signal contacts are parallel to the ground plate but spaced apart from it, forming individual transmission lines. In use, the tail portions are soldered to a printed circuit board. The beam portions are bent to form contact springs. They make contact to a back plane when the connector is pressed against the back plane.

Abstract: An interface between a test head portion of automatic test equipment and handling device such as a prober. The interface employs preloaded kinematic couplings between the test head and handling device and between the probe card and the test head. These couplings allow the probe card to be repeatedly positioned relative to the component in the handling device. They also reduce forces on the probe card to prevent distortion of the probe card. The interface provide seperate mechanical and electrical loops such that mechanical position is not dependant on the electrical structure.

Abstract: A test system for testing numerous parts simultaneously. A stack of test boards is provided in a test chamber. Each of the test boards has a region of contactors on it. To perform a test, trays are inserted between the boards in the stack and aligned with the regions of contactors. A mechanism is then activated to press the trays towards the boards, thereby making contact between the contactors and devices on the trays. The test system is described in conjunction with a burn-in oven. Processing time is reduced because individual handling of chips is significantly reduced.

Abstract: A semiconductor device handler with a temperature controlled test area. Temperature control is provided in part through the use of temperature controlled air forced across the test area. For heating the test area, electrical resistance heaters are uniformly distributed through the test area and are controlled to provide the desired temperature. The handler has a close pitch between adjacent sockets such that is not possible to distribute refrigeration elements over the test area. Instead, a refrigeration element is placed on one side of the test area. To prevent formation of an undesirable temperature gradient, heat is injected at a specific location in the test area.

Abstract: Automatic test equipment for semiconductor devices. The automatic test equipment contains numerous channels of electronic circuitry in which precisely timed test signals are generated. Significant advantages in both cost and size are achieved by incorporating multiple channels on one integrated circuit chip. To allow this level of integration without degrading timing accuracy, a series of design techniques are employed. These techniques include the use of guard rings and guard layers, placement of circuit elements in relation to the guard rings and guard layers, separate signal traces for power and ground for each channel, and circuit designs that allow the voltage across a filter capacitor to define a correction signal. Another feature of the disclosed embodiment is a fine delay element design that can be controlled for delay variations and incorporates calibration features. A further disclosed feature is circuitry that allows the tester to have a short refire recovery time.

Abstract: An RF module useful for configuring RF sources and receivers to make a wide range of measurements on a device under test. The module includes a directional element which allows one receiver to measure both the input and the output signals from one test point. In addition, the module allows multiple input signals to be combined for intermodulation testing. Multiple copies of the module are used to construct multiple channels in an RF tester. At least one RF source and one RF receiver can be connected to each channel. Each lead of a device under test is assigned to a channel, but one channel may be multiplexed to more than one lead. Switching circuitry included in each module allows the source from one channel to be used as an intermodulation signal for another channel. The module includes calibration standards for source and receiver level accuracy. With this arrangement, numerous RF measurements, including measurement of s-parameters, can be made on a device under test without dedicated instruments.

Abstract: An integral unit for use in testing semiconductor components. The unit is designed to manipulate either packaged semiconductor components or semiconductor wafers and present them to a test head. It provides significant space savings because it replaces the need for separate prober, handler and tester units. The integrated unit includes a positioning mechanism with a tool plate that can be changed to grasp either a semiconductor wafer or a tray of semiconductor components. The tool plate uses a vacuum plate. To hold a tray of semiconductor parts, the vacuum plate has numerous independently operable holes. Each hole is positioned behind one semiconductor component and can be engaged or released separately so that the components can be sorted into separate output bins. To hold a wafer, the tool plate has an extendible tongue member that can be inserted into a stack of semiconductor wafers to pick up one wafer in the stack.

Abstract: A surface mount electrical connector incorporating features to facilitate alignment of contact tails to contact pads on a printed circuit board. The contact tails are held together with a tie bar. Tabs on the tie bar are shaped to engage features on a blade of an alignment tool. The blade can be inserted into the small available on the printed circuit board, but can be easily manipulated for precise alignment of the contact tails.

Abstract: A high speed, high density electrical connector for use with printed circuit boards. The connector is in two pieces with one piece having pins and shield plates and the other having socket type signal contacts and shield plates. The shields have a grounding arrangement which is adapted to control the electromagnetic fields, for various system architectures, simultaneous switching configurations and signal speeds, allowing all of the socket type signal contacts to be used for signal transmission. Additionally, at least one piece of the connector is manufactured from wafers, with each ground plane and signal column injection molded into components which, when combined, form a wafer. This construction allows very close spacing between adjacent columns of signal contacts as well as tightly controlled spacing between the signal contacts and the shields.

Abstract: A high speed, high density electrical connector for use with printed circuit boards. The connector is in two pieces with one piece having pins and shield plates and the other having socket type signal contacts and shield plates. The shields have a grounding arrangement which is adapted to control the electromagnetic fields, for various system architectures, simultaneous switching configurations and signal speeds, allowing all of the socket type signal contacts to be used for signal transmission. Additionally, at least one piece of the connector is manufactured from wafers, with each ground plane and signal column injection molded into components which, when combined, form a wafer. This construction allows very close spacing between adjacent columns of signal contacts as well as tightly controlled spacing between the signal contacts and the shields.

Abstract: A transport tray for semiconductor devices that includes a retention mechanism. The tray is formed with molded plastic inserts positioned in a tray. Each insert includes a contact surface that is designed to have two stable points, one corresponding to a latched state and one corresponding to an unlatched state. The retention mechanism includes elements that allow the contact surface to rotate and translate relative to the surface of a semiconductor component being inserted or removed from the tray. Rotation across the surface, as opposed to sliding, significantly reduces the wear of the retention mechanism.