Patents Represented by Attorney Fields iP, PS
  • Patent number: 7592642
    Abstract: A thyristor-based memory device may comprise two base regions of opposite type conductivity formed between a cathode-emitter region and an anode-emitter region. A junction defined between the p-base region and the cathode-emitter region of the thyristor may be “treated” with a high ionization energy acceptor such as indium in combination with carbon as an activation assist species. These two implants may form complexes that may extend across the junction region.
    Type: Grant
    Filed: April 4, 2006
    Date of Patent: September 22, 2009
    Assignee: T-RAM Semiconductor, Inc.
    Inventors: Srinivasa R. Banna, James D. Plummer
  • Patent number: 7587643
    Abstract: An integrated circuit may include a packet decoder to receive serial data and to decode JTAG signals from the packets received. A JTAG processor may test the electrical circuitry dependent on the JTAG signals decoded. In a further embodiment, a test system may include a library of selectable JTAG routines. An encoder may encode a signal with serial data representative of sequential JTAG signals for at least one of the selectable JTAG routines. In a method of testing, the integrated circuit may receive the serial data signal at a predetermined terminal. A portion of the serial data may be examined to determine the presence of a predefined signature key. JTAG data may then be parsed from the serial data and tests performed based on the parsed JTAG data.
    Type: Grant
    Filed: August 25, 2005
    Date of Patent: September 8, 2009
    Assignee: T-RAM Semiconductor, Inc.
    Inventor: Rajesh Chopra
  • Patent number: 7573077
    Abstract: In accordance with an embodiment of the present invention, a thyristor-based semiconductor memory device may comprise an array of thyristor-based memory formed in an SOI wafer. A supporting substrate may be formed with a density of dopants sufficient to assist delivery of a bias level to the backside of an insulating layer beneath a thyristor. Such conductivity within the substrate may allow reliable back-gate control for the gain of a component bipolar device of the thyristor.
    Type: Grant
    Filed: May 4, 2005
    Date of Patent: August 11, 2009
    Assignee: T-RAM Semiconductor, Inc.
    Inventor: Maxim Ershov
  • Patent number: 7523629
    Abstract: A personal property securement device mountable to a vehicle may comprise a cable housing with a safety port that defines a passage extending from internal to external the housing. A cable may be threaded through the passage with one end fixed to a cable retention knob external the housing and the other end fixed to a reel that may be disposed for rotation within the housing. A power spring may present a torque on the reel to enable retrievable winding and tensioned unwinding of the cable. The property securement device may further comprise a ratchet mechanism in cooperation with the reel to release tensioning of the cable at given incremental extractions.
    Type: Grant
    Filed: February 1, 2006
    Date of Patent: April 28, 2009
    Assignee: Peak Recreational Products,, LLC
    Inventor: Dale Anton Tollefson
  • Patent number: 7498513
    Abstract: A storage box includes a plurality of walls that define an interior. A cable housing may be secured to an interior wall of the storage box, with a reel secured therein for rotational winding and unwinding of a cable. A cable retention knob on the distal end of the cable enables withdrawal of the cable external the storage box. A receiving port on a wall of the storage box can receive at least a portion of the cable retention knob. A latch assembly is operatively disposed proximate the receiving port and is selectively configurable, dependent on an open or close condition of a lid. The latch assembly is operatively and selectively configured to release the cable retention knob when the lid is open and to enable spring-biased capture of the cable retention knob when the lid is closed and when the cable retention knob is seated in the receiving port.
    Type: Grant
    Filed: January 16, 2007
    Date of Patent: March 3, 2009
    Assignee: Peak Recreational Products, LLC
    Inventor: Dale Anton Tollefson
  • Patent number: 7491586
    Abstract: A method of fabricating a thyristor-based memory may include forming different opposite conductivity-type regions in silicon for defining a thyristor and an access device in series relationship. An activation anneal may activate dopants previously implanted for the different regions. A damaging implant of germanium or xenon or argon may be directed into select regions of the silicon including at least one p-n junction region for the access device and the thyristor. A re-crystallization anneal may then be performed to re-crystallize at least some of the damaged lattice structure resulting from the damaging implant. The re-crystallization anneal may use a temperature less than that of the previous activation anneal.
    Type: Grant
    Filed: June 22, 2005
    Date of Patent: February 17, 2009
    Assignee: T-RAM Semiconductor, Inc.
    Inventors: Andrew E Horch, Hyun-Jin Cho, Farid Nemati, Scott Robins, Rajesh N. Gupta, Kevin J. Yang
  • Patent number: 7489008
    Abstract: A semiconductor device may comprise a partially-depleted SOI MOSFET having a floating body region disposed between a source and drain. The floating body region may be driven to receive injected carriers for adjusting its potential during operation of the MOSFET. In a particular case, the MOSFET may comprise another region of semiconductor material in contiguous relationship with a drain/source region of the MOSFET and on a side thereof opposite to the body region. This additional region may be formed with a conductivity of type opposite the drain/source, and may establish an effective bipolar device per the body, the drain/source and the additional region. The geometries and doping thereof may be designed to establish a transport gain of magnitude sufficient to assist the injection of carriers into the floating body region, yet small enough to guard against inter-latching with the MOSFET.
    Type: Grant
    Filed: September 16, 2006
    Date of Patent: February 10, 2009
    Assignee: T-RAM Semiconductor, Inc.
    Inventors: Zachary K. Lee, Farid Nemati, Scott Robins
  • Patent number: 7488627
    Abstract: A thyristor-based memory may comprise a thyristor accessible via an access transistor. A temperature dependent bias may be applied to at least one of a supporting substrate and an electrode capacitively-coupled to a base region of the thyristor. The voltage level of the adaptive bias may change with respect to temperature and may influence and/or compensate an inherent bipolar gain of the thyristor in accordance with the change in bias and may enhance its performance and/or reliability over a range of operating temperature. In a particular embodiment, the thyristor may be formed in a layer of silicon of an SOI substrate and the adaptive bias coupled to a supporting substrate of the SOI structure.
    Type: Grant
    Filed: July 15, 2006
    Date of Patent: February 10, 2009
    Assignee: T-RAM Semiconductor, Inc.
    Inventors: Farid Nemati, Kevin J. Yang
  • Patent number: 7488626
    Abstract: In a method of fabricating a semiconductor memory device, a thyristor may be formed in a layer of semiconductor material. Carbon may be implanted and annealed in a base-emitter junction region for the thyristor to affect leakage characteristics. The density of the carbon and/or a bombardment energy and/or an anneal therefore may be selected to establish a low-voltage, leakage characteristic for the junction substantially greater than its leakage absent the carbon. In one embodiment, an anneal of the implanted carbon may be performed in common with an activation for other implant regions the semiconductor device.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: February 10, 2009
    Assignee: T-RAM Semiconductor, Inc.
    Inventors: Kevin J. Yang, Farid Nemati, Scott Robins, James D. Plummer, Hyun-Jin Cho
  • Patent number: 7456439
    Abstract: A semiconductor device may comprise a plurality of memory cells. A memory cell may comprise a thyristor, at least a portion of which is formed in a pillar of semiconductor material. The pillar may comprise sidewalls defining a cylindrical circumference of a first diameter. In a particular embodiment, the pillars associated with the plurality of memory cells may define rows and columns of an array. In a further embodiment, a pillar may be spaced by a first distance of magnitude up to the first diameter relative to a neighboring pillar within its row. In an additional further embodiment, the pillar may be spaced by a second distance of a magnitude up to twice the first diameter, relative to a neighboring pillar within its column.
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: November 25, 2008
    Assignee: T-RAM Semiconductor, Inc.
    Inventor: Andrew E. Horch
  • Patent number: 7428833
    Abstract: A personal property lock assembly mountable to a vehicle may comprise a cable lock, a protrusion with a plateaued surface of a lockbox, a mount coupler comprising a seating surface to seat against the plateaued surface and a mounting mechanism, and a fastener. The lock assembly may comprise one or more locking mechanisms to provide securement to a cable lock that is anchored to a vehicle by way of a coupler. The lock assembly further comprises a cable reel assembly and a cable receiving mechanism operable together to retractably store and allow extension of a length of a cable. A cable locking mechanism removably binds and locks an end portion of the cable operably inserted in the cable receiving mechanism. As referenced herein, various mount couplers are effective for binding the cable lockbox to respective vehicles, which may also be disclosed with alternative embodiments.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: September 30, 2008
    Assignee: Peak Recreational Products, LLC
    Inventor: Dale Anton Tollefson
  • Patent number: 7405963
    Abstract: A dynamically-operating restoration circuit is used to apply a voltage or current restore pulse signal to thyristor-based memory cells and therein restore data in the cell using the internal positive feedback loop of the thyristor. In one example implementation, the internal positive feedback loop in the thyristor is used to restore the conducting state of a device after the thyristor current drops below the holding current. A pulse and/or periodic waveform are defined and applied to ensure that the thyristor is not released from its conducting state. The time average of the periodic restore current in the thyristor may be lower than the holding current threshold. While not necessarily limited to memory cells that are thyristor-based, various embodiments of the invention have been found to be the particularly useful for high-speed, low-power memory cells in which a thin capacitively-coupled thyristor is used to provide a bi-stable storage element.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: July 29, 2008
    Assignee: T-RAM Semiconductor, Inc.
    Inventors: Farid Nemati, Hyun-Jin Cho, Robert Homan Igehy
  • Patent number: 7326969
    Abstract: A semiconductor memory device may comprise a thyristor-based memory having some portions formed in strained silicon, and other portions formed in relaxed silicon. In a further embodiment, a thyristor in the thyristor-based memory may be formed in a region of relaxed silicon germanium, while an access device to the thyristor-based memory may have a body region incorporating a portion of a layer of strained silicon. In yet a further embodiment, different regions of the thyristor may be formed in vertical aligned relationship relative to an upper surface of the relaxed silicon germanium. For this embodiment, the thyristor may be formed substantially within the depth of the relaxed silicon germanium layer. In a method of forming the semiconductor device, relaxed silicon may be deposited over exposed regions of a silicon substrate, and a thin layer of strained silicon formed over a portion of the substrate having silicon germanium.
    Type: Grant
    Filed: December 2, 2004
    Date of Patent: February 5, 2008
    Assignee: T-RAM Semiconductor, Inc.
    Inventor: Andrew E. Horch
  • Patent number: 7316941
    Abstract: In one embodiment, a thyristor device may be formed in series relationship with a MOSFET. Alternating regions of opposite conductivity type may be formed in semiconductor material for defining source, body and drain regions for the MOSFET device, and in series relationship to the thyristor. A primary dopant for a commonly-shared cathode/anode-emitter and drain/source region may have a concentration that is at least one order of magnitude greater than that of any background dopant therein. In a particular embodiment, the thyristor device and the MOSFET in series relationship therewith collectively define part of a thyristor-based memory.
    Type: Grant
    Filed: July 26, 2005
    Date of Patent: January 8, 2008
    Assignee: T-RAM Semiconductor, Inc.
    Inventor: Rajesh Gupta
  • Patent number: 7256430
    Abstract: A thyristor memory device may comprise a capacitor electrode formed over a base region of the thyristor using a replacement gate process. During formation of the thyristor, a base-emitter boundary may be aligned relative to a shoulder of the capacitor electrode. In a particular embodiment, the replacement gate process may comprise defining a trench in a layer of dielectric over semiconductor material. Conductive material for the electrode may be formed over the dielectric and in the trench. It may further be patterned to form a shoulder for the electrode that extends over regions of the dielectric over a base region for the thyristor. The extent of the shoulder may be used to pattern the dielectric and/or to assist alignment of implants for the base and emitter regions of the thyristor.
    Type: Grant
    Filed: December 15, 2005
    Date of Patent: August 14, 2007
    Assignee: T-RAM Semiconductor, Inc.
    Inventor: Andrew E. Horch
  • Patent number: 7195959
    Abstract: A thyristor-based semiconductor memory device may comprise at least a region thereof, e.g., a p-base region, having high ionization energy impurity, such as a dopant. This high ionization energy impurity within a base region may be operable to compensate for a gain-versus-temperature dependence of a constituent bipolar transistor of the thyristor element of a thyristor-based memory device. In particular embodiments, the high ionization energy impurity may include a donor and/or acceptor in silicon.
    Type: Grant
    Filed: October 4, 2004
    Date of Patent: March 27, 2007
    Assignee: T-Ram Semiconductor, Inc.
    Inventors: James D. Plummer, Zachary K. Lee, Kevin J. Yang, Farid Nemati
  • Patent number: 7187530
    Abstract: An electrostatic discharge protective circuit may comprise a low-pass filter and a high-pass filter to receive and filter signals of a supply line. Control logic may receive output signals of the low-pass and high-pass filters and may operate a gateable channel to shunt current of the supply line dependent on the output signals from the filters.
    Type: Grant
    Filed: February 4, 2003
    Date of Patent: March 6, 2007
    Assignee: T-Ram Semiconductor, Inc.
    Inventors: Craig Thomas Salling, Siak Chon Kee, Pierre Dermy
  • Patent number: 7164081
    Abstract: In one embodiment, a toolbox may includes a plurality of walls that define at least in part an interior from/into which tools may be retrieved or deposited. A cable housing may be secured to an interior wall of the toolbox, with a reel secured therein for rotational winding and unwinding of a cable. A cable retention knob on the distal end of the cable may be available external the cable housing for enabling withdrawal of the cable external the toolbox. Further, a power spring may be operatively configured to apply a rotational force to the reel to enable tensioned winding/unwinding of the cable about the reel. In a particular example, the walls for the toolbox form an external shape adapted for installation across the bed of a pickup truck.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: January 16, 2007
    Assignee: Peak Recreational Products, LLC
    Inventor: Dale Anton Tollefson
  • Patent number: D540149
    Type: Grant
    Filed: February 1, 2006
    Date of Patent: April 10, 2007
    Assignee: Peak Recreational Products, LLC
    Inventor: Dale Anton Tollefson
  • Patent number: D556012
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: November 27, 2007
    Assignee: Peak Recreational Products, LLC
    Inventor: Dale Anton Tollefson