Abstract: A thyristor-based memory device may comprise a commonly-implanted base region, in which a common emitter region may be implanted for the left and the right thyristors in a mirror-image pair. The implanting of the base region may include directing the dopant toward a semiconductor material through a window defined by sidewalls formed in a conditioned masking material over the semiconductor material. The resulting base and emitter regions may be substantially symmetrical about a central boundary plane. In relation to the symmetry, one thyristor may be operable with a minimum holding current within about 10 percent of that for the other thyristor in the mirror-image pair.

Abstract: A semiconductor device may comprise a partially-depleted SOI MOSFET having a floating body region disposed between a source and drain. The floating body region may be driven to receive injected carriers for adjusting its potential during operation of the MOSFET. In a particular case, the MOSFET may comprise another region of semiconductor material in contiguous relationship with a drain/source region of the MOSFET and on a side thereof opposite to the body region. This additional region may be formed with a conductivity of type opposite the drain/source, and may establish an effective bipolar device per the body, the drain/source and the additional region. The geometries and doping thereof may be designed to establish a transport gain of magnitude sufficient to assist the injection of carriers into the floating body region, yet small enough to guard against inter-latching with the MOSFET.

Abstract: A thyristor-based memory may comprise a thyristor accessible via an access transistor. A temperature dependent bias may be applied to at least one of a supporting substrate and an electrode capacitively-coupled to a base region of the thyristor. The voltage level of the adaptive bias may change with respect to temperature and may influence and/or compensate an inherent bipolar gain of the thyristor in accordance with the change in bias and may enhance its performance and/or reliability over a range of operating temperature. In a particular embodiment, the thyristor may be formed in a layer of silicon of an SOI substrate and the adaptive bias coupled to a supporting substrate of the SOI structure.

Abstract: In a method of fabricating a semiconductor memory device, a thyristor may be formed in a layer of semiconductor material. Carbon may be implanted and annealed in a base-emitter junction region for the thyristor to affect leakage characteristics. The density of the carbon and/or a bombardment energy and/or an anneal therefore may be selected to establish a low-voltage, leakage characteristic for the junction substantially greater than its leakage absent the carbon. In one embodiment, an anneal of the implanted carbon may be performed in common with an activation for other implant regions the semiconductor device.

Abstract: A bathing apparatus, for use by disabled bathers, comprises a bathtub and a banister. The bathtub has a ramp and a floor. The ramp descends to the bathtub floor, which slopes gradually toward a drain. The ramp's top is approximately level with the seat of a wheel chair. The banister is coupled to the bathtub and extends over the ramp and floor of the bathtub. The banister has a sloped portion for descending into the bathtub that descends to level portion. The level portion is substantially horizontal for sitting or lying on while bathing. The level portion of the banister is over the floor and its height relative to floor increases as the floor slopes toward the drain. A bather may choose a seat height that is most comfortable by sitting on the level portion farther or closer to the drain. While bathing the bather is stabilized by the banister, feet or knees on the floor of the bathtub.

Abstract: A dynamically-operating restoration circuit is used to apply a voltage or current restore pulse signal to thyristor-based memory cells and therein restore data in the cell using the internal positive feedback loop of the thyristor. In one example implementation, the internal positive feedback loop in the thyristor is used to restore the conducting state of a device after the thyristor current drops below the holding current. A pulse and/or periodic waveform are defined and applied to ensure that the thyristor is not released from its conducting state. The time average of the periodic restore current in the thyristor may be lower than the holding current threshold. While not necessarily limited to memory cells that are thyristor-based, various embodiments of the invention have been found to be the particularly useful for high-speed, low-power memory cells in which a thin capacitively-coupled thyristor is used to provide a bi-stable storage element.