Abstract: Optimal circular buffer rate matching for turbo code. An offset index, ?, of 3 and a skipping index, ?, of 3 is employed in accordance with circular buffer rate matching. This allows less puncturing of information bits and more puncturing of redundancy/parity bits (e.g., which can provide for a higher rate). Multiple turbo codes may be generated from a mother code such that each generated turbo code can be employed to encode information bits. For example, a first turbo coded signal can be generated using a first turbo code generated from the mother code, and a second turbo coded signal can be generated using a second turbo code generated from the mother code. Any of these turbo coded signal can be decoded using parallel decoding processing or a single turbo decoder (when each turbo coded signal undergoes processing to transform it back to the mother code format).

Abstract: Turbo coding having combined turbo de-padding and rate matching de-padding. An approach is presented by which a singular module is operable to perform both zero bit de-padding and dummy bit de-padding in accordance with turbo encoding. Zero padding can be performed on an input information stream before undergoing turbo encoding. One or more of the 3 outputs from the turbo encoding module (e.g., systematic bits, parity 1 bits, and parity 2 bits) may then undergo dummy bit padding as well. Thereafter, these 3 streams (some or all of which may have undergone dummy bit padding) undergo sub-block interleaving. After all of these operations have taken place, a singular combined de-padding module that can be employed to perform de-padding any zero padded bits and any dummy padded bits from each of the three streams that have undergone the sub-block interleaving.

Abstract: An integrated circuit radio transceiver and method therefor includes circuitry and logic for transmitting outgoing or ingoing communication signals as well as one of a digital data signal or a digital clock on the same antenna signal paths between a radio and a switch fabric. The switch fabric is operable to selectively couple any of a plurality of antennas to antenna signal paths based upon the digital data and the digital clock extracted from at least one of the antenna signal paths conducting RF signals. The switch fabric is further operable to extract all required power from at least one antenna signal path that may be used to conduct RF.

Abstract: A processing system includes a plurality of first circuit modules. A plurality of second circuit modules are coupled to an RF data bus via a 60 GHz communications. The RF data bus receives first data from at least one of the plurality of first circuit modules, and transmits the first data via 60 GHz communications to at least one of the plurality of second circuit modules.

Abstract: Adaptive interference cancellation algorithm using speech mode dependent thresholds. A method of processing radio frequency (RF) bursts dependent on a speech mode associated with data contained within the RF burst is presented. Different voice modes, full rate, half rate, and adaptive multi-channel rates each may require different signal to noise ratio (SNR) conditions in order to be successfully processed. To improve the equalization, the SNR associated with the burst is estimated. Based on the SNR or other related conditions, a decision can be made as to whether or not an interference cancellation burst process should be implemented. For example, any one or more of SNR of the signal, a measure of colored noise within the signal, an indication whether the signal being noise limited or interference limited, and a channel profile of the signal may indicate the presence of interference requiring the cancellation of such interference.

Abstract: A video processing system includes a video encoder that encodes a video signal into a contiguous video stream having an independent portion and a dependent portion that requires the independent portion for decoding. A scrambling module scrambles the contiguous video stream to produce a scrambled video stream by scrambling the independent video portion and leaving the dependent portion unscrambled.

Abstract: A scheme in which a first decoder provides first decoding of a signal read from a disk. A second decoder, coupled to an output of the first decoder, combines with the first decoder to provide iterative decoding to recover data stored on the disk when in an iterative mode of operation. However, when in a non-iterative mode of operation, the output of the first decoder is coupled to an error correction code module to apply error correction code (ECC) to the output of the first decoder to recover data stored on the disk by non-iterative decoding.

Abstract: The present invention provides a method and apparatus for initiating a multiple input multiple output (MIMO) communication. The method and apparatus includes processing that begins by transmitting a frame formatted in accordance with a default MIMO active transmitter-receiver antenna configuration to a target receiver. The processing continues by receiving at least one response frame from the target receiver. The processing continues by determining a number of receiver antennas of the target receiver from the at least one response frame.

Abstract: A method for accessing an RF begins by determining whether information is to be transmitted via the RF bus. The method continues by determining whether the RF bus is available when the information is to be transmitted via the RF bus. The method continues by securing access to the RF bus when the RF bus is available. The method continues by converting the information into RF bus signal and by transmitting the RF bus signal via the RF bus when access to the RF bus is secured.

Abstract: Formulaic flexible collision-free memory accessing for parallel turbo decoding with quadratic polynomial permutation (QPP) interleave. A means is presented by which any desired number of parallel implemented turbo decoding processors can be employed to perform turbo decoding that has been performed using a QPP interleave. This approach is presented to allow an arbitrarily selected number (M) of decoding processors (e.g., a plurality of parallel implemented turbo decoders) to perform decoding of a turbo coded signal while still using a selected embodiment of a QPP interleave. In addition, a collision-free memory mapping, MOD,C,W) provides more freedom for selecting the particular quadratic polynomial permutation (QPP) interleave (?) that satisfies a parallel turbo decoding implementation with any desired number of parallel implemented turbo decoding processors.

Abstract: An IC includes a microphone interface, a speaker interface, a baseband processing module, and RF section, a processing module, an on-chip to off-chip connector structure, and a digital audio switching module coupled to: provide the inbound voice signal from the processing module to the handheld speaker interface when the IC is in a remote mode; provide the outbound voice signal from the handheld microphone interface to the processing module when the IC is in the remote mode; provide the inbound voice signal from the processing module to the on-chip to off-chip connector structure when the IC is in a docked mode; and provide the outbound voice signal from the on-chip to off-chip connector structure to the processing module when the IC is in the docked mode.

Abstract: A radio frequency identification (RFID) system includes an RFID reader and an RFID tag. The RFID reader is coupled to transmit first electromagnetic signal via an off-chip winding section of a hybrid on-chip-off-chip transformer. The RFID tag is coupled to receive the first electromagnetic signal via an on-chip winding section of the hybrid on-chip-off-chip transformer, wherein the on-chip winding section derives a second electromagnetic signal from the first electromagnetic signal when the on-chip winding section is within a proximal coupling distance of the off-chip winding section.

Abstract: An item data management server having the capability to transfer information and records via a physical item data record of an item data management server. The physical item data record transfer and/or cloning facilitates ready maintenance and upkeep of the inventory of physical items to other users to facilitate community/trade, and also provides a feature for providing information relating to the physical items to third-party service providers, such as insurers, and to governmental authorities, such as in the event of theft, to aid in the recovery of the physical items, et cetera.

Abstract: An integrated circuit radio transceiver and method therefor includes a high-pass variable gain amplifier (HPVGA) operably disposed within one of the transmitter and the receiver front ends operable to provide a linear variable gain and a substantially constant high-pass frequency corner that does not vary with changes in gain level settings. The HPVGA includes an amplifier operably disposed to receive an input signal and to produce an amplified output based upon the input signal, an adjustable resistance block operable to adjust resistance based upon a gain control input and corner drift compensation block operably disposed to provide corner frequency compensation at the input terminal of the amplifier that is further coupled to receive the input signal from the adjustable resistance block.

Abstract: Reduced complexity ARP (almost regular permutation) interleaves providing flexible granularity and parallelism adaptable to any possible turbo code block size. A novel means is presented by which any desired turbo code block size can be employed when only requiring, in only some instances, a very small number of dummy bits. This approach also is directly adaptable to parallel turbo decoding, in which any desired degree of parallelism can be employed. Alternatively, as few as one turbo decoder can be employed in a fully non-parallel implementation as well. Also, this approach allows for storage of a reduced number of parameters to accommodate a wide variety of interleaves.

Abstract: A (radio frequency) RF reception system includes an RF receiver that demodulates an RF signal at a sequence of selected carrier frequencies. A frequency hop module, coupled to the RF receiver generates the sequence of selected carrier frequencies. A programmable antenna is tuned to each of the sequence of selected carrier frequencies to receive the RF signal via an antenna current.

Abstract: A Radio Frequency (RF) cascode power amplifier operates with differing battery supply voltages. A transconductance stage has a transistor with an RF signal input at its gate. A cascode stage has at least one cascode transistor, the cascode stage coupled in series with the transconductance stage between a battery voltage node and ground, the cascode stage having an RF signal output at the battery voltage node and at least one bias input to the at least one cascode transistor. Cascode bias feedback circuitry applies fixed bias voltage(s) to the at least one two bias inputs for a low battery voltage and applies feedback bias voltage(s) to the at least two bias inputs for a high battery voltage, the feedback bias voltage(s) based upon a voltage of the battery voltage node. More than two differing battery supply voltages are supported.

Abstract: A circuit includes a global positioning system (GPS) receiver that receives a GPS signal and that generates GPS position data based on the GPS signal. A wireless telephone transceiver section coupled to generate an outbound RF signal from an outbound symbol stream, and to convert an inbound RF signal into an inbound symbol stream. A processing module is coupled to convert outbound data into the outbound symbol stream, convert the inbound symbol stream into inbound data, to weight the GPS position data with a first weighting factor when the wireless telephone transceiver section is generating the outbound RF signal to produce first weighted GPS position data and weight the GPS position data with a second weighting factor with a second weighting factor when the wireless telephone transceiver section is not generating the outbound RE signal to produce second weighted GPS position data, and to generate position information based on at least one of the first and second weighted GPS position data.

Abstract: A radio frequency (RF) integrated circuit (IC) operable to support wireless communications is provided. In one embodiment, the RF IC includes an advanced high-performance (AHB) bus matrix, a microprocessor core coupled to the AHB bus matrix, a plurality of processing modules wherein each processing module is operable to support one or more functions of the RF IC, and a plurality of power islands. Each power island is associated with one or more functions of the RF IC. This arrangement allows power islands coupled to the processing modules associated with the one or more functions associated with the power island to supply power for the processing modules associated with the one or more functions associated with the power island. Power from the power island(s) to the processing module(s) may be reduced or secured when the one or more functions associated with the power island is not required.

Abstract: A device includes a first integrated circuit, a second integrated circuit and an RF bus controller. Each of the first and second ICs includes a radio frequency (RF) bus transceiver. The RF bus controller is coupled to control intra-device RF communications between the RF bus transceivers of the first and second ICs.